CN103701663A - 1553B bus program control fault injection device - Google Patents
1553B bus program control fault injection device Download PDFInfo
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Abstract
The invention discloses a 1553B bus program control fault injection device. The 1553B bus program control fault injection device comprises a Manchester coder, an odd check fault coder, a synchronous head fault coder, a zero passage fault coder, a data word length fault coder, a message length fault and replacing command fault coder, a data interval fault coder and a response delay fault coder. The 1553B bus program control fault injection device is used for verifying effectiveness, reliability and testability of 1553B bus communication equipment and a 1553B bus communication system, solves the defect and problem that a bus communication process is damaged in a 1553B bus fault injection test process by the traditional method, is realized by adopting an FPGA (field programmable gate array) firmware and has universality. An input end is connected with a 1553B bus control IP (internet protocol) core or chip, various faults are generated by changing a coding mode, and the communication function of the 1553B bus control IP core or chip is not intervened. Other sources such as a phase locking ring and a storage are not called and the hardware expense is small.
Description
Technical field
The present invention relates to aviation electronics communication bus emulation testing technical field, particularly relate to a kind of 1553B bus program controlled fault injection device.
Background technology
1553B bus refers to defer to digital time-division instruction/response type processed multiplex bus of MILSTD MIL-STD-1553B, and corresponding China's military standard is that GJB289A-97(two standard specified content are consistent with it).The communication process of 1553B bus is by bus control unit (BC, Bus Controller) initiate and adopt the controlling mechanism of replying of instruction-response, transmission reliability guarantee is provided, has been widely used in the particularly middle low-rate data transmission of military air environment and Aero-Space electronic equipment of military affairs, industry and scientific research field.
GJB5186 is the method for testing military standard that China formulates for MIL-STD-1553B (GJB289A-97) bus, check trunk controller (BC), RTU (remote terminal unit) (RT have been stipulated, Remote Terminal), bus monitor (BM, Bus Monitor), validity test method and the production test method of connector and bus system, clearly stipulate that fault injects one of means of testing as inspection machine and system protocol compliance.Simultaneously, along with take military project that aviation electronics is representative and high-tech equipment is manufactured and application requires to improve constantly to the Testability Design of equipment and system, in equipment development, production, modulation, examination and system buildup process, the acceleration inefficacy method that adopts " hardware is at ring " fault to inject is simulated the various potential risks that system in future application process may be potential, has become the requisite measure of inspection machine and system Testability Design validity and completeness.
1553B bus failure category can be divided into physical fault, electric fault and protocol malfunctions, and wherein physical fault refers to the opening circuit of differential signal line, short circuit, serial impedance and parallel impedance variation etc.; Electric fault comprises signal amplitude, waveform rise/fall time and zero-crossing timing mistake etc.; Protocol malfunctions refers to the fault type that comprises check errors, word length mistake, message-length mistake, word interval mistake, postpones the data bit such as mistake and timing relationship.
For protocol malfunctions, at present, domestic and international R&D institution and testing equipment manufacturer has released some special-purpose fault injectors for dissimilar bus system or with fault function of injecting bus analysis equipment, how when application apparatus is tested, to avoid or to reduce the impact on measurand system topology and data transmission procedure generation as far as possible, becoming the emphasis of concern.For single work/full duplex bus, postponing under controllable state, fault injector equipment is serially connected in to the embedded design of one-way transmission bus employing " receive → injection fault → forwarding ", become common practice.But for half-duplex bus, particularly adopt the 1553B bus of special instruction-response type control mode, adopt embedded serial to inject design and remain in a lot of drawbacks.Separately design, with the 1553B simulated-bus equipment of fault function of injecting, substitutes the one or more non-measurand in 1553B bus system, completes half system testing in kind and be a kind of suboptimum but effective solution.In existing 1553B simulated-bus equipment, fault is injected and two kinds of independent utility patterns of Bus simulator Chang Zuowei, under fault injection way, conventionally need to pre-determine content and the signal waveform of under specific fault type, transmitting data, in the mode triggering, fault is injected to bus system again, cause thus can not changing in real time transferring content under fault injection way, be difficult to avoid bus communication process to cause interference simultaneously.
For conventional method, at 1553B bus failure, inject the drawback problem that test process destroys bus communication process, not yet propose at present effective solution.
Summary of the invention
For conventional method, at 1553B bus failure, inject the drawback problem that test process destroys bus communication process, the invention provides a kind of 1553B bus program controlled fault injection device, in order to solve the problems of the technologies described above.
According to an aspect of the present invention, the invention provides a kind of 1553B bus program controlled fault injection device, wherein, this device comprises: manchester encoder is Manchester II type encoder, forms 20 Manchester II type codings; Odd malfunction coding device, for by the judgement of word order rolling counters forward value, selects odd pattern or even parity check pattern; Synchronous head malfunction coding device, for the 6 bit synchronization header encoder User Defineds to command word/response word synchronous head " 10 " and data word synchronous head " 01 " are provided respectively, the 5 kinds of invalid synchronous head codings in " 111100 ", " 110000 ", " 111001 ", " 011000 " and " 000111 " of coverage criteria regulation; Zero passage malfunction coding device, for by command word of 1553B bus data stream appointment or data word, specifies a mistake zero failure, by the constant height mode of register configuration or constant low mode; Data word length malfunction coding device, for by the data bit of command word of described 1553B bus data stream appointment or data word, deletes 1,2 from position, end, or increase by 2,3 behind position, end; Wherein, delete or increase pattern and increase the content of position, by user by the self-defined configuration of register; Message-length fault and replacement instruction malfunction coding device, for deleting 1,2 by described 1553B bus message frame ... 31 data words or increase by 1 data word, produce message-length fault; Based on same mechanism, at designated word 4us, replace user defined commands interval time simultaneously, produce replacement instruction fault; Data break malfunction coding device, for specifying after a command word or data word at described 1553B bus data stream, inserts User Defined interval; Operating lag malfunction coding device, for flowing the bulk delay User Defined time by described 1553B bus data.
Further, described manchester encoder, for standard 1553B even parity check Manchester II type encoder, by 16 data to be transmitted D[15:0 of input] according to odd rule, produce the 17th bit check position, according to the synchronous head type signal SYNC of input, increase by 3 bit synchronization header encoders, form 20 Manchester II type codings.
Further, described odd malfunction coding device, for changing the odd pattern of command word of described 1553B bus data stream appointment or data word into even parity check pattern, or change even parity check pattern into odd pattern, and keep the checking mode of other word constant.
Further, described odd malfunction coding device, on described manchester encoder basis, increases by one 7 fault word sequence number input signal err_seq[6:0], and one 7 word order counters.In the odd link of described manchester encoder, the judgement by word order rolling counters forward value, utilizes if-else branched program, selects odd pattern, even parity check pattern.
Further, described synchronous head malfunction coding device, be used on described manchester encoder basis, increase respectively 6 user defined commands word/response word synchronous head SYNC1[5:0], with 6 bit data word synchronous head SYNC0[5:0] input signal, in described manchester encoder, add 3 bit synchronization headrings joints, respectively when 3 corresponding 6 positions according to self-defined synchronous with input, produce synchronous head fault; When wherein, described Manchester code bits per inch certificate is mapped as 2 positions.
Further, described zero passage malfunction coding device, for on the basis of described manchester encoder, increase by one 7 fault word sequential signal err_seq[6:0], one 6 position sequential signal bit_seq[5:0], high/low marking signal low_high and 7 word order counters and 6 position order counters; In described Manchester's code process, when word order counter and a count value of order counter reach word order and a position order of inputting regulation by signal, location abort situation, high or the permanent low signal of perseverance while utilizing two positions according to described low_high, substitute normal Manchester's code, produced zero failure.
Further, described data word length malfunction coding device, for on the basis of described manchester encoder, increase by one 7 word sequential signal err_seq[6:0], 2 bit-errors subpattern signal err_mode[1:0] and 3 self-defined signal bit_more[2:0 of unnecessary bit].According to author's preface counter status, for designated word, according to described err_mode[1:0] utilize case branched program, select to delete latter 1 of 20 message signale positions, latter 2 or thereafter, increase two or three-digit, increase the content of position by described bit_more[2:0] self-defined.
Further, described message-length fault and replacement instruction malfunction coding device, be comprised of 2 sub-encoders, and wherein 1 is the manchester encoder with word counter, and another 1 is individual character manchester encoder with self-defined delay.
Further, described data break malfunction coding device for the basis in described manchester encoder, inserts a delaying state between the Idle state of coder state machine and transmission state, is created in the phenomenon of the failure of inserting interval after specified data word; Wherein, the time of delay of described delaying state is by 6 input signal Interval[5:0] configuration, specified data word is by 7 word sequential signal err_seq[6:0] configuration.
Further, described operating lag malfunction coding device for increasing delaying state at state machine, directly increases time of delay before coding.
Further, between described manchester encoder, described odd malfunction coding device, described synchronous head malfunction coding device, described zero passage malfunction coding device, described data word length malfunction coding device, described message-length fault and replacement instruction malfunction coding device, described data break malfunction coding device, described operating lag malfunction coding device, it is concurrency relation, utilize branched program to call, form described program control fault injection device.
Further, the input signal of the external signaling interface of described program control fault injection device is: reset signal, 16MHz clock signal, 16 parallel-by-bit data-signals, a 1 bit synchronization signal and 1 encoder are write data write operation marking signal, and 4 16 configuration register FJ_MODE_REG, FJ_SEQ_REG FJ_DELAY_REG, FJ_USERDEFINE; Output signal is: 1 pair of difference 1553B code signal, 1 encoder data read operation marking signal, 1 encoder busy signal; Wherein, the input of described external signaling interface is connected with 1553B total line traffic control Internet protocol IP core or chip, by changing coded system, produces various faults.
The present invention is directed to protocol malfunctions, the 1553B bus program controlled fault injection device proposing is for validity, reliability and testability checking, particularly a kind of program control fault filling method and encoder apparatus that produces 8 classification 1553B bus communication protocol faults of 1553B bus communication equipment and system.Solved conventional method and injected at 1553B bus failure the drawback problem that test process destroys bus communication process, this device adopts FPGA firmware to realize, and has versatility.Input is connected with the total line traffic control IP kernel of 1553B or chip, only by changing coded system, produces various faults, the total line traffic control IP kernel of nonintervention 1553B or chip communication function.Firmware is never called other resources such as phase-locked loop, memory, and hardware spending is little.
Above-mentioned explanation is only the general introduction of technical solution of the present invention, in order to better understand technological means of the present invention, and can be implemented according to the content of specification, and for above and other objects of the present invention, feature and advantage can be become apparent, below especially exemplified by the specific embodiment of the present invention.
Accompanying drawing explanation
Fig. 1 is according to the structured flowchart of the 1553B bus program controlled fault injection device of the embodiment of the present invention;
Fig. 2 is according to the structural representation of the manchester encoder of the embodiment of the present invention;
Fig. 3 is according to the structural representation of the odd malfunction coding device of the embodiment of the present invention;
Fig. 4 is according to the structural representation of the synchronous head malfunction coding device of the embodiment of the present invention;
Fig. 5 is according to the structural representation of the zero passage malfunction coding device of the embodiment of the present invention;
Fig. 6 is according to the structural representation of the data word length malfunction coding device of the embodiment of the present invention;
Fig. 7 is according to the structural representation of the message-length fault of the embodiment of the present invention and replacement instruction malfunction coding device.
Embodiment
In order to solve conventional method, at 1553B bus failure, inject the drawback problem that test process destroys bus communication process, the invention provides a kind of 1553B bus program controlled fault injection device, below in conjunction with accompanying drawing and embodiment, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, does not limit the present invention.
The present invention injects at 1553B bus failure the drawback that test process destroys bus communication process for solving conventional method, a kind of manchester encoder with program control fault function of injecting has been proposed, apply this encoder apparatus, can not change 1553B bus apparatus communication control function, can realize the protocol malfunctions of whole 8 classifications of GJB5186 defined injects, reach fault injection and there is " transparency " for bus communication, in Bus simulator process, complete fault simultaneously and inject test, thus the phenomenon of the failure in more effectively matching real bus communication process.
In normal 1553B bus communication, data are utilized Manchester II type coding transmission.Fig. 1 is according to the structured flowchart of the 1553B bus program controlled fault injection device of the embodiment of the present invention, and as shown in Figure 1, the 1553B bus program controlled fault injection device that the present invention proposes is comprised of 8 basic function module:
Manchester encoder 10, is Manchester II type encoder, forms 20 Manchester II type codings.
Particularly, manchester encoder, for standard 1553B even parity check Manchester II type encoder, by 16 data to be transmitted D[15:0 of input] according to odd rule, produce the 17th bit check position, according to the synchronous head type signal SYNC of input, increase by 3 bit synchronization header encoders, form 20 Manchester II type codings.
Odd malfunction coding device 20, for by the judgement of word order rolling counters forward value, selects odd pattern or even parity check pattern.
Particularly, odd malfunction coding device, for changing the odd pattern of command word of 1553B bus data stream appointment or data word into even parity check pattern, or changes even parity check pattern into odd pattern, and keeps the checking mode of other word constant.
Particularly, odd malfunction coding device, on manchester encoder basis, increases by one 7 fault word sequence number input signal err_seq[6:0], and one 7 word order counters.In the odd link of manchester encoder, the judgement by word order rolling counters forward value, utilizes if-else branched program, selects odd pattern, even parity check pattern.
Synchronous head malfunction coding device 30, for the 6 bit synchronization header encoder User Defineds to command word/response word synchronous head " 10 " and data word synchronous head " 01 " are provided respectively, the 5 kinds of invalid synchronous head codings in " 111100 ", " 110000 ", " 111001 ", " 011000 " and " 000111 " of coverage criteria regulation.
Particularly, synchronous head malfunction coding device, be used on manchester encoder basis, increase respectively 6 user defined commands word/response word synchronous head SYNC1[5:0], with 6 bit data word synchronous head SYNC0[5:0] input signal, in manchester encoder, add 3 bit synchronization headrings joints, respectively when 3 corresponding 6 positions according to self-defined synchronous with input, produce synchronous head fault; When wherein, Manchester code bits per inch certificate is mapped as 2 positions.
Zero passage malfunction coding device 40, for by command word of 1553B bus data stream appointment or data word, specifies a mistake zero failure, by the constant height mode of register configuration or constant low mode.
Particularly, zero passage malfunction coding device, for on the basis of manchester encoder, increase by one 7 fault word sequential signal err_seq[6:0], one 6 position sequential signal bit_seq[5:0], high/low marking signal low_high and 7 word order counters and 6 position order counters; In Manchester's code process, when the count value of word order counter and position order counter reaches word order and a position order of input regulation by signal, locate abort situation, the high or permanent low signal of perseverance while utilizing two positions according to low_high, substitute normal Manchester's code, produced zero failure.
Data word length malfunction coding device 50, for by the data bit of command word of 1553B bus data stream appointment or data word, deletes 1,2 from position, end, or increase by 2,3 behind position, end; Wherein, delete or increase pattern and increase the content of position, by user by the self-defined configuration of register.
Particularly, data word length malfunction coding device, for the basis in manchester encoder, increases by one 7 word sequential signal err_seq[6:0], 2 bit-errors subpattern signal err_mode[1:0] and 3 self-defined signal bit_more[2:0 of unnecessary bit].According to author's preface counter status, for designated word, according to err_mode[1:0] utilize case branched program, select to delete latter 1 of 20 message signale positions, latter 2 or thereafter, increase two or three-digit, the content that increases position is passed through bit_more[2:0] self-defined.
Message-length fault and replacement instruction malfunction coding device 60, for deleting 1,2 by 1553B bus message frame ... 31 data words or increase by 1 data word, produce message-length fault; Based on same mechanism, at designated word 4us, replace user defined commands interval time simultaneously, produce replacement instruction fault.
Particularly, message-length fault and replacement instruction malfunction coding device, be comprised of 2 sub-encoders, and wherein 1 is the manchester encoder with word counter, and another 1 is individual character manchester encoder with self-defined delay.
Data break malfunction coding device 70, for specifying after a command word or data word at 1553B bus data stream, inserts User Defined interval.
Particularly, data break malfunction coding device for the basis in manchester encoder, inserts a delaying state between the Idle state of coder state machine and transmission state, is created in the phenomenon of the failure of inserting interval after specified data word; Wherein, the time of delay of delaying state is by 6 input signal Interval[5:0] configuration, specified data word is by 7 word sequential signal err_seq[6:0] configuration.
Operating lag malfunction coding device 80, for flowing the bulk delay User Defined time by 1553B bus data.
Particularly, operating lag malfunction coding device for increasing delaying state at state machine, directly increases time of delay before coding.
In the present embodiment, above-mentioned 8 encoders: be concurrency relation between manchester encoder, odd malfunction coding device, synchronous head malfunction coding device, zero passage malfunction coding device, data word length malfunction coding device, message-length fault and replacement instruction malfunction coding device, data break malfunction coding device, operating lag malfunction coding device, utilize branched program to call, form program control fault injection device.
In the present embodiment, the input signal of the external signaling interface of 1553B bus program controlled fault injection device is: reset signal, 16MHz clock signal, 16 parallel-by-bit data-signals, a 1 bit synchronization signal and 1 encoder are write data write operation marking signal, and 4 16 configuration register FJ_MODE_REG, FJ_SEQ_REG FJ_DELAY_REG, FJ_USERDEFINE.Output signal is: 1 pair of difference 1553B code signal, 1 encoder data read operation marking signal, 1 encoder busy signal.Wherein, externally the input of signaling interface is connected with 1553B total line traffic control Internet protocol IP core or chip, by changing coded system, produces various faults.
The present embodiment is for protocol malfunctions, the 1553B bus program controlled fault injection device proposing is for validity, reliability and testability checking, particularly a kind of program control fault filling method and encoder apparatus that produces 8 classification 1553B bus communication protocol faults of 1553B bus communication equipment and system.Solved conventional method and injected at 1553B bus failure the drawback problem that test process destroys bus communication process, this device adopts FPGA firmware to realize, and has versatility.Input is connected with the total line traffic control IP kernel of 1553B or chip, only by changing coded system, produces various faults, the total line traffic control IP kernel of nonintervention 1553B or chip communication function.Firmware is never called other resources such as phase-locked loop, memory, and hardware spending is little.
Below by specific embodiments and the drawings, the principle of work and power to the odd malfunction coding device in the present invention, synchronous head malfunction coding device, zero passage malfunction coding device, data word length malfunction coding device, message-length fault and replacement instruction malfunction coding device, data break malfunction coding device and operating lag malfunction coding device is introduced, and sets forth the specific implementation method of technical solution of the present invention.
1) manchester encoder
Fig. 2 is according to the structural representation of the manchester encoder of the embodiment of the present invention, as shown in Figure 2, manchester encoder, it is conventional Manchester II type encoder, it is standard 1553B even parity check Manchester II type encoder, its course of work is described as first by 16 data to be transmitted D[15:0 of input] according to odd rule, produce the 17th bit check position, then according to the synchronous head type signal SYNC of input, increase by 3 bit synchronization header encoders, form 20 Manchester II type codings.
2) odd malfunction coding device
Odd malfunction coding device, changes the odd of command word of appointment in 1553B bus data stream or data word into even parity check, and keeps the verification mode of other word constant.
Fig. 3 is according to the structural representation of the odd malfunction coding device of the embodiment of the present invention, as shown in Figure 3, odd malfunction coding device, on manchester encoder basis, increases by one 7 fault word sequence number input signal err_seq[6:0], and one 7 word order counters.In manchester encoder odd link, the judgement by word order rolling counters forward value, utilizes if-else branched program, selects strange, even parity check pattern.See accompanying drawing 2.Word order counter resets after sending frame end.
3) synchronous head malfunction coding device
Fig. 4 is according to the structural representation of the synchronous head malfunction coding device of the embodiment of the present invention, as shown in Figure 4, synchronous head encoder is on manchester encoder basis, increase respectively 6 user defined commands word/response word synchronous head SYNC1[5:0] and 6 bit data word synchronous head SYNC0[5:0] input signal, in manchester encoder, add 3 bit synchronization headring joints, in respectively when 3 corresponding 6 positions, while being mapped as 2 positions (Manchester code bits per inch according to), according to self-defined synchronous with input, produces synchronous head fault.
Synchronous head malfunction coding device, provide respectively the 6 bit synchronization header encoder User Defineds to command word/response word synchronous head " 10 " and data word synchronous head " 01 ", 5 kinds of invalid synchronous head codings in " 111100 ", " 110000 ", " 111001 ", " 011000 " and " 000111 " of coverage criteria regulation.
4) zero passage malfunction coding device
Zero passage malfunction coding device, by the mistake zero failure of one of the appointment in command word of appointment in 1553B bus data stream or data word, can pass through the constant height of register configuration or constant low mode.
Fig. 5 is according to the structural representation of the zero passage malfunction coding device of the embodiment of the present invention, as shown in Figure 5, zero passage malfunction coding device, on manchester encoder basis, increases by one 7 fault word sequential signal err_seq[6:0], one 6 position sequential signal bit_seq[5:0], high/low marking signal low_high and 7 word order counters and 6 position order counters.In Manchester's code process, when word order counter and a count value of order counter reach word order and a position order of inputting regulation by signal, can locate abort situation, high or the permanent low signal of perseverance while then utilizing two positions according to low_high substitutes normal Manchester's code, produces zero failure.
5) data word length malfunction coding device
Data word length malfunction coding device, the data bit of command word of appointment in 1553B bus data stream or data word is deleted to 1,2 or increase by 2,3 position, end from position, end, delete or increase pattern and the content that increases position are passed through the self-defined configuration of register by user.
Fig. 6 is according to the structural representation of the data word length malfunction coding device of the embodiment of the present invention, as shown in Figure 6, data word length malfunction coding device, on manchester encoder basis, increases by one 7 word sequential signal err_seq[6:0], 2 bit-errors subpattern signal err_mode[1:0] and 3 self-defined signal bit_more[2:0 of unnecessary bit].Equally, according to author's preface counter status, for designated word, according to err_mode[1:0] utilize case branched program, select to delete latter 1 of 20 message signale positions, latter 2 or thereafter, increase two or three-digit, the content that increases position is passed through bit_more[2:0] self-defined.
6) message-length fault and replacement instruction malfunction coding device
Message-length fault and replacement instruction malfunction coding device, delete 1,2 by 1553B bus message frame ... 31 data words or increase by 1 data word, produce message-length fault; Based on same mechanism, can replace user defined commands interval time at designated word 4us simultaneously, produce replacement instruction fault.
Fig. 7 is according to the structural representation of the message-length fault of the embodiment of the present invention and replacement instruction malfunction coding device, as shown in Figure 7, message-length fault and replacement instruction encoder are comprised of 2 sub-encoders, wherein 1 is the manchester encoder with word counter, and another 1 is individual character manchester encoder with self-defined delay.For message-length fault mode, it is 0 delay that order postpones individual character manchester encoder, according to by 7 input signal word_num[6:0] the given message-length of deleting, after reaching setting, word counter switches to the free time output that postpones individual character manchester encoder, thereby produce message-length and shorten fault, for many 1 word failure conditions, order postpones individual character manchester encoder and after postponing for 32 word times, replaces output, produces this fault; For replacement instruction fault, postpone the output of list manchester encoder and do delay configuration according to self-defining fault word order and delay interval.
7) data break malfunction coding device
Data break malfunction coding device is specified after a command word or data word in 1553B bus data stream, inserts User Defined interval.
Data break malfunction coding device is on manchester encoder basis, and between the Idle state of coder state machine and transmission state, inserting a new state is delaying state, realizes and after specified data word, inserts the phenomenon of the failure at interval.The time of delay of delaying state is by 6 input signal Interval[5:0] configuration, specified data word is equally by 7 word sequential signal err_seq[6:0] configuration.
8) operating lag malfunction coding device
Operating lag malfunction coding device, by the 1553B bus data stream bulk delay User Defined time.
Operating lag malfunction coding device is identical with data break malfunction coding device principle, difference is whole frame message to do bulk delay, its implementation is in state machine, to increase delaying state equally, directly increases time of delay before coding, and no longer judgement postpones insertion position.
Between above-mentioned all kinds of malfunction coding device, be concurrency relation, utilize branched program to call, form 1553B communication protocol fault and inject encoder.For specific needs, every kind of malfunction coding device can be used alone.
The program control fault injection device that the embodiment of the present invention provides, adopts FPGA firmware to realize, and has versatility.Program control fault injection device (also can be called program control fault and inject encoder) externally signaling interface is input signal: reset signal, 16MHz clock signal, 16 parallel-by-bit data-signals, a 1 bit synchronization signal and 1 encoder are write data write operation marking signal, and 4 16 configuration register FJ_MODE_REG, FJ_SEQ_REG FJ_DELAY_REG, FJ_USERDEFINE; Output signal: 1 pair of difference 1553B code signal, 1 encoder data read operation marking signal, 1 encoder busy signal.Input is connected with the total line traffic control IP kernel of 1553B or chip, only by changing coded system, produces various faults, the total line traffic control IP kernel of nonintervention 1553B or chip communication function.Firmware is never called other resources such as phase-locked loop, memory, and hardware spending is little.
Although be example object, the preferred embodiments of the present invention are disclosed, it is also possible those skilled in the art will recognize various improvement, increase and replacement, therefore, scope of the present invention should be not limited to above-described embodiment.
Claims (10)
1. a 1553B bus program controlled fault injection device, is characterized in that, described device comprises:
Manchester encoder, is Manchester II type encoder, forms 20 Manchester II type codings;
Odd malfunction coding device, for by the judgement of word order rolling counters forward value, selects odd pattern or even parity check pattern;
Synchronous head malfunction coding device, for the 6 bit synchronization header encoder User Defineds to command word/response word synchronous head " 10 " and data word synchronous head " 01 " are provided respectively, the 5 kinds of invalid synchronous head codings in " 111100 ", " 110000 ", " 111001 ", " 011000 " and " 000111 " of coverage criteria regulation;
Zero passage malfunction coding device, for by command word of 1553B bus data stream appointment or data word, specifies a mistake zero failure, by the constant height mode of register configuration or constant low mode;
Data word length malfunction coding device, for by the data bit of command word of described 1553B bus data stream appointment or data word, deletes 1,2 from position, end, or increase by 2,3 behind position, end; Wherein, delete or increase pattern and increase the content of position, by user by the self-defined configuration of register;
Message-length fault and replacement instruction malfunction coding device, for deleting 1,2 by described 1553B bus message frame ... 31 data words or increase by 1 data word, produce message-length fault; Based on same mechanism, at designated word 4us, replace user defined commands interval time simultaneously, produce replacement instruction fault;
Data break malfunction coding device, for specifying after a command word or data word at described 1553B bus data stream, inserts User Defined interval;
Operating lag malfunction coding device, for flowing the bulk delay User Defined time by described 1553B bus data.
2. device as claimed in claim 1, is characterized in that,
Described manchester encoder, for standard 1553B even parity check Manchester II type encoder, by 16 data to be transmitted D[15:0 of input] according to odd rule, produce the 17th bit check position, according to the synchronous head type signal SYNC of input, increase by 3 bit synchronization header encoders, form 20 Manchester II type codings;
Described odd malfunction coding device, for changing the odd pattern of command word of described 1553B bus data stream appointment or data word into even parity check pattern, or changes even parity check pattern into odd pattern, and keeps the checking mode of other word constant.
3. device as claimed in claim 1, is characterized in that,
Described odd malfunction coding device, on described manchester encoder basis, increases by one 7 fault word sequence number input signal err_seq[6:0], and one 7 word order counters.In the odd link of described manchester encoder, the judgement by word order rolling counters forward value, utilizes if-else branched program, selects odd pattern, even parity check pattern.
4. device as claimed in claim 1, is characterized in that,
Described synchronous head malfunction coding device, be used on described manchester encoder basis, increase respectively 6 user defined commands word/response word synchronous head SYNC1[5:0], with 6 bit data word synchronous head SYNC0[5:0] input signal, in described manchester encoder, add 3 bit synchronization headring joints, in respectively when 3 corresponding 6 positions, according to self-defined synchronous with input, produce synchronous head fault; When wherein, described Manchester code bits per inch certificate is mapped as 2 positions.
5. device as claimed in claim 1, is characterized in that,
Described zero passage malfunction coding device, for on the basis of described manchester encoder, increase by one 7 fault word sequential signal err_seq[6:0], one 6 position sequential signal bit_seq[5:0], high/low marking signal low_high and 7 word order counters and 6 position order counters; In described Manchester's code process, when word order counter and a count value of order counter reach word order and a position order of inputting regulation by signal, location abort situation, high or the permanent low signal of perseverance while utilizing two positions according to described low_high, substitute normal Manchester's code, produced zero failure.
6. device as claimed in claim 1, is characterized in that,
Described data word length malfunction coding device, for on the basis of described manchester encoder, increase by one 7 word sequential signal err_seq[6:0], 2 bit-errors subpattern signal err_mode[1:0] and 3 self-defined signal bit_more[2:0 of unnecessary bit]; According to author's preface counter status, for designated word, according to described err_mode[1:0] utilize case branched program, select to delete latter 1 of 20 message signale positions, latter 2 or thereafter, increase two or three-digit, increase the content of position by described bit_more[2:0] self-defined.
7. device as claimed in claim 1, is characterized in that,
Described message-length fault and replacement instruction malfunction coding device, be comprised of 2 sub-encoders, and wherein 1 is the manchester encoder with word counter, and another 1 is individual character manchester encoder with self-defined delay.
8. device as claimed in claim 1, is characterized in that,
Described data break malfunction coding device for the basis in described manchester encoder, inserts a delaying state between the Idle state of coder state machine and transmission state, is created in the phenomenon of the failure of inserting interval after specified data word; Wherein, the time of delay of described delaying state is by 6 input signal Interval[5:0] configuration, specified data word is by 7 word sequential signal err_seq[6:0] configuration.
9. device as claimed in claim 1, is characterized in that,
Described operating lag malfunction coding device for increasing delaying state at state machine, directly increases time of delay before coding.
10. install as claimed in any one of claims 1-9 wherein, it is characterized in that, between described manchester encoder, described odd malfunction coding device, described synchronous head malfunction coding device, described zero passage malfunction coding device, described data word length malfunction coding device, described message-length fault and replacement instruction malfunction coding device, described data break malfunction coding device, described operating lag malfunction coding device, it is concurrency relation, utilize branched program to call, form described program control fault injection device;
The input signal of the external signaling interface of described program control fault injection device is: reset signal, 16MHz clock signal, 16 parallel-by-bit data-signals, a 1 bit synchronization signal and 1 encoder are write data write operation marking signal, and 4 16 configuration register FJ_MODE_REG, FJ_SEQ_REGFJ_DELAY_REG, FJ_USERDEFINE;
Output signal is: 1 pair of difference 1553B code signal, 1 encoder data read operation marking signal, 1 encoder busy signal; Wherein, the input of described external signaling interface is connected with 1553B total line traffic control Internet protocol IP core or chip, by changing coded system, produces various faults.
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| CN104331351A (en) * | 2014-10-23 | 2015-02-04 | 东南大学成贤学院 | Method for simulating link instruction errors in USB (universal serial bus) transmission process |
| CN104866400A (en) * | 2015-05-20 | 2015-08-26 | 中国空间技术研究院 | Method for verifying protocol control function of 1553B bus controller |
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| CN107710184A (en) * | 2015-07-15 | 2018-02-16 | 密克罗奇普技术公司 | SPI interface having less than the bytes of eight and variable packets size |
| CN105406943A (en) * | 2015-10-30 | 2016-03-16 | 西北工业大学 | High-integrity coding method of 1553B bus |
| CN105406943B (en) * | 2015-10-30 | 2018-06-12 | 西北工业大学 | A kind of high integrality coding method of 1553B buses |
| CN107368408A (en) * | 2017-05-31 | 2017-11-21 | 中国船舶工业综合技术经济研究院 | A kind of software fault towards interface injects automated testing method |
| CN107219843A (en) * | 2017-06-19 | 2017-09-29 | 哈尔滨工业大学 | The fault-signal analogue means of MIL STD 1553B bus nodes based on arbitrary-function generator |
| CN109344019B (en) * | 2018-09-21 | 2021-09-10 | 北京计算机技术及应用研究所 | System and method for semi-automatically testing 1553B protocol universal interface based on SOPC system |
| CN109344019A (en) * | 2018-09-21 | 2019-02-15 | 北京计算机技术及应用研究所 | 1553B agreement general-purpose interface semi-automation test macro and method based on SOPC system |
| CN109802761A (en) * | 2019-02-26 | 2019-05-24 | 北京润科通用技术有限公司 | A kind of fault recognition method and device |
| CN109802761B (en) * | 2019-02-26 | 2021-07-23 | 北京润科通用技术有限公司 | Fault identification method and device |
| CN110989427A (en) * | 2019-11-19 | 2020-04-10 | 中国航空工业集团公司西安航空计算技术研究所 | Fault detection and health management method for multiprocessor computer |
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