CN103683921A - Control method and control device for staggering interconnection booster circuit - Google Patents
Control method and control device for staggering interconnection booster circuit Download PDFInfo
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- CN103683921A CN103683921A CN201310676441.9A CN201310676441A CN103683921A CN 103683921 A CN103683921 A CN 103683921A CN 201310676441 A CN201310676441 A CN 201310676441A CN 103683921 A CN103683921 A CN 103683921A
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Abstract
The embodiment of the invention discloses a control method for a staggering interconnection booster circuit. The method is used for controlling switching tubes in the staggering interconnection booster circuit. The method comprises the steps of controlling the first switching tube to change from a turn-off state to a turn-on state at the first moment, controlling the second switching tube to change from a turn-off state to a turn-on state when mutual inductance currents of a second coupling inductor to a first coupling inductor are lowered to be zero, and controlling the first switching tube and the second switching tube to change from the turn-on state to the turn-off state after the first time period is delayed. The embodiment of the invention further provides a control device for the staggering interconnection booster circuit. According to the method and the device, within a certain time period, the two switching tubes of the circuit are conducted at the same time, the conduction loss of the switching tubes and a diode can be lowered, and the overall efficiency of the circuit is improved.
Description
Technical field
The present invention relates to uninterrupted power supply technical field, particularly relate to a kind of control method and control device of staggered interconnected booster circuit.
Background technology
Current on line type UPS (Uninterrupted Power Supply, uninterrupted power supply) mostly adopt AC-DC(Alternating Current-Direct Current, AC-DC), DC-AC(Direct Current-Alternating Current, DC-AC) topological structure, wherein AC-DC generally adopts APFC(Active Power Factor Correction, Active Power Factor Correction) mode.Conventional circuit of power factor correction is that boost(boosts at present) circuit.
With reference to Fig. 1, it is the structure chart of typical staggered interconnected booster circuit.As shown in Figure 1, this circuit is coupled inductance L 1 and L2, and switching tube Q1 and Q2 alternately open shutoff.Owing to there is coupling leakage inductance L11 and L21, when switching tube turn-offs, the electric current of diode D1 and D2 is slowly kept to 0, does not have reverse recovery loss.And when switching tube is opened, due to the existence of leakage inductance, switching tube is that no-voltage is open-minded, the turn-on consumption of switching tube is 0.Therefore, the whole efficiency of staggered interconnected boost circuit is higher.
But, the control method of existing boost circuit, all that control switch pipe Q1 and Q2 alternately open shutoff, be synchronization, switching tube Q1 and Q2 only have a pipe open-minded at the most, and inductance L M electric current all flows through, and make the utilance of device lower, the conduction loss of its switching tube and turn-off power loss are all higher, affect the whole efficiency of circuit.
Summary of the invention
The embodiment of the present invention provides a kind of control method and control device of staggered interconnected booster circuit, can realize within a certain period of time, the conductings simultaneously of two switching tubes of this circuit, reduce the conduction loss of switching tube and diode, the whole efficiency of raising circuit thus.
On the one hand, provide a kind of control method of staggered interconnected booster circuit, described circuit comprises: the first coupling inductance, the second coupling inductance, the first switching tube, second switch pipe, the first diode, the second diode;
After the Same Name of Ends short circuit of the Same Name of Ends of described the first coupling inductance and described the second coupling inductance, connect together the positive input terminal of described circuit;
The first end of the first switching tube and the anode of described the first diode described in the different name termination of described the first coupling inductance; The negative input end of circuit described in the second termination of described the first switching tube; The negative electrode of described the first diode connects the positive output end of described circuit;
The first end of second switch pipe and the anode of described the second diode described in the different name termination of described the second coupling inductance; The negative input end of circuit described in the second termination of described second switch pipe; The negative electrode of described the second diode connects the positive output end of described circuit;
Described control method comprises:
In first moment, control described the first switching tube and become opening state from off state;
When described the second coupling inductance reduces to zero to the mutual inductance electric current of described the first coupling inductance, control described second switch pipe and become opening state from shutoff;
Postpone, after very first time section, to control described the first switching tube and second switch pipe and in succession from opening state, become off state.
In the possible implementation of the first of first aspect, described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
In conjunction with the possible implementation of the first of first aspect and first aspect, in the possible implementation of the second of first aspect, after described delay very first time section, control described the first switching tube and second switch pipe and in succession from opening state, become off state and be:
Postpone, after very first time section, to control described the first switching tube and become off state from opening state;
Control again described second switch pipe and become off state from opening state.
In conjunction with first aspect, in the third possible implementation of first aspect, described method also comprises:
Postpone after the second time period, control described second switch pipe and become opening state from off state;
When described the first coupling inductance reduces to zero to the mutual inductance electric current of described the second coupling inductance, control described the first switching tube and become opening state from shutoff;
Delay control, after three time periods, is controlled described the first switching tube and second switch pipe and in succession from opening state, is become off state.
In conjunction with the third possible implementation of first aspect, in the 4th kind of possible implementation of first aspect,
Described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit;
Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
In conjunction with the third and the 4th kind of possible implementation of first aspect, in the 5th kind of possible implementation of first aspect, after described delay very first time section, control described the first switching tube and second switch pipe and in succession from opening state, become off state and be:
Postpone, after very first time section, to control described second switch pipe and become off state from opening state;
Control again described the first switching tube and become off state from opening state.
In conjunction with the 5th kind of possible implementation of first aspect, in the 6th kind of possible implementation of first aspect, described delay control is after three time periods, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state and be:
Delay control, after three time periods, is controlled described the first switching tube and is become off state from opening state;
Control again described second switch pipe and become off state from opening state.
Second aspect, provides a kind of control device of staggered interconnected booster circuit, and described circuit comprises: the first coupling inductance, the second coupling inductance, the first switching tube, second switch pipe, the first diode, the second diode;
After the Same Name of Ends short circuit of the Same Name of Ends of described the first coupling inductance and described the second coupling inductance, connect together the positive input terminal of described circuit;
The first end of the first switching tube and the anode of described the first diode described in the different name termination of described the first coupling inductance; The negative input end of circuit described in the second termination of described the first switching tube; The negative electrode of described the first diode connects the positive output end of described circuit;
The first end of second switch pipe and the anode of described the second diode described in the different name termination of described the second coupling inductance; The negative input end of circuit described in the second termination of described second switch pipe; The negative electrode of described the second diode connects the positive output end of described circuit;
Described control device comprises:
The first control unit, in first moment, controls described the first switching tube and becomes opening state from off state;
The second control unit, for when described the second coupling inductance reduces to zero to the mutual inductance electric current of described the first coupling inductance, controls described second switch pipe and becomes opening state from shutoff;
The 3rd control unit, for postponing after very first time section, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state.
In the possible implementation of the first of second aspect, described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
In the possible implementation of the second of second aspect, described device also comprises:
The 4th control unit, for postponing after the second time period, controls described second switch pipe and becomes opening state from off state;
The 5th control unit, for when described the first coupling inductance reduces to zero to the mutual inductance electric current of described the second coupling inductance, controls described the first switching tube and becomes opening state from shutoff;
The 6th control unit,, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state after three time periods for delay control.
In conjunction with the possible implementation of the second of second aspect, in the third possible implementation of second aspect, described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit;
Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
Compared with prior art, control method and device described in the embodiment of the present invention, can make: in the certain hour section in a complete switch periods, described the first switching tube and second switch pipe can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.And in the embodiment of the present invention, it is open-minded that described the first switching tube and second switch pipe are no-voltage, its turn-on consumption is zero, and described the first diode and the second diode do not have reverse recovery loss.Hence one can see that, and control method and device described in the embodiment of the present invention can effectively reduce the turn-on consumption of switching tube and diode, improve the whole efficiency of circuit.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structure chart of typical staggered interconnected booster circuit;
Fig. 2 is the equivalent circuit diagram of staggered interconnected booster circuit shown in Fig. 1;
Fig. 3 is the flow chart of the control method of staggered interconnected booster circuit described in the embodiment of the present invention one;
Fig. 4 is circuit working logic and the current waveform figure of control method described in the embodiment of the present invention one;
Fig. 5 is the flow chart of the control method of staggered interconnected booster circuit described in the embodiment of the present invention two;
Fig. 6 is circuit working logic and the current waveform figure of control method described in the embodiment of the present invention two;
Fig. 7 is the structure chart of the control device of staggered interconnected booster circuit described in the embodiment of the present invention one;
Fig. 8 is the structure chart of the control device of staggered interconnected booster circuit described in the embodiment of the present invention two.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out to clear, complete description, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The embodiment of the present invention provides a kind of control method and control device of staggered interconnected booster circuit, can realize within a certain period of time, the conductings simultaneously of two switching tubes of this circuit, reduce the conduction loss of switching tube and diode, the whole efficiency of raising circuit thus.
Shown in Fig. 1, typically staggered interconnected booster circuit comprises: the first coupling inductance L1, the second coupling inductance L2, the first switching tube Q1, second switch pipe Q2, the first diode D1, the second diode D2, capacitor C o and resistance R L.
Wherein, described the first coupling inductance L1 and the second coupling inductance L2 are in parallel.Concrete, after the Same Name of Ends short circuit of the Same Name of Ends of described the first coupling inductance L1 and described the second coupling inductance L2, connect together the positive input terminal of described circuit.
The first end of the first switching tube Q1 and the anode of described the first diode D1 described in the different name termination of described the first coupling inductance L1; The negative input end of circuit described in the second termination of described the first switching tube Q1; The negative electrode of described the first diode D1 connects the positive output end of described circuit.
The first end of second switch pipe Q2 and the anode of described the second diode D2 described in the different name termination of described the second coupling inductance L2; The negative input end of circuit described in the second termination of described second switch pipe Q2; The negative electrode of described the second diode D2 connects the positive output end of described circuit.
Described capacitor C o and resistance R L are also connected between the positive output end and negative output terminal of described circuit.
It should be noted that, in the embodiment of the present invention, described the first switching tube Q1 is identical with second switch pipe Q2 structure.In actual applications, described the first switching tube Q1 and second switch pipe Q2 can have multiple choices, for example can adopt IGBT(Insulated Gate Bipolar Transistor, insulated gate bipolar transistor) or MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor, metal-oxide half field effect transistor).In embodiment of the present invention Fig. 1, be to take IGBT to describe as example.
When adopting IGBT, described in each, switching tube includes a triode and a diode; The collector electrode of described triode and the negative electrode of described diode join, and form the first end of described switching tube; The emitter of described triode and the anode of described diode join, and form the second end of described switching tube.
When adopting MOSFET, described in each, switching tube includes a metal-oxide-semiconductor and a diode; The source electrode of described metal-oxide-semiconductor and the negative electrode of described diode join, and form the first end of described switching tube; The drain electrode of described metal-oxide-semiconductor and the anode of described diode join, and form the second end of described switching tube.
Known in conjunction with Fig. 1, the positive input terminal of described circuit and negative input end receive input voltage Uin; The positive output end of described circuit and negative output terminal output voltage U o.
Referring to Fig. 2, it is the equivalent circuit diagram of staggered interconnected booster circuit shown in Fig. 1.Known in conjunction with Fig. 1 and Fig. 2, described the first coupling inductance L1 and the second coupling inductance L2 can be equivalent to: the first inductance L M, the first mutual inductance L11 and the second mutual inductance L21.Wherein, the positive input terminal of circuit described in the first termination of described the first inductance L M, the first end of the first mutual inductance L11 and the first end of the second mutual inductance L21 described in the second termination of described the first inductance L M; The first end of the first switching tube Q1 described in the second termination of described the first mutual inductance L11; The first end of second switch pipe Q2 described in the second termination of described the second mutual inductance L21.
Described in the embodiment of the present invention, the core thinking of the control method of staggered interconnected booster circuit is: in the certain hour section in a control cycle, control described the first switching tube Q1 and second switch pipe Q2 conducting simultaneously, can reduce the conduction loss of switching tube and diode thus, improve the whole efficiency of circuit.
With reference to Fig. 3, it is the flow chart of the control method of staggered interconnected booster circuit described in the embodiment of the present invention one.As shown in Figure 3, described method comprises the steps:
301: in first moment, control described the first switching tube Q1 and become opening state from off state.
302: when described the second coupling inductance L2 reduces to zero to the mutual inductance electric current of described the first coupling inductance L1, control described second switch pipe Q2 and become opening state from shutoff.
303: postpone, after very first time section, to control described the first switching tube Q1 and second switch pipe Q2 and in succession from opening state, become off state.
Visible, control method described in the embodiment of the present invention one, can make: in the very first time section in a complete switch periods, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.Make thus, control method described in the embodiment of the present invention, can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
In the embodiment of the present invention one, described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
It should be noted that, in step 303, after described delay very first time section, controlling described the first switching tube Q1 and second switch pipe Q2 in succession becomes off state from opening state and is specifically as follows: postpone after very first time section, first control described the first switching tube Q1 and become off state from opening state, then control described second switch pipe Q2 and become off state from opening state then.
Concrete, with reference to Fig. 4, be circuit working logic and the current waveform figure of control method described in the embodiment of the present invention one.Wherein, Fig. 4 comprises the working timing figure of the first switching tube Q1, second switch pipe Q2, the first diode D1, the second diode D2, and i in first inductance L M(Fig. 4
lM), iL in first mutual inductance L11(Fig. 4
11) and second inductance L 21(Fig. 4 in i
l21) current waveform figure.In Fig. 4, abscissa is time shaft.
As shown in Figure 4, t0 to t6 is a complete switch periods, below in conjunction with Fig. 2 and Fig. 4, control method described in the embodiment of the present invention one is described in detail.
The initial condition of described circuit is: described the first switching tube Q1 and second switch pipe Q2 all turn-off, and on described the first inductance L M and the second mutual inductance L21, has electric current, on the first mutual inductance L11, there is no electric current; Now, the electric current on described the first inductance L M and the electric current on the second mutual inductance L21 are equal, and the second diode D2 is in forward conduction state, and the first diode D1 is in reverse blocking state.
(1) t0～t1: at t0 constantly, control described the first switching tube Q1 and become opening state from off state.
In this stage, described the first switching tube Q1 is open-minded, and described second switch pipe Q2 is still in off state.Now, electric current flow to the negative input end of described circuit by the positive input terminal of described circuit through described the first inductance L M, the first mutual inductance L11, the first switching tube Q1.Electric current (iL11) on described the first mutual inductance L11 and the first switching tube Q1 starts to rise.
Due to described the first mutual inductance L11 and the first switching tube Q1 series connection, described the first switching tube Q1 is that no-voltage is open-minded while opening, and its turn-on consumption is zero.
Now, the back-pressure of admitting on described the second mutual inductance L21 increases, and the electric current flowing through on the second mutual inductance L21 and the second diode D2 accelerates to reduce.At t1 constantly, the electric current (iL21) and the electric current on the second diode D2 that flow through on the second mutual inductance L21 are reduced to zero, described the second diode D2 becomes cut-off state, now, electric current (iLM) on the first inductance L M starts to rise, due to the slow vanishing of electric current on the second diode D2, so the second diode D2 does not have reverse recovery loss.
(2) t1～t2: described the first switching tube Q1 keeps opening state, and described second switch pipe Q2 keeps off state.
Now, described the first mutual inductance L11(iL11) electric current on continues to increase, and the electric current (iL21) on described the second mutual inductance L21 is zero, and the electric current (iLM) on the first inductance L M continues to increase.
(3) t2～t3: at t2 constantly, control described second switch pipe Q2 and become opening state from off state, described the first switching tube Q1 keeps opening state.
Due to described the first mutual inductance L11 and the second mutual inductance L21 parallel connection, the electric current (iL21) on described the second mutual inductance L21 and the electric current (iL11) on the first mutual inductance L11 synchronously increase, and the current increases slope on described the first mutual inductance L11 diminishes.At t2 constantly, when described second switch pipe Q2 opens, because described second switch pipe Q2 connects with described the second mutual inductance L21, described second switch pipe Q2 is that no-voltage is open-minded, and its turn-on consumption is zero.
(4) t3～t4: at t3 constantly, control described the first switching tube Q1 and become off state from opening state, described second switch pipe Q2 keeps opening state.
Now, the electric current of described the first mutual inductance L11 (iL11) is by described the first diode D1 afterflow, and current i L11 reduces.At t4 constantly, current i L11 is reduced to zero.Meanwhile, the electric current of the second mutual inductance L21 (iL21) increases fast, and the electric current of the first inductance L M (iLM) increases.At t4 constantly, the electric current (iLM) of the electric current of described the second mutual inductance L21 (iL21) and described the first inductance L M is consistent.Described the first diode D1 opened after a period of time, and the electric current on described the first diode D1, along with current i L11 is decreased to zero, the first diode D1 is turn-offed, and described the first diode does not have reverse recovery loss.
(5) t4～t5: described second switch pipe Q2 keeps opening state, described the first switching tube Q1 keeps off state.
Now, the electric current of described the second mutual inductance L21 (iL21) continues to increase, and the electric current of described the first mutual inductance L11 (iL11) is zero, and the electric current of described the first inductance L M (iLM) continues to increase.
(6) t5～t6: at t5 constantly, control described second switch pipe Q2 and become off state from opening state, described the first switching tube Q1 keeps off state.
Because described second switch pipe Q2 turn-offs, the electric current of described the second mutual inductance L21 (iL21) is by described the second diode D2 afterflow, described the second diode D2 is open-minded, and the electric current (iLM) of the electric current of described the second mutual inductance L21 (iL21) and described the first inductance L M starts to reduce.Because the shutoff of described second switch pipe Q2 is hard shutoff, there is turn-off power loss.
From the above, for one of described circuit complete switch periods (t0～t6), at t2 to t3 in the time period, described the first switching tube Q1 and second switch pipe Q2 are all in opening state, now, described the first switching tube Q1 and second switch pipe Q2, in relation in parallel, have electric current to flow through on it.
It should be noted that, shown in Fig. 4, in the embodiment of the present invention one, described the first switching tube Q1 is first open-minded, and when the electric current (iL21) of the second mutual inductance L21 reduces to 0, described second switch pipe Q2 is also open-minded, and at (t3-t2) in the time period, described the first switching tube Q1 and second switch pipe Q2 are all in opening state, and then at t3 constantly, described the first switching tube Q1 and second switch pipe Q2 turn-off in succession.
The described time period (t3-t2) meets: (t3-t2)/T=DR.Wherein, the switch periods that T is this circuit; DR is the duty ratio of this circuit.
The duty ratio DR of described circuit can be according to the occurrence of the input voltage of this circuit and output voltage, and the factors such as load of this circuit are specifically set.
Known in conjunction with Fig. 4, at t0 to t2, in the time period, described the first switching tube Q1 and second switch pipe Q2 are in succession open-minded; At t3 to t5, in the time period, described the first switching tube Q1 and second switch pipe Q2 turn-off in succession.There is the operating characteristic of switching device known, described time period (t2-t1) and (t5-t3) time time period are very short, be the switching frequency by switching device, for example, when switching device moves, required switch surplus determines, generally this time period is less than 5% of this contactor cycle T.
In the prior art, synchronization only has a switching tube open-minded, and all electric currents can only flow through from the switching tube of opening.By comparison, in the embodiment of the present invention one, in very first time section, when described the first switching tube Q1 and second switch pipe Q2 all open, the two parallel connection, shares total current, while making each switching tube (the first switching tube Q1 or second switch pipe Q2) conducting, the electric current flowing through on it reduces, and then conduction loss is less.And in the embodiment of the present invention, it is open-minded that described the first switching tube Q1 and second switch pipe Q2 are no-voltage, its turn-on consumption is zero, and described the first diode D1 and the second diode D2 do not have reverse recovery loss.
Therefore, control method described in the embodiment of the present invention one, can make, in certain hour section in a complete switch periods, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.And in the embodiment of the present invention, it is open-minded that described the first switching tube Q1 and second switch pipe Q2 are no-voltage, its turn-on consumption is zero, and described the first diode D1 and the second diode D2 do not have reverse recovery loss.Hence one can see that, and control method described in the embodiment of the present invention can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
With reference to Fig. 5, it is the flow chart of the control method of staggered interconnected booster circuit described in the embodiment of the present invention two.As shown in Figure 5, described method comprises the steps:
501: in first moment, control described the first switching tube Q1 and become opening state from off state.
502: when described the second coupling inductance L2 reduces to zero to the mutual inductance electric current of described the first coupling inductance L1, control described second switch pipe Q2 and become opening state from shutoff.
503: postpone, after very first time section, to control described the first switching tube Q1 and second switch pipe Q2 and in succession from opening state, become off state.
504: postpone, after the second time period, to control described second switch pipe Q2 and become opening state from off state.
505: when described the first coupling inductance L1 reduces to zero to the mutual inductance electric current of described the second coupling inductance L2, control described the first switching tube Q1 and become opening state from shutoff.
506: delay control, after three time periods, is controlled described the first switching tube Q1 and second switch pipe Q2 and in succession from opening state, become off state.
Visible, control method described in the embodiment of the present invention two, can make: the very first time section in a complete switch periods and in the 3rd time period, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.Make thus, control method described in the embodiment of the present invention, can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
In the embodiment of the present invention two, described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit.Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
It should be noted that, in step 503, after described delay very first time section, controlling described the first switching tube and second switch pipe in succession becomes off state from opening state and is: postpone after very first time section, first, control described second switch pipe and become off state from opening state, then, then control described the first switching tube and become off state from opening state.
In step 506, described delay control is after three time periods, controlling described the first switching tube and second switch pipe in succession becomes off state from opening state and is: delay control is after three time periods, first, control described the first switching tube and become off state from opening state, then control described second switch pipe and become off state from opening state then.
With reference to Fig. 6, be circuit working logic and the current waveform figure of control method described in the embodiment of the present invention two.Wherein, Fig. 6 comprises the working timing figure of the first switching tube Q1, second switch pipe Q2, the first diode D1, the second diode D2, and i in first inductance L M(Fig. 6
lM), iL in first mutual inductance L11(Fig. 6
11) and second inductance L 21(Fig. 6 in i
l21) current waveform figure.In Fig. 6, abscissa is time shaft.
As shown in Figure 6, t0 to t12 is a complete switch periods, below in conjunction with Fig. 2 and Fig. 6, control method described in the embodiment of the present invention two is described in detail.
The initial condition of described circuit is: described the first switching tube Q1 and second switch pipe Q2 all turn-off, and on described the first inductance L M and the second mutual inductance L21, has electric current, on the first mutual inductance L11, there is no electric current; Now, the electric current on described the first inductance L M and the electric current on the second mutual inductance L21 are equal, and the second diode D2 is in forward conduction state, and the first diode D1 is in reverse blocking state.
(1) t0～t1: at t0 constantly, control described the first switching tube Q1 and become opening state from off state.
In this stage, described the first switching tube Q1 is open-minded, and described second switch pipe Q2 is still in off state.Now, electric current flow to the negative input end of described circuit by the positive input terminal of described circuit through described the first inductance L M, the first mutual inductance L11, the first switching tube Q1.Electric current (iL11) on described the first mutual inductance L11 and the first switching tube Q1 starts to rise.
Due to described the first mutual inductance L11 and the first switching tube Q1 series connection, described the first switching tube Q1 is that no-voltage is open-minded while opening, and its turn-on consumption is zero.
Now, the back-pressure of admitting on described the second mutual inductance L21 increases, and the electric current flowing through on the second mutual inductance L21 and the second diode D2 accelerates to reduce.At t1 constantly, the electric current (iL21) and the electric current on the second diode D2 that flow through on the second mutual inductance L21 are reduced to zero, described the second diode D2 becomes cut-off state, now, electric current (iLM) on the first inductance L M starts to rise, due to the slow vanishing of electric current on the second diode D2, so the second diode D2 does not have reverse recovery loss.
(2) t1～t2: described the first switching tube Q1 keeps opening state, and described second switch pipe Q2 keeps off state.
Now, described the first mutual inductance L11(iL11) electric current on continues to increase, and the electric current (iL21) on described the second mutual inductance L21 is zero, and the electric current (iLM) on the first inductance L M continues to increase.
(3) t2～t3: at t2 constantly, control described second switch pipe Q2 and become opening state from off state, described the first switching tube Q1 keeps opening state.
Due to described the first mutual inductance L11 and the second mutual inductance L21 parallel connection, the electric current (iL21) on described the second mutual inductance L21 and the electric current (iL11) on the first mutual inductance L11 synchronously increase, and the current increases slope on described the first mutual inductance L11 diminishes.At t2 constantly, when described second switch pipe Q2 opens, because described second switch pipe Q2 connects with described the second mutual inductance L21, described second switch pipe Q2 is that no-voltage is open-minded, and its turn-on consumption is zero.
(4) t3～t4: at t3 constantly, control described second switch pipe Q2 and become off state from opening state, described the first switching tube Q1 keeps opening state.
Now, the electric current of described the first mutual inductance L11 (iL11) is by described the first diode D1 afterflow, and current i L11 reduces.At t4 constantly, current i L11 is reduced to zero.Meanwhile, the electric current of the second mutual inductance L21 (iL21) increases fast, and the electric current of the first inductance L M (iLM) increases.At t4 constantly, the electric current (iLM) of the electric current of described the second mutual inductance L21 (iL21) and described the first inductance L M is consistent.Described the first diode D1 opened after a period of time, and the electric current on described the first diode D1, along with current i L11 is decreased to zero, the first diode D1 is turn-offed, and described the first diode does not have reverse recovery loss.
(5) t4～t5: described the first switching tube Q1 keeps opening state, and described second switch pipe Q2 keeps off state.
Now, the electric current of described the first mutual inductance L11 (iL11) continues to increase, and the electric current of described the second mutual inductance L21 (iL21) is zero, and the electric current of described the first inductance L M (iLM) continues to increase.
(6) t5～t6: at t5 constantly, control described the first switching tube Q1 and become off state from opening state, described second switch pipe Q2 keeps off state.
Because described the first switching tube Q1 turn-offs, the electric current of described the first inductance L M (iLM) is by described the first diode D1 afterflow, described the first diode D1 is open-minded, and the electric current (iLM) of the electric current of described the first mutual inductance L11 (iL11) and described the first inductance L M starts to reduce.Because the shutoff of described the first switching tube Q1 is hard shutoff, there is turn-off power loss.
(7) t6～t7: control described second switch pipe Q2 and become opening state from off state.
In this stage, described second switch pipe Q2 is open-minded, and described the first switching tube Q1 is still in off state.Now, electric current flow to the negative input end of described circuit by the positive input terminal of described circuit through described the first inductance L M, the second mutual inductance L21, second switch pipe Q2.Electric current (iL21) on described the first mutual inductance L21 and second switch pipe Q2 starts to rise.
Due to described the second mutual inductance L21 and second switch pipe Q2 series connection, described second switch pipe Q2 is that no-voltage is open-minded while opening, and its turn-on consumption is zero.
Now, the back-pressure of admitting on described the first mutual inductance L11 increases, and the electric current flowing through on the first mutual inductance L11 and the first diode D1 accelerates to reduce.At t7 constantly, the electric current (iL11) and the electric current on the first diode D1 that flow through on the first mutual inductance L11 are reduced to zero, described the first diode D1 becomes cut-off state, now, electric current (iLM) on the first inductance L M starts to rise, due to the slow vanishing of electric current on the first diode D1, so the first diode D1 does not have reverse recovery loss.
(8) t7～t8: described second switch pipe Q2 keeps opening state, described the first switching tube Q1 keeps off state.
Now, described the second mutual inductance L21(iL21) electric current on continues to increase, and the electric current (iL11) on described the first mutual inductance L11 is zero, and the electric current (iLM) on the first inductance L M continues to increase.
(9) t8～t9: at t8 constantly, control described the first switching tube Q1 and become opening state from off state, described second switch pipe Q2 keeps opening state.
Due to described the first mutual inductance L11 and the second mutual inductance L21 parallel connection, the electric current (iL11) on described the first mutual inductance L11 and the electric current (iL21) on the second mutual inductance L21 synchronously increase, and the current increases slope on described the second mutual inductance L21 diminishes.At t8 constantly, when described the first switching tube Q1 opens, because described the first switching tube Q1 connects with described the first mutual inductance L11, described the first switching tube Q1 is that no-voltage is open-minded, and its turn-on consumption is zero.
(10) t9～t10: at t9 constantly, control described the first switching tube Q1 and become off state from opening state, described second switch pipe Q2 keeps opening state.
Now, the electric current of described the first mutual inductance L11 (iL11) is by described the first diode D1 afterflow, and current i L11 reduces.At t10 constantly, current i L11 is reduced to zero.Meanwhile, the electric current of the second mutual inductance L21 (iL21) increases fast, and the electric current of the first inductance L M (iLM) increases.At t10 constantly, the electric current (iLM) of the electric current of described the second mutual inductance L21 (iL21) and described the first inductance L M is consistent.Described the first diode D1 opened after a period of time, and the electric current on described the first diode D1, along with current i L11 is decreased to zero, the first diode D1 is turn-offed, and described the first diode does not have reverse recovery loss.
(11) t10～t11: described second switch pipe Q2 keeps opening state, described the first switching tube Q1 keeps off state.
Now, the electric current of described the second mutual inductance L21 (iL21) continues to increase, and the electric current of described the first mutual inductance L11 (iL11) is zero, and the electric current of described the first inductance L M (iLM) continues to increase.
(12) t11～t12: at t:11 constantly, control described second switch pipe Q2 and become off state from opening state, described the first switching tube Q1 keeps off state.
Because described second switch pipe Q2 turn-offs, the electric current of described the second mutual inductance L21 (iL21) is by described the second diode D2 afterflow, described the second diode D2 is open-minded, and the electric current (iLM) of the electric current of described the second mutual inductance L21 (iL21) and described the first inductance L M starts to reduce.Because the shutoff of described second switch pipe Q2 is hard shutoff, there is turn-off power loss.
From the above, for one of described circuit complete switch periods (t0～t12), at t2 to t3 and t8 to t9 in the time period, described the first switching tube Q1 and second switch pipe Q2 are all in opening state, now, described the first switching tube Q1 and second switch pipe Q2, in relation in parallel, have electric current to flow through on it.
It should be noted that, shown in Fig. 6, in the embodiment of the present invention two, described the first switching tube Q1 is first open-minded, and when the electric current (iL21) of the second mutual inductance L21 reduces to 0, described second switch pipe Q2 is also open-minded, and at (t3-t2) in the time period, described the first switching tube Q1 and second switch pipe Q2 are all in opening state, and then at t3 constantly, described the first switching tube Q1 and second switch pipe Q2 turn-off in succession.
Then, through certain hour, described second switch pipe Q2 is open-minded again, when the electric current (iL11) of the first mutual inductance L11 reduces to 0, described the first switching tube Q1 is also open-minded, and at (t9-t8) in the time period, described the first switching tube Q1 and second switch pipe Q2 are all in opening state, then at t9 constantly, described second switch pipe Q2 and the first switching tube Q1 turn-off in succession.
The described time period (t3-t2) and (t9-t8) satisfied: (t3-t2+t9-t8)/T=DR.Wherein, the switch periods that T is this circuit; DR is the duty ratio of this circuit.
Known in conjunction with Fig. 6, at t0 to t2, in the time period, described the first switching tube Q1 and second switch pipe Q2 are in succession open-minded; At t3 to t5, in the time period, described the first switching tube Q1 and second switch pipe Q2 turn-off in succession.There is the operating characteristic of switching device known, described time period (t2-t1) and (t5-t3) time time period are very short, be the switching frequency by switching device, for example, when switching device moves, required switch surplus determines, generally this time period is less than 5% of this contactor cycle T.
Same, at t6 to t8, in the time period, described second switch pipe Q2 and the first switching tube Q1 are in succession open-minded; At t9 to t11, in the time period, described second switch pipe Q2 and the first switching tube Q1 turn-off in succession.There is the operating characteristic of switching device known, described time period (t8-t6) and (t11-t9) time time period are very short, be the switching frequency by switching device, for example, when switching device moves, required switch surplus determines, generally this time period is less than 5% of this contactor cycle T.
In the prior art, synchronization only has a switching tube open-minded, and all electric currents can only flow through from the switching tube of opening.By comparison, in the embodiment of the present invention two, in certain hour section, when described the first switching tube Q1 and second switch pipe Q2 all open, the two parallel connection, shares On current, while making each switching tube (the first switching tube Q1 or second switch pipe Q2) conducting, the electric current flowing through on it reduces, and then current value conduction loss is less.And in the embodiment of the present invention, it is open-minded that described the first switching tube Q1 and second switch pipe Q2 are no-voltage, its turn-on consumption is zero, and described the first diode D1 and the second diode D2 do not have reverse recovery loss.
Therefore, control method described in the embodiment of the present invention two, can make, in certain hour section in a complete switch periods, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.And in the embodiment of the present invention, it is open-minded that described the first switching tube Q1 and second switch pipe Q2 are no-voltage, its turn-on consumption is zero, and described the first diode D1 and the second diode D2 do not have reverse recovery loss.Hence one can see that, and control method described in the embodiment of the present invention can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
Visible in conjunction with Fig. 3 and Fig. 4, the embodiment of the present invention two is with the difference of embodiment mono-:
In the embodiment of the present invention one, described the first switching tube Q1 is first open-minded, and second switch pipe Q2 is open-minded more subsequently.Corresponding, at t3 constantly, described the first switching tube Q1 also first turn-offs, and described second switch pipe Q2 turn-offs again subsequently.
And in the embodiment of the present invention two, described the first switching tube Q1 is first open-minded, second switch pipe Q2 is open-minded more subsequently.But at t3 constantly, described second switch pipe Q2 first turn-offs, and described the first switching tube Q1 turn-offs again subsequently.And at t6 constantly, described second switch pipe Q2 is first open-minded, the first switching tube Q1 is open-minded more subsequently.But at t9 constantly, the first switching tube Q1 first turn-offs, and second switch pipe Q2 turn-offs again subsequently.
As can be seen here, for the embodiment of the present invention, after only need to guaranteeing that described the first switching tube Q1 and second switch pipe Q2 open in succession, two switching tubes keep after opening state certain hour section simultaneously, then two switching tubes are turn-offed in succession.First open-minded as for which switching tube, which switching tube first turn-offs, and does not need to carry out concrete restriction.
Corresponding to the control method of the staggered interconnected booster circuit described in the embodiment of the present invention, the embodiment of the present invention also provides a kind of control device of staggered interconnected booster circuit.
With reference to Fig. 7, it is the structure chart of the control device of the staggered interconnected booster circuit described in the embodiment of the present invention one.As shown in Figure 7, described device can comprise: the first control unit 701, the second control unit 702 and the 3rd control unit 703.
Described the first control unit 701, in first moment, controls described the first switching tube Q1 and becomes opening state from off state;
Described the second control unit 702, for when described the second coupling inductance L2 reduces to zero to the mutual inductance electric current of described the first coupling inductance L1, controls described second switch pipe Q2 and becomes opening state from shutoff;
Described the 3rd control unit 703, for postponing after very first time section, controls described the first switching tube Q1 and second switch pipe Q2 and in succession from logical state, becomes off state.
Visible, control device described in the embodiment of the present invention one, can make: in the very first time section in a complete switch periods, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.Make thus, control method described in the embodiment of the present invention, can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
In the embodiment of the present invention one, described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
It should be noted that, described the 3rd control unit 703, for postponing after very first time section, first controls described the first switching tube Q1 and becomes off state from opening state, then, then controls described second switch pipe Q2 and becomes off state from opening state.
With reference to Fig. 8, it is the structure chart of the control device of the staggered interconnected booster circuit described in the embodiment of the present invention two.As shown in Figure 8, described device can comprise: the first control unit 801, the second control unit 802, the 3rd control unit 803, the 4th control unit 804, the 5th control unit 805 and the 6th control unit 806.
Described the first control unit 801, in first moment, controls described the first switching tube Q1 and becomes opening state from off state.
Described the second control unit 802, for when described the second coupling inductance reduces to zero to the mutual inductance electric current of described the first coupling inductance L1, controls described second switch pipe Q2 and becomes opening state from shutoff.
Described the 3rd control unit 803, for postponing after very first time section, controls described the first switching tube Q1 and second switch pipe Q2 and in succession from logical state, becomes off state.
Described the 4th control unit 804, for postponing after the second time period, controls described second switch pipe Q2 and becomes opening state from off state.
Described the 5th control unit 805, for when described the first coupling inductance L1 reduces to zero to the mutual inductance electric current of described the second coupling inductance L2, controls described the first switching tube Q1 and becomes opening state from shutoff.
Described the 6th control unit 806,, controls described the first switching tube Q1 and second switch pipe Q2 and in succession from opening state, becomes off state after three time periods for delay control.
Visible, control device described in the embodiment of the present invention two, can make: the very first time section in a complete switch periods and in the 3rd time period, described the first switching tube Q1 and second switch pipe Q2 can be simultaneously in opening states, the electric current flowing through respectively on it while making two switching tube conductings reduces, and then current value conduction loss is less.Make thus, control method described in the embodiment of the present invention, can effectively reduce the turn-on consumption of switching tube and diode, improves the whole efficiency of circuit.
In the embodiment of the present invention two, described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit; Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
It should be noted that, described the 3rd control unit 803, for postponing after very first time section, first, controls described second switch pipe Q2 and becomes off state from opening state, then, then controls described the first switching tube Q1 and becomes off state from opening state.
Described the 6th control unit 806,, first, controls described the first switching tube Q1 and becomes off state from opening state after three time periods for delay control, then, then controls described second switch pipe Q2 and becomes off state from opening state.
Those of ordinary skills can recognize, unit and the algorithm steps of each example of describing in conjunction with embodiment disclosed herein, can realize with the combination of electronic hardware or computer software and electronic hardware.These functions are carried out with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can specifically should be used for realizing described function with distinct methods to each, but this realization should not thought and exceeds scope of the present invention.
Those skilled in the art can be well understood to, and for convenience and simplicity of description, the specific works process of the system of foregoing description, device and unit, can, with reference to the corresponding process in preceding method embodiment, not repeat them here.
In the several embodiment that provide in the application, should be understood that disclosed system, apparatus and method can realize by another way.For example, device embodiment described above is only schematic, for example, the division of described unit, be only that a kind of logic function is divided, during actual realization, can have other dividing mode, for example a plurality of unit or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
The described unit as separating component explanation can or can not be also physically to separate, and the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in a plurality of network element.Can select according to the actual needs some or all of unit wherein to realize the object of the present embodiment scheme.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can be also that the independent physics of unit exists, and also can be integrated in a unit two or more unit.
If described function usings that the form of SFU software functional unit realizes and during as production marketing independently or use, can be stored in a computer read/write memory medium.Understanding based on such, the part that technical scheme of the present invention contributes to prior art in essence in other words or the part of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, or the network equipment etc.) or processor (processor) carry out all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CDs.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited to this, is anyly familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, within all should being encompassed in protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by the described protection range with claim.
Claims (11)
1. a control method for staggered interconnected booster circuit, is characterized in that, described circuit comprises: the first coupling inductance, the second coupling inductance, the first switching tube, second switch pipe, the first diode, the second diode;
After the Same Name of Ends short circuit of the Same Name of Ends of described the first coupling inductance and described the second coupling inductance, connect together the positive input terminal of described circuit;
The first end of the first switching tube and the anode of described the first diode described in the different name termination of described the first coupling inductance; The negative input end of circuit described in the second termination of described the first switching tube; The negative electrode of described the first diode connects the positive output end of described circuit;
The first end of second switch pipe and the anode of described the second diode described in the different name termination of described the second coupling inductance; The negative input end of circuit described in the second termination of described second switch pipe; The negative electrode of described the second diode connects the positive output end of described circuit;
Described control method comprises:
In first moment, control described the first switching tube and become opening state from off state;
When described the second coupling inductance reduces to zero to the mutual inductance electric current of described the first coupling inductance, control described second switch pipe and become opening state from shutoff;
Postpone, after very first time section, to control described the first switching tube and second switch pipe and in succession from opening state, become off state.
2. method according to claim 1, is characterized in that,
Described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
3. method according to claim 1 and 2, is characterized in that, after described delay very first time section, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state and be:
Postpone, after very first time section, to control described the first switching tube and become off state from opening state;
Control again described second switch pipe and become off state from opening state.
4. method according to claim 1, is characterized in that, described method also comprises:
Postpone after the second time period, control described second switch pipe and become opening state from off state;
When described the first coupling inductance reduces to zero to the mutual inductance electric current of described the second coupling inductance, control described the first switching tube and become opening state from shutoff;
Delay control, after three time periods, is controlled described the first switching tube and second switch pipe and in succession from opening state, is become off state.
5. method according to claim 4, is characterized in that,
Described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit;
Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
6. according to the method described in claim 4 or 5, it is characterized in that, after described delay very first time section, control described the first switching tube and second switch pipe and in succession from opening state, become off state and be:
Postpone, after very first time section, to control described second switch pipe and become off state from opening state;
Control again described the first switching tube and become off state from opening state.
7. method according to claim 6, is characterized in that, described delay control is after three time periods, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state and be:
Delay control, after three time periods, is controlled described the first switching tube and is become off state from opening state;
Control again described second switch pipe and become off state from opening state.
8. a control device for staggered interconnected booster circuit, is characterized in that, described circuit comprises: the first coupling inductance, the second coupling inductance, the first switching tube, second switch pipe, the first diode, the second diode;
After the Same Name of Ends short circuit of the Same Name of Ends of described the first coupling inductance and described the second coupling inductance, connect together the positive input terminal of described circuit;
The first end of the first switching tube and the anode of described the first diode described in the different name termination of described the first coupling inductance; The negative input end of circuit described in the second termination of described the first switching tube; The negative electrode of described the first diode connects the positive output end of described circuit;
The first end of second switch pipe and the anode of described the second diode described in the different name termination of described the second coupling inductance; The negative input end of circuit described in the second termination of described second switch pipe; The negative electrode of described the second diode connects the positive output end of described circuit;
Described control device comprises:
The first control unit, in first moment, controls described the first switching tube and becomes opening state from off state;
The second control unit, for when described the second coupling inductance reduces to zero to the mutual inductance electric current of described the first coupling inductance, controls described second switch pipe and becomes opening state from shutoff;
The 3rd control unit, for postponing after very first time section, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state.
9. the control device of staggered interconnected booster circuit according to claim 8, is characterized in that,
Described very first time section meets: T1/T=DR; Wherein, T1 is very first time section, the switch periods that T is described circuit, the duty ratio that DR is described circuit.
10. the control device of staggered interconnected booster circuit according to claim 8, is characterized in that, described device also comprises:
The 4th control unit, for postponing after the second time period, controls described second switch pipe and becomes opening state from off state;
The 5th control unit, for when described the first coupling inductance reduces to zero to the mutual inductance electric current of described the second coupling inductance, controls described the first switching tube and becomes opening state from shutoff;
The 6th control unit,, controls described the first switching tube and second switch pipe and in succession from opening state, becomes off state after three time periods for delay control.
The control device of 11. staggered interconnected booster circuits according to claim 10, is characterized in that,
Described very first time section and the 3rd time period meet: (T1+T3)/T=DR; Wherein, T1 is very first time section, and T3 was the 3rd time period, the switch periods that T is described circuit, the duty ratio that DR is described circuit;
Described the second time period meets: T1+2 * T2+T3=T; Wherein, T2 was the second time period.
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| CN106817037A (en) * | 2015-12-01 | 2017-06-09 | 艾默生网络能源有限公司 | The control method and device of one species Vienna tri-level circuit |
| CN106817038A (en) * | 2015-12-01 | 2017-06-09 | 艾默生网络能源有限公司 | A kind of control method and device of I types tri-level circuit |
| CN106849653A (en) * | 2015-12-04 | 2017-06-13 | 纬创资通（中山）有限公司 | Booster circuit |
| CN108880247A (en) * | 2017-05-16 | 2018-11-23 | 马克西姆综合产品公司 | Support DC to the DC converter and associated method of continuous conduction mode |
| CN108880247B (en) * | 2017-05-16 | 2021-09-07 | 马克西姆综合产品公司 | DC-to-DC converter supporting continuous conduction mode, and associated method |
| CN109525109B (en) * | 2017-09-20 | 2020-10-30 | 丰田自动车株式会社 | DC-DC converter |
| CN109525113A (en) * | 2017-09-20 | 2019-03-26 | 丰田自动车株式会社 | Power conversion circuit |
| CN109525109A (en) * | 2017-09-20 | 2019-03-26 | 丰田自动车株式会社 | DC-DC converter |
| CN109525102A (en) * | 2017-09-20 | 2019-03-26 | 丰田自动车株式会社 | Power conversion circuit |
| CN108900083A (en) * | 2018-06-05 | 2018-11-27 | 华为技术有限公司 | power converter and related system |
| US11437904B2 (en) | 2018-06-05 | 2022-09-06 | Huawei Digital Power Technologies Co., Ltd. | Power converter and related system |
| US11784552B2 (en) | 2018-06-05 | 2023-10-10 | Huawei Digital Power Technologies Co., Ltd. | Power converter and related system |
| TWI682617B (en) * | 2018-06-28 | 2020-01-11 | 崑山科技大學 | Interleaved ultra-high boost converter |
| CN111181414A (en) * | 2018-11-13 | 2020-05-19 | 丰田自动车株式会社 | Bidirectional power converter, electric vehicle, and control method for bidirectional power converter |
| CN111181414B (en) * | 2018-11-13 | 2023-09-12 | 丰田自动车株式会社 | Bidirectional power converter, electric vehicle, and control method for bidirectional power converter |
| CN109698622A (en) * | 2019-02-27 | 2019-04-30 | 青岛大学 | Eliminate crisscross parallel Boost circuit, the system and method for booster circuit diode losses |
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