Background technology
Along with integrated circuit is more and more higher to the requirement of integrated level, the critical size of integrated circuit (IC)-components is more and more less.And the minimum lines that at present optical lithography can directly write out are in 45nm left and right, in order to obtain less lines, electron beam exposure becomes a good approach.Although because electron beam exposure is consuming time long, cannot, for large-scale production, be can prepare the following lines of 20nm with electron beam completely to carry out in advance etching technics exploitation in laboratory.
With electron beam exposure, write out electron beam lines, generally include following steps: on substrate, form hard mask layer, on hard mask layer, be coated with electron beam resist, adopt electron-beam exposure system, according to layout design, photoresist partial exposure is also made to its crosslinked sex change with the region that electron beam scanning need to expose, adopt developer solution chemical treatment photoresist to form photoresist mask graph to remove part photoresist, and use dry etching photoresist mask graph to be transferred to the hard mask layer of below.
Want the lines that obtain below 40nm just need to guarantee that the depth-width ratio of lines is less than 3: 1 because according to photoetching experience when the depth-width ratio of lines is greater than 3: 1, easily there is the phenomenon that side is fallen in lines, so the thickness of electron beam adhesive just need to be less than 100nm.But thickness is less than 100nm etching just faces another problem, is exactly the etching whether electron beam adhesive can guarantee hard mask.In hard mask etching process, also have the loss of certain glue, when live width is greater than 90nm, the thickness of glue is in 270nm left and right, and therefore in hard mask etching, photoresist can not lose completely; But when the glue that only has now 100nm is thick, just need to consider whether glue can keep out the etching of hard mask.
Accompanying drawing 1A is the SEM image of lines after electron beam exposure, and accompanying drawing 1B is the SEM image of the lines after hard mask etching.By SEM picture, can find that the roughness of live width becomes very poor after hard mask etching.This is mainly because electron beam adhesive is too thin, causes some local glue being lost completely in hard mask etching process, so some local hard mask lines breach that can be etched out.
Summary of the invention
In view of this, the object of the invention is to improve by improving electron beam exposure condition the problem of the line width roughness after hard mask etching.
Realizing above-mentioned purpose of the present invention, is by a kind of electronic beam photetching process is provided, and comprising: on the structural wood bed of material, form hard mask layer; On hard mask layer, form electron beam resist; Adopt electron-beam exposure system, electron beam resist is exposed, wherein by increasing exposure dose, improve the etch resistance of electron beam resist; Electron beam resist after adopting developer solution to exposure develops, and forms beamwriter lithography glue pattern; Take beamwriter lithography glue pattern as mask, and anisotropic etching hard mask layer and the structural wood bed of material, form required meticulous lines.
Wherein, exposure dose recruitment 100%.
Wherein, the thickness of electron beam resist is less than 100nm.
Wherein, hard mask layer comprises monox, silicon nitride, silicon oxynitride and combination thereof.
Wherein, anisotropic etching using plasma dry etching technology.
Wherein, plasma dry etching adopts CCP or ICP or TCP equipment.
Wherein, after etching, also comprise that dry method is removed photoresist and/or wet etching cleans.
Wherein, wet etching cleans and adopts SPM+APM.
According to electronic beam photetching process of the present invention, in the situation that guaranteeing that depth-width ratio is constant, by changing process conditions, improve the anti-etching performance of electron beam adhesive, prevent that electron beam adhesive from being lost completely, improved thus lines precision, improved the performance of resulting devices.
Embodiment
Referring to accompanying drawing, also in conjunction with schematic embodiment, describe feature and the technique effect thereof of technical solution of the present invention in detail.It is pointed out that structure like similar Reference numeral representation class, term " first " used in the application, " second ", " on ", D score, " thick ", " thin " etc. can be used for modifying various device architectures.These modify space, order or the hierarchical relationship that not implies unless stated otherwise institute's modification device architecture.
Improve beamwriter lithography line width roughness, from principle, analyze, have at present two approach to select:
1. increase the thickness of electron beam adhesive.This scheme can prevent glue loss completely in etching process by improving thickness, but shortcoming is due to the thick raising of glue, and it is large that the depth-width ratio of lines can become.Therefore electron beam easily occurs that when writing the following lines of 40nm side falls phenomenon, the stable following lines of 40nm that obtain of having no idea.
2. improve the etch resistance of electron beam adhesive.This scheme can improve the anti-etching performance of electron beam adhesive in the situation that guaranteeing that depth-width ratio is constant by changing process conditions, prevent that electron beam adhesive from being lost completely.This scheme is also our main R&D direction.
Fig. 2 is the schematic flow sheet according to electronic beam photetching process of the present invention, and wherein the method at least comprises the following steps:
Step 1 forms hard mask layer on the structural wood bed of material.
Substrate is provided, according to device purposes, need and choose reasonable, can comprise monocrystalline silicon (Si), SOI, monocrystal germanium (Ge), GeOI, strained silicon (Strained Si), germanium silicon (SiGe), or compound semiconductor materials, for example gallium nitride (GaN), gallium arsenide (GaAs), indium phosphide (InP), indium antimonide (InSb), and carbon back semiconductor for example Graphene, SiC, carbon nanotube etc.For the consideration with CMOS process compatible, substrate is preferably body Si or SOI.In substrate or on substrate, can comprise the structural wood bed of material, it can be false grid layer materials such as () polysilicon, amorphous silicon, microcrystal silicon, amorphous carbon, amorphous germaniums, polysilicon or metal gate layers, local interlinkage structure (damascene structure that materials such as Cu, Al, W is filled), top welding pad structure etc.On the structural wood bed of material, by method depositions such as LPCVD, PECVD, HDPCVD, RTO, chemical oxidation, MBE, ALD, form hard mask layer.Wherein hard mask layer can be that individual layer can be also multilayer laminated structure, and its material can be monox, silicon nitride, silicon oxynitride and combination thereof.In one embodiment of the invention, hard mask layer is ONO rhythmo structure, i.e. three of monox-silicon-nitride and silicon oxide stack structures layer by layer.Each layer thickness needs according to device architecture and rationally sets above.
Step 2 forms electron beam resist on hard mask layer.
By methods such as spin coating, spraying, a painting, serigraphys, on hard mask layer, form electron beam resist.Its material can be PMMA, epoxy 618, COP etc.Because the present invention is preferably applicable to the manufacture of the following meticulous lines of 45nm, in order to prevent side, the thickness of electron beam resist is less than 100nm, for example, be 10~100nm and be preferably 30~60nm.
Step 3, adopts electron-beam exposure system, and electron beam resist is exposed.
Electron-beam exposure system can be existing improvement SEM, Gauss's scanning system, moulding beam system, limited scattering angle projection system etc.Inventor's discovery, when increasing exposure dose, in photoresist, component of polymer crosslinking degree increases, and the etch resistance of electron beam resist is obviously improved.Particularly, for Gauss's scanning system, while increasing by 100% exposure dose, can obviously improve etch resistance.Further, with respect to the exposure dose 0.5~2.5 * 10 of prior art
-5c/cm
2, the exposure dose in one embodiment of the invention correspondingly increases to 1~5 * 10
-5c/cm
2.In addition,, as other embodiment, exposure dose can be 1 * 10
-5c/cm
2~2 * 10
-4c/cm
2.
Step 4, adopts developer solution to develop to the electron beam resist after exposing, and forms beamwriter lithography glue pattern.For example, in the developer solutions such as isopropyl acetone, develop and draw for example at 22nm node or following hyperfine figure.
Step 5, take beamwriter lithography glue pattern as mask, adopts anisotropic method etch hardmask layer and the structural wood bed of material successively, forms required meticulous lines.Particularly, the dry etching technologies such as using plasma etching, reactive ion etching (RIE), etching gas can be carbon fluorine base gas, and can comprise that inert gas and oxidizing gas are to regulate etch rate.Wherein, dry etching equipment can be ICP, TCP, CCP equipment.Preferably, adopt dry etching and/or wet corrosion technique to remove polymkeric substance and the particle thereof producing in etching process, dry etching for example adopts fluorine-based plasma etching, and wet etching is SPM (sulfuric acid for example: hydrogen peroxide=4: 1)/APM (ammoniacal liquor for example: hydrogen peroxide: deionized water=1: 1: 5 or 0.5: 1: 5) wet-cleaned for example.Owing to having improved exposure dose in step 3, the anti-etching performance of electron beam resist obviously improves, therefore even if below live width 10nm in the situation of (corresponding electron beam resist thickness 30nm left and right), electron beam resist can be by such as the fluorine-based undue etching of etching gas that waits of carbon yet, therefore there will not be the side direction lines breach shown in Figure 1A and Figure 1B, also can not cause line width roughness variation.Fig. 3 A and Fig. 3 B show electron beam exposure lines and the hard mask etching lines that adopt photoetching method of the present invention to form, and have obviously improved as seen the line roughness of beamwriter lithography/etching.
According to electronic beam photetching process of the present invention, in the situation that guaranteeing that depth-width ratio is constant, by changing process conditions, improve the anti-etching performance of electron beam adhesive, prevent that electron beam adhesive from being lost completely, improved thus lines precision, improved the performance of resulting devices.
Although with reference to one or more exemplary embodiments explanation the present invention, those skilled in the art can know without departing from the scope of the invention and make various suitable changes and equivalents to forming the method for device architecture.In addition, by disclosed instruction, can make and manyly may be suitable for the modification of particular condition or material and not depart from the scope of the invention.Therefore, object of the present invention does not lie in and is limited to as the disclosed specific embodiment for realizing preferred forms of the present invention, and disclosed device architecture and manufacture method thereof will comprise all embodiment that fall in the scope of the invention.