CN103647524A - Programmable logic controller (PLC) programmable filter - Google Patents
Programmable logic controller (PLC) programmable filter Download PDFInfo
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Abstract
The invention discloses a programmable logic controller (PLC) programmable filter. The PLC programmable filter comprises a digital integration device (10), a threshold comparison device (20) and a positive and negative saturation comparison device (30), wherein the threshold comparison device (20) and the positive and negative saturation comparison device (30) are connected with the digital integration device (10). The PLC programmable filter further comprises a parameter writing device (40) which is respectively connected with the digital integration device (10), the threshold comparison device (20) and the positive and negative saturation comparison device (30). The PLC programmable filter has the advantages that a preset positive saturation value and a negative saturation value and a preset high level threshold and a low level threshold can be separately independently arranged, a preset positive integral constant and a negative integral constant can be independently programmably set, so that a very flexible filtering function is achieved, and monopulse and continuous pulse effect separation and high level and low level filtering effect separation can be achieved.
Description
Technical field
The present invention relates to PLC filtering field, more particularly, relate to a kind of PLC programmable filter.
Background technology
Current many programmable logic controller (PLC)s (Programmable Logic Controller, PLC) adopt hardware filtering, as filtering techniques such as RC, LC, and hardware filtering device is because parameter is determined, once moulding, in use just cannot change, making PLC input port is input at a high speed or be low speed input, therefore be unfavorable for reusing of PLC input, can not be suitable for occasion flexibly.
In prior art, also there is part to adopt numerical software filtering, and adopt the bidirectional counter of numerical software filtering conventionally to only have a judgment threshold, be that counter is realized the low and high level of threshold decision input through a comparator, make the interference signal producing at Near Threshold equally can cause misoperation; Even if adopt two threshold values as judgement, but because limitation own is after setting the positive negative value of threshold value and integral constant, just can not to these parameters, modify again, and the absolute value on the occasion of the negative value with integral constant of integral constant is same value, therefore cannot regulate according to different inputs its filter width and amount of hysteresis, also just cannot meet for special application scenario and do different filter effects.
Summary of the invention
The technical problem to be solved in the present invention is, for the above-mentioned defect of prior art, provides a kind of PLC programmable filter.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of PLC programmable filter, comprise the digital integration device that is connected with the input port of PLC, the threshold value comparison means being all electrically connected with described digital integration device and positive and negative saturated comparison means and the parameter read-in device being electrically connected with described digital integration device, threshold value comparison means and described positive and negative saturated comparison means respectively, and described threshold value comparison means comprises chooser unit and the output subelement being electrically connected successively;
Described digital integration device carries out integral operation for the digital input signals receiving from outside according to the input port via PLC, and integral operation result is outputed to described threshold value comparison means and described positive and negative saturated comparison means;
Described positive and negative saturated comparison means is for the integral operation result of described digital integration device output and default positive saturation value and negative saturation value are compared, and output is used for controlling described digital integration device and carries out integral operation or out-of-work the first control signal according to comparative result;
Described chooser unit is for outputing to output subelement according to the second control signal of described output subelement feedback by the first comparative result or the second comparative result, wherein said the first comparative result is the comparative result of integral operation result with the default high-level threshold of the output of described digital integration device, and described the second comparative result is the comparative result of the integral operation result exported of described digital integration device and default low level threshold value;
Described output subelement is for producing the second control signal as the output of PLC programmable filter according to the output of described chooser unit;
Described parameter read-in device arranges integral constant and described default high-level threshold and low level threshold value, default positive saturation value and negative saturation value for programming.
In above-mentioned PLC programmable filter, described the first control signal comprises the first high level and the first low level two states, and described digital integration device quits work, when described the first control signal is the first low level state, carries out integral operation when described the first control signal is the first high level state.
In above-mentioned PLC programmable filter, described the second control signal comprises the second high level and the second low level two states, described chooser unit when described the second control signal is the second high level state, the second comparative result is outputed to output subelement, when described the second control signal is the second low level state, the first comparative result is outputed to output subelement.
In above-mentioned PLC programmable filter, described digital integration device comprises the first data selector, the second data selector, adder and register; Two inputs of described the first data selector all connect described parameter read-in device, and the control end of described the first data selector connects wants filtered digital input signals; An input of described the second data selector connects the output of described the first data selector, the input value of another input is 0, and the control end of described the second data selector connects the output of described positive and negative saturated comparison means; Two inputs of described adder connect respectively the output of described the second data selector and the output of described register; The output of described adder connects the input of described register.
In above-mentioned PLC programmable filter, described register comprises a plurality of the first triggers that are connected in series successively.
In above-mentioned PLC programmable filter, described chooser unit comprises the first comparator, the second comparator and the 3rd data selector, and described output subelement comprises the second trigger; Two inputs of described the first comparator and two inputs of described the second comparator are connected with described parameter read-in device with the output of described register respectively, the output of the output of described the first comparator and described the second comparator is connected with two inputs of described the 3rd data selector respectively, the output of described the 3rd data selector is connected with the input of described the second trigger, and the output of described the second trigger is connected with the control end of described the 3rd data selector.
In above-mentioned PLC programmable filter, described the first trigger and described the second trigger are synchronous d type flip flop.
In above-mentioned PLC programmable filter, described positive and negative saturated comparison means comprise the 3rd comparator, the 4th comparator and or door; Two inputs of described the 3rd comparator and two inputs of described the 4th comparator are connected with described parameter read-in device with the output of described digital integration device respectively, the output of the output of described the 3rd comparator and described the 4th comparator is connected with two inputs described or door respectively, and output described or door is connected with described digital integration device.
Implement PLC programmable filter of the present invention, there is following beneficial effect: by adopting the comparator of dual threshold, realized a kind of sluggish input effect, reached jamproof feature; By parameter read-in device, make the positive saturation value of presetting and the negative saturation value of presetting and default high-level threshold and default low level threshold value can separate programming setting separately, realize the flexible configuration of filtering, can control the contradiction of filter capacity and response rapidity; And default positive integral constant and default negative integral constant setting able to programme respectively, realized high level and low level different disposal.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the invention will be further described, in accompanying drawing:
Fig. 1 is the block diagram of the PLC programmable filter that provides of a preferred embodiment of the present invention;
Fig. 2 is the cut-away view of digital integration device in Fig. 1;
Fig. 3 is the cut-away view of threshold value comparison means in Fig. 1;
Fig. 4 is the cut-away view of positive and negative saturated comparison means in Fig. 1;
Fig. 5 is the oscillogram of the first preferred embodiment output of PLC programmable filter of the present invention;
Fig. 6 is the oscillogram of the second preferred embodiment output of PLC programmable filter of the present invention.
Embodiment
For technical characterictic of the present invention, object and effect being had more clearly, understand, now contrast accompanying drawing and describe the specific embodiment of the present invention in detail.
The block diagram of the PLC programmable filter that Fig. 1 provides for a preferred embodiment of the present invention, comprise digital integration device 10, threshold value comparison means 20, positive and negative saturated comparison means 30 and parameter read-in device 40, wherein, digital integration device 10 is connected with the input port of PLC, the input port of this PLC needs filtered digital input signals for receiving from outside, the digital input signals that need that digital integration device 10 receives from outside for the input port via described PLC are filtered and carry out integral operation according to this digital input signals, and integral operation result is exported to threshold value comparison means 20 and positive and negative saturated comparison means 30, and threshold value comparison means 20 comprises again chooser unit 21 and output subelement 22.
Positive and negative saturated comparison means 30 is for the operation result of digital integration device 10 outputs and default positive saturation value and negative saturation value are compared, and the first control signal that output is scheduled to according to comparative result.Wherein, the first control signal has the first high level and the first low level two states, and digital integration device 10 quits work, when the first control signal is the first low level state, carries out integral operation when the first control signal is the first high level state.
Parameter read-in device 40 is connected with digital integration device 10, threshold value comparison means 20 and positive and negative saturated comparison means 30 respectively, and integral constant and above-mentioned default high-level threshold and low level threshold value, default positive saturation value and negative saturation value are set for programming.Wherein, integral constant comprises again default positive integral constant and default negative integral constant.
An input of the second data selector 102 connects the output of the first data selector 101, the value of another input input is 0, the control end of the second data selector 102 connects the output of positive and negative saturated comparison means 30, positive and negative saturated comparison means 30 output the first control signals, when the first control signal of positive and negative saturated comparison means 30 outputs is the first low level state, the second data selector 102 is selected the input value output being connected with the output of the first data selector 101 under the control of its control end; When the first control signal of positive and negative saturation device 30 outputs is the first high level state, it is 0 input output that the second data selector 102 is selected input value under the control of its control end, now stops integral operation, and digital integration device 10 quits work.Two inputs of adder 103 connect respectively the output of the second data selector 102 and the output of register 104, the output of adder 103 connects the input of register 104, be that register 104 is equivalent to a counter with adder 103, with this counter, carry out analogue integrator, so digital integration device 10 has been realized a kind of integral action.Wherein, register 104 is connected in series and is formed by a plurality of the first triggers, and for example, if comprise K position the first trigger, register 104 is K bit register.
Positive and negative saturated comparison means 30 comprise again the 3rd comparator 301, the 4th comparator 302 and or door 303, as shown in Figure 4, two inputs of two of the 3rd comparator 301 inputs and the 4th comparator 302 are connected with parameter read-in device 40 with the output of digital integration device 10 respectively.The 3rd comparator 301 is just saturated comparator, for the default positive saturation value of parameter read-in device 40 outputs is processed, the operation result of itself and digital integration device 10 outputs is compared, when if the operation result of digital integration device 10 outputs is more than or equal to default positive saturation value, the 3rd comparator 301 output high level; The 4th comparator 302 is negative saturated comparator, for the default negative saturation value of parameter read-in device 40 outputs is processed, the operation result of itself and digital integration device 10 outputs is compared, when if the operation result of digital integration device 10 outputs is less than or equal to negative saturation value, the 4th comparator 302 output high level.The output of the output of the 3rd comparator 301 and the 4th comparator 302 respectively with or door two inputs of 303 be connected, or door 303 output is the control end that the output of positive and negative saturated comparison means 30 connects the second data selector 102 in digital integrating gear 10, as long as when the output valve of the 3rd comparator 301 and the 4th comparator 302 has one to be high level, or door 303 output valves are high level, the first control signal that is positive and negative saturated comparison means 30 outputs is the first high level state, now the second data selector 102 in control figure integrating gear 10 is selected the input output that input value is 0, digital integration device 10 quits work, keep initial value.
The first trigger and the second trigger 204 are synchronous d type flip flop, all with the rising edge of clock pulse, trigger, and clock signal (Clk) and the reset signal (nRST) of register 104 and the second trigger 204 all derive from PLC internal system.
The operation principle of now introducing in detail a kind of PLC programmable filter provided by the invention is as follows:
1) as the digital integration device in Fig. 2, wherein there are a multidigit register (being formed by a plurality of triggers) and adder (Add) to form a counter, with this counter, carry out analogue integrator, the clock of counting derives from PLC internal system, wherein adder operand that input is corresponding 1 comes from multidigit register, the operand 2 corresponding to another input of adder comes from second data selector (Mux), when register unsaturation, operand 2 is+N, or-M, depend on input signal, suppose that input signal significant level is high level, when input signal is high level, be+N, during for low level, be-M, when counting reaches capacity (output valve of multidigit register is more than or equal to default positive saturation value or is less than or equal to default negative saturation value), now control the second data selector and be output as 0, be that operand 2 is 0, stop doing integral operation.Therefore digital integration device has been realized a kind of integral action, and the constant of integration all can be realized by parameter read-in device the programming of M, N, thereby realizes the different filter effect of input low and high level signal.
2), as the threshold value comparison means in Fig. 3, it realizes the comparison of low and high level by two comparators.One of them is low-level comparator, and one is high level comparator, when the operation result of digital integration device output is greater than default high-level threshold, and high level comparator output high level; When the operation result of digital integration device output is less than default low level threshold value, low-level comparator output low level; When the operation result of digital integration device output is during at default high-level threshold and low level threshold interval, keep the level state of last threshold value comparison means output.Particularly, two signals of high level comparator and low-level comparator output enter into a synchronizer trigger (Flip-Flop) by data selector (Mux), the control signal of data selector is the second control signal of output subelement output, when the second control signal is the second high level state, the 3rd data selector is selected the second comparative result output of low-level comparator output, and when the second control signal is the second low level state, the 3rd data selector is selected the first comparative result output of high level comparator.By these two comparators, realized a sluggish effect relatively of band, reached jamproof feature, the default high-level threshold in the operand of two comparators and low level threshold value all can arrange by the parameter read-in device programming as in Fig. 1 in addition.
3) as the positive and negative saturated comparison means in Fig. 4, digital integration device is exported to positive and negative saturated comparison means in output simultaneously, this positive and negative saturated comparison means comprises just saturated comparator and negative saturated comparator, when the output valve of digital integration device is more than or equal to default positive saturation value, just saturated comparator output high level, otherwise the just saturated comparator output low level of output; When the output valve of digital integration device is less than or equal to default negative saturation value, negative saturated comparator output high level, otherwise negative saturated comparator output low level.These two comparators are by one or export behind the door the data selector in digital integration device.The function realizing is, when the operation result of digital integration device output reaches default positive saturation value or default negative saturation value, can realize digital integration device and quit work, and keeps initial value.In addition default positive saturation value and default negative saturation value all can arrange by the programming of parameter read-in device.
4) as the parameter read-in device in Fig. 1, it can allow PLC internal system software write parameters, and the dotted arrow part as in Fig. 1, arranges different parameters thereby can realize in different application.For example, the high level burr producing in data input signal needs the different filtering time from low level burr, the whole corresponding time, all can arrange by the programming of parameter read-in device.Wherein, positive pulse is generally needed signal, but after usually having had interference, can there is a very short negative burr of duration in positive pulse, this will remove, and negative pulse is also needed, if but had interference, meeting stack very short positive burr of duration in negative pulse is also to need to remove.In addition, default positive saturation value and default negative saturation value separate setting separately with default high-level threshold and low level threshold value, the setting of can programming separately of default positive integral constant and default negative integral constant, thus realized filter function very flexibly.And can realize pulse separated with continuous impulse filter effect by changing these parameter values, the high level low level filter effect in input signal is separated, to be issued to best filter effect in different application situation.
Fig. 5 is the oscillogram of the first preferred embodiment of a kind of PLC programmable filter of the present invention, in the present embodiment, by parameter read-in device programming, arrange that default positive integral constant is 1, default negative integration is often-1, be N=1, M=1, default high-level threshold PT(Positive Threshold is set) be 3, default low level threshold value NT (Negative Threshold) is 2, and default positive saturation value PS(Positive saturation is set) be 6, default negative saturation value NS(Negative saturation) be 0.This oscillogram comprises that needing filtered digital input signals Input, output signal Out is that the second control signal, the clock signal Ref_Clk of the output of threshold value comparison means are, the output valve of register is count value Counter and the count curve figure corresponding with count value.Wherein, the represented value of count curve figure is the same with count value, and just curve is for convenient signal, and interference signal is the negative burr of a period of time of arrow indication in figure.
As shown in the figure, when starting, input signal is low level, be that input integral value is 0, once be input as high level, beginning is done integral operation with PLC internal system reference clock, when the counting operation result that is digital integration device output is increased to default high-level threshold 3, now the first comparator is exported high level, the 3rd data selector is selected the high level output of the first comparator output, after the second trigger, the second control signal of threshold value comparison means output is the second high level state, then counting continues to increase, the amplitude increasing is each time N, as shown in the figure, counting is increased to 5 from 1, when running into while being input as low level, (this low level is that the high level in input signal runs into after interference, the very short negative burr of a duration producing), counting reduces since 5, the amplitude reducing is each time M, now counting does not reach default low level threshold value 2, the second control signal still keeps the second high level state, counting reduces to 3 from 5.
Input signal is high level afterwards, counting continues to increase since 3, until counting is increased to default positive saturation value 6 from 3, after being increased to default positive saturation value 6, the first control signal of positive and negative saturated comparison means output is the first high level state, now controlling the second data selector output valve is 0, stops integral operation, and counting maintenance 6 is constant.Input signal is low level afterwards, counting starts again to reduce, until counting is reduced to low level threshold value 2 from 6, the second comparator output low level now, the 3rd data selector is selected the low level output of the second comparator output, after the second trigger, the second control signal of threshold value comparison means output is the second low level state, and then counting continues to drop to negative saturated integrated value 0 from 1.Visible to the interference signal in input signal negative burr can play good filtration result.
Therefore, a kind of PLC programmable filter provided by the invention, adopt the comparator of dual threshold, a value is made to two more laggard line outputs, for example, the operation result of digital integration device output be count value be greater than default high-level threshold the second control signal of threshold value comparison means output be now the second high level state, being less than default low level threshold value the second control signal that threshold value comparison means is exported is now the second low level state, at default high-level threshold and low level threshold interval, the second control signal of threshold value comparison means output keeps last level state.Thereby realized a kind of sluggish input effect, even to the interference signal producing at Near Threshold, also can not cause misoperation, reached jamproof characteristic.And for special application scenario, by parameter read-in device, change the value of parameter, can realize different filter effects, for example: when system applies is during in low velocity pulse, supposing the system clock frequency is 1MHz, the filtered input signal approach switch input of need receiving from the input port of PLC, switch is generally low level when disconnecting, switch closure is high level, and input signal significant level is high level, as shown in Figure 6, when input signal is high level, counting increases.Time is 20ms left and right, if detect this input signal, and want filtering to be less than the interference signal (positive burr) of 10ms, NS=0, PT=10000, NT=0 can be set, N=1, the frequency of M=10000(1MHz is within 10000 o'clock, to be 10ms in count value), if now input the disturbing pulse signal of a 9ms, will be by filtering.Therefore default positive saturation value and default negative saturation value separate independent setting with default high-level threshold and low level threshold value, thereby can control the contradiction of filter capacity and response rapidity, have realized the flexible configuration of filtering; Default positive integral constant and default negative integral constant can be by setting of programming separately of parameter read-in device, thereby can realize the filter effect processing that positive pulse is different from negative pulse; Can realize the separated of pulse and continuous impulse filter effect by changing the value of these parameters, the separation of the high level low level filter effect of input signal, and go at a high speed, the input of low speed.
By reference to the accompanying drawings embodiments of the invention are described above; but the present invention is not limited to above-mentioned embodiment; above-mentioned embodiment is only schematic; rather than restrictive; those of ordinary skill in the art is under enlightenment of the present invention; not departing from the scope situation that aim of the present invention and claim protect, also can make a lot of forms, within these all belong to protection of the present invention.
Claims (8)
1. a PLC programmable filter, it is characterized in that, comprise the digital integration device (10) that is connected with the input port of PLC, the threshold value comparison means (20) being all electrically connected with described digital integration device (10) and positive and negative saturated comparison means (30) and the parameter read-in device (40) being electrically connected with described digital integration device (10), threshold value comparison means (20) and described positive and negative saturated comparison means (30) respectively, and described threshold value comparison means (20) comprises the chooser unit (21) of electric connection successively and exports subelement (22);
Described digital integration device (10) carries out integral operation for the digital input signals receiving from outside according to the input port via PLC, and integral operation result is outputed to described threshold value comparison means (20) and described positive and negative saturated comparison means (30);
Described positive and negative saturated comparison means (30) is for the integral operation result of described digital integration device (10) output and default positive saturation value and negative saturation value are compared, and output is used for controlling described digital integration device (10) and carries out integral operation or out-of-work the first control signal according to comparative result;
Described chooser unit (21) is for outputing to output subelement (22) according to the second control signal of described output subelement (22) feedback by the first comparative result or the second comparative result, wherein said the first comparative result is the comparative result of integral operation result with the default high-level threshold of described digital integration device (10) output, and described the second comparative result is the comparative result of the integral operation result exported of described digital integration device (10) and default low level threshold value;
Described output subelement (22) is for producing the second control signal as the output of PLC programmable filter according to the output of described chooser unit (21);
Described parameter read-in device (40) arranges integral constant and described default high-level threshold and low level threshold value, default positive saturation value and negative saturation value for programming.
2. PLC programmable filter according to claim 1, it is characterized in that, described the first control signal comprises the first high level and the first low level two states, and described digital integration device (10) quits work, when described the first control signal is the first low level state, carries out integral operation when described the first control signal is the first high level state.
3. PLC programmable filter according to claim 1, it is characterized in that, described the second control signal comprises the second high level and the second low level two states, described chooser unit (21) when described the second control signal is the second high level state, the second comparative result is outputed to output subelement (22), when described the second control signal is the second low level state, by the first comparative result output to output subelement (22).
4. PLC programmable filter according to claim 1, is characterized in that, described digital integration device (10) comprises the first data selector (101), the second data selector (102), adder (103) and register (104); Two inputs of described the first data selector (101) all connect described parameter read-in device (40), and the control end of described the first data selector (101) connects wants filtered digital input signals; An input of described the second data selector (102) connects the output of described the first data selector (101), the input value of another input is 0, and the control end of described the second data selector (102) connects the output of described positive and negative saturated comparison means (30); Two inputs of described adder (103) connect respectively the output of described the second data selector (102) and the output of described register (104); The output of described adder (103) connects the input of described register (104).
5. PLC programmable filter according to claim 4, is characterized in that, described register (104) comprises a plurality of the first triggers that are connected in series successively.
6. PLC programmable filter according to claim 4, it is characterized in that, described chooser unit (21) comprises the first comparator (201), the second comparator (202) and the 3rd data selector (203), and described output subelement (22) comprises the second trigger (204), two inputs of described the first comparator (201) and two inputs of described the second comparator (202) are connected with described parameter read-in device (40) with the output of described register (104) respectively, the output of the output of described the first comparator (201) and described the second comparator (202) is connected with two inputs of described the 3rd data selector (203) respectively, the output of described the 3rd data selector (203) is connected with the input of described the second trigger (204), the output of described the second trigger (204) is connected with the control end of described the 3rd data selector (203).
7. PLC programmable filter according to claim 6, is characterized in that, described the first trigger and described the second trigger (204) are synchronous d type flip flop.
8. PLC programmable filter according to claim 1, is characterized in that, described positive and negative saturated comparison means (30) comprise the 3rd comparator (301), the 4th comparator (302) and or door (303); Two inputs of described the 3rd comparator (301) and two inputs of described the 4th comparator (302) are connected with described parameter read-in device (40) with the output of described digital integration device (10) respectively, the output of the output of described the 3rd comparator (301) and described the 4th comparator (302) is connected with two inputs described or door (303) respectively, and output described or door (303) is connected with described digital integration device (10).
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