CN103647461A - Control method and apparatus of AC-DC series resonance matrix converter - Google Patents

Abstract

The invention relates to the matrix converter control technology and the high-frequency alternating-current link technology, particularly to a control method and apparatus of an AC-DC series resonance matrix converter for a high-voltage direct-current load. According to the method, a control strategy of switching of an excitation voltage from a low-wire voltage to a high-wire voltage and then to 0 voltage is used in the half period of a high-frequency current, thereby realizing three-voltage instantaneous composition; and thus the equivalent excitation voltage adjustment is realized and the average value of each phase of input wire current is in direct proportion to a phase voltage, and a high power fact and a low harmonic current are realized only by a small filtering inductance value. The provided method and the apparatus have the following beneficial effect: voltage-stabilizing outputting-based AC-DC series resonance matrix converter controlling with characteristics of high efficiency, high power factor, and low-harmonic and low-peak value current. And the method and the apparatus is especially suitable for the AC-DC series resonance matrix converter.

Description

A kind of control method and device of AC-DC series resonance matrix converter

Technical field

The present invention relates to matrix converter control technology and high-frequency ac interconnection technique, relate to specifically control method and the device of AC-DC series resonance matrix converter for a kind of high voltage direct current load.

Background technology

High-voltage DC power supply is extensive application in continuous wave and long pulse modulator High Power Microwave System.In order to meet the military requirement of future high-tech war, High Power Microwave System is towards high power, miniaturization, light-weighted future development, and this just requires its power supply to have higher power density, efficiency and power factor.The general DC-Link technology that has intermediate dc energy storage link that adopts of power supply of generally using at present, the existence of intermediate energy storage link will inevitably increase the volume and weight of power-supply system, has reduced the power density of power supply; In addition, this power supply is not high in the quality of power supply of its electrical network input, power factor is lower, harmonic content is larger, in order to proofread and correct or to suppress, must need to introduce extra power electronic device, further reduced so again power density and the efficiency of electric power system, in order to address the above problem, study the power supply of new topological structure and control technology, improve the efficiency of power supply, it is particularly important that power density and power factor just become.

Matrix converter has that energy two-way circulates, sinusoidal input and output electric current, input power factor are controlled, output voltage amplitude and phase place is controlled, without plurality of advantages such as intermediate energy storage link and compact conformations, matrix converter is applied to high-voltage DC power supply and will significantly improves the power density of power supply.

The modulation algorithm of current matrix converter is mainly divided into AV modulation algorithm, instantaneous voltage composition algorithm and space vector modulation algorithm.These modulation algorithm relative complex, amount of calculation is larger, the more important thing is and can not be useful in high frequency (tens kHz) output occasion.The commutation strategy of current matrix converter is mainly divided into voltage-type and current mode commutation strategy, for realizing reliable change of current input, need the larger inductance of series connection to prevent input short, output needs to adopt clamp circuit to prevent output open circuit, and these methods are not suitable for the topological circuit of current high-frequency work yet.

The matrix converter that is applied in high frequency output occasion is called high-frequency ac chain, and along with the major loop type connecing after matrix switch and the difference of mode of operation, the control strategy of matrix switch, commutation strategy are all different, can not use for reference existing method; For reduce power supply output ripple, improve input side power factor, reduce main circuit current peak value simultaneously, need research application to be applicable to Novel Control and the commutation strategy of current topological circuit and mode of operation.

Summary of the invention

To be solved by this invention, be exactly the deficiency for above-mentioned conventional matrix converter, a kind of control method and device of realizing the AC-DC series resonance matrix converter of voltage stabilizing output proposed.

The present invention solves the problems of the technologies described above adopted technical scheme: a kind of control method of AC-DC series resonance matrix converter, it is characterized in that, and comprise the following steps:

A. Real-time Collection load voltage V ₀three-phase input phase voltage u with three-phase voltage source _a, u _b, u _c;

B. the three-phase input phase voltage u arriving according to Real-time Collection _a, u _b, u _crelative size relation, each input is divided into 12 intervals in phase voltage cycle, in each is interval, polarity and the size of phase voltage are determined, and keep monotone variation, described 12 intervals are specially:

Interval I: u _a> u _c> u _b, U _p=u _a, U _m=u _c, U _n=u _b;

Interval II: u _a> u _b> u _c, U _p=u _a, U _m=u _b, U _n=u _c;

Interval III: u _a> u _b> u _c, U _p=u _c, U _m=u _b, U _n=u _a;

Interval IV: u _b> u _a> u _c, U _p=u _c, U _m=u _a, U _n=u _b;

Interval V: u _b> u _a> u _c, U _p=u _b, U _m=u _a, U _n=u _c;

Interval VI: u _b> u _c> u _a, U _p=u _b, U _m=u _c, U _n=u _a;

Interval VII: u _b> u _c> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval VIII: u _c> u _b> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval IX: u _c> u _b> u _a, U _p=u _c, U _m=u _b, U _n=u _a;

Interval X: u _c> u _a> u _b, U _p=u _c, U _m=u _a, U _n=u _b;

Interval XI: u _c> u _a> u _b, U _p=u _b, U _m=u _a, U _n=u _c;

Interval XII: u _a> u _c> u _b, U _p=u _b, U _m=u _c, U _n=u _a;

U wherein _pamplitude is maximum, U _mamplitude is minimum; Define high line voltage U _j=| U _p-U _n|, low line voltage U _k=| U _p-U _m|;

C. adopt low line voltage U _k, high line voltage U _jand the common compound mode participating in of 0 voltage completes excitation, adopt the mode of operation of 6 processes, the positive half cycle of resonance current and negative half period all carry out 2 changes of current and all comprise 3 courses of work, and the polarity of positive-negative half-cycle driving voltage is contrary, is specially: the 1st course of work adopts low line voltage U _k, the 2nd course of work adopts high line voltage U _j, the 3rd course of work adopts 0 voltage, and the 4th course of work adopts low line voltage-U _k, the 5th course of work adopts high line voltage-U _j, the 6th course of work adopts 0 voltage; Suppose in the 1-2 course of work, from U _mflowing out mutually the quantity of electric charge is Q ₁, from U _nflowing out mutually the quantity of electric charge is Q ₂, in the 4-5 course of work, flow out U _mthe quantity of electric charge of phase is Q ₃, flow out U _nthe quantity of electric charge of phase is Q ₄, the modulation strategy accurately distributing according to the quantity of electric charge, at a resonance current in the half period, flows out homophase not or the ratio of the quantity of electric charge that flows into equals the ratio of phase voltage absolute value separately, can obtain electric charge allocation proportion:

D. according to resonant capacitance voltage peak uc _maxwith load voltage V ₀, obtain the low line voltage U of order access _k, high line voltage U _jwith time that in 0 voltage, each voltage need to access and some switching time of three voltages;

E. according to the residing interval of operation time electrical network phase voltage and the sense of current that needs output, and according to the course of work described in step c, distribute the Switch State Combination in Power Systems of corresponding power switch;

F. according to the general timing control signal of dot generation switching time of three of steps d gained voltages, control the switching between each course of work;

G. according to the control of step f, complete selection and the switching that three-phase is alternate, whether the work that judges finishes, and if so, exits, and if not, gets back to step a.

Concrete, the concrete grammar of steps d is:

According to series resonant converter operating characteristic, the product value that the resonant capacitance voltage of take is transverse axis, resonance current i and characteristic impedance Z is longitudinal axis structure plane right-angle coordinate, resonant circuit characteristic impedance

wherein Lr is resonant inductance value, and Cr is resonant capacitance value, supposes that track corresponding to 3 courses of work of the positive half cycle of resonance current is for respectively with O ₁, O ₂, O ₃for the center of circle and respectively with R ₁, R ₂, R ₃for the circular arc being connected of radius, tie point is P ₁and P ₂, driving voltage is respectively high line voltage U _j, low line voltage U _kwith 0 voltage, definition O ₁=U _k-V ₀, O ₂=U _j-V ₀, O ₃=-V ₀, in electric current positive half period, suppose that resonant capacitance voltage variety corresponding to the 1st and the 2nd course of work is respectively Δ uc ₁with Δ uc ₂, Δ uc ₁with Δ uc ₂ratio with and quantity of electric charge Q corresponding to this two process ₁and Q ₂ratio equate, capacitance voltage peak value is uc _max, during steady operation, the positive maximum of resonant capacitance voltage equates with negative maximum, thus the zero hour that is 0 at electric current can be decided to be-uc of corresponding resonant capacitance starting voltage _max, establish tie point P ₁and P ₂corresponding abscissa value is u respectively ₁and u ₂, i.e. u ₁be that the 1st process finishes rear resonant capacitance voltage, u ₂be that the 2nd process finishes rear resonant capacitance voltage, pass through formula:

$\left\{\begin{array}{c}{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{(O_2-u_1)}^2+{(O_1-u_1)}^2={{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2\\ {{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{(u_2-O_2)}^2+{(u_2-O_3)}^2={R_3}^2\\ {\mathrm{uc}}_{\max }=R_1-O_1\\ R_3={\mathrm{uc}}_{\max }-O_3=R_1-O_1-O_3\end{array}\right.$

First two can obtain:

$\left\{\begin{array}{c}{(u_1-O_2)}^2-{(u_1-O_1)}^2={{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2\\ {(u_2-O_3)}^2-{(u_2-O_2)}^2={(R_1-O_1-O_3)}^2-{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2\end{array}\right.$

After simplification:

${\mathrm{<figure-callout\; id="1"\; label="u"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">u</figure-callout>}}_1=[\frac{{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2}{O_1-{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}+({\mathrm{<figure-callout\; id="1"\; label="O"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">O</figure-callout>}}_1+O_2)]/2$

${\mathrm{<figure-callout\; id="2"\; label="u"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">u</figure-callout>}}_2=[\frac{{(R_1-O_1-O_3)}^2-{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2}{O_2-O_3}+(O_2+O_3)]/2$

According to electric charge assignment constraints condition:

$K=\frac{Q_1}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}=\frac{\mathrm{C\&Delta;}{\mathrm{<figure-callout\; id="1"\; label="uc"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">uc</figure-callout>}}_1}{\mathrm{C\&Delta;}{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}_2}=\frac{u_1-(-{\mathrm{uc}}_{\max })}{u_2-{\mathrm{<figure-callout\; id="1"\; label="u"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">u</figure-callout>}}_1}$

Can obtain:

${\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2=\sqrt{\frac{K(O_1-O_2)({{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}^2}_{\max }+{{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}^2-2{\mathrm{uc}}_{\max }{O}_3)+(1+K)(O_2-O_3)({{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}^2}_{\max }={{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}^2+{2\mathrm{uc}}_{\max }{O}_1)-2{\mathrm{uc}}_{\max }(O_1-O_2)(O_2-O_3)}{(O_2-O_3)+K(O_1-O_3)}}$

According to uc _max, O ₁, O ₂, O ₃can obtain u with K value ₁and u ₂value;

If the radian that the first course of work track is corresponding is θ ₁, radian that the second course of work track is corresponding is θ ₂, radian that the 3rd course of work track is corresponding is θ ₃, its corresponding expression formula is respectively:

${\mathrm{\&theta;}}_1={\cos }^{-1}\left(\frac{O_1-u_1}{R_1}\right)$

${\mathrm{\&theta;}}_2=\mathrm{\&pi;}-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_1}\right)-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_2}\right)=\mathrm{\&pi;}-{\cos }^{-1}\left(\frac{u_2-O_2}{R_2}\right)-{\cos }^{-1}\left(\frac{O_2-u_1}{R_2}\right)$

${\mathrm{\&theta;}}_3={\cos }^{-1}\left(\frac{u_2-O_3}{R_3}\right)$

According to θ=ω t, can obtain: the first course of work end time t ₁=θ ₁/ ω, the second course of work end time t ₂=(θ ₁+ θ ₂)/ω, the 3rd course of work end time t ₃=(θ ₁+ θ ₂+ θ ₃)/ω; Wherein ω is resonance angular frequency,

can obtain respectively switching point time t ₁, t ₂and t ₃.

A kind of control device of AC-DC series resonance matrix converter, comprise three phase mains 2, filter 3, electromagnetic interface filter 4, rectification silicon stack 17 and filter circuit 18, it is characterized in that, also comprise switch matrix 1, trigger drive circuit 16, fault secure circuit, zero-crossing comparator circuit 5, phase detection unit 6, voltage acquisition module 15, load voltage Acquisition Circuit 11, Closed Loop Control Unit 10, control parameter calculation unit 9, sequential generation unit 8 and on off state control unit 7, described fault secure circuit comprises electric network fault testing circuit 12, over-current detection circuit 13 and excess temperature testing circuit 14, the phase voltage of described three phase mains 2 is connected with switch matrix 1 by filter 3, and the no-voltage of three phase mains 2 is connected with electric network fault testing circuit 12, zero-crossing comparator circuit 5 and voltage acquisition module 15 respectively by electromagnetic interface filter 4 with phase voltage, zero-crossing comparator circuit 5 is connected with the input of phase detection unit 6, output of phase detection unit 6 and the output of voltage acquisition module 15 are connected with the input of controlling parameter calculation unit 9, the output of controlling parameter calculation unit 9 is connected with the input of sequential generation unit 8, the output of sequential generation unit 8, the output of another output of phase detection unit 6 and over-current detection circuit 13 and excess temperature testing circuit 14 is connected with the input of on off state control unit 7, the output of on off state control unit 7 is connected with the input that triggers drive circuit 16, switch matrix 1 connects the output that triggers drive circuit 16, the input of one end of rectification silicon stack 17 and over-current detection circuit 13, the input of excess temperature testing circuit 14 connects rectification silicon stack 17, the other end of rectification silicon stack 17 connects filter circuit 18 and load voltage Acquisition Circuit 11, the output of load voltage Acquisition Circuit 11 connects the input of closed loop controller 10, the output of closed loop controller 10 connects the input of controlling parameter calculation unit 9, wherein,

Zero-crossing comparator circuit 5 is by each phase voltage of three phase mains 2 inputs by changing the digital signal consistent with each phase voltage polarity into the zero balancing of crossing of zero line, and this digital signal is transferred to phase detection unit 6 and on off state control unit 7 after digital filtering;

Load voltage Acquisition Circuit 11 gathers and actually outputs to the voltage of loading section and be delivered to Closed Loop Control Unit 10, and Closed Loop Control Unit 10 is according to definite value and real output value comparison and calculate controlled quentity controlled variable and input to control parameter calculation unit 9;

6 pairs of electrical network polar signals of phase detection unit are followed the tracks of and are synchronous, polar signal width is measured to identify electrical network and whether have fault, according to the front and back of polar signal, change and obtain electrical network phase sequence, synchronized counter value is corresponding with the phase place of electrical network, according to this value, can indirectly obtain the phase place of electrical network, interval for the difference under the same electrical network polarity of aid in treatment, and the charge analysis ratio K that obtains not needing in the same time, the transfer of data that phase detection unit 6 obtains is given and is controlled parameter calculation unit 9 and on off state control unit 7;

Control parameter calculation unit 9 according to the data of the phase detection unit 6 receiving and voltage acquisition module 15 transmission, draw the current cycle under current state and the time that need to switch phase, the time controlled quentity controlled variable obtaining is transferred to sequential generation unit 8;

Sequential generation unit 8 produces the clock signal of control switch according to the signal receiving, and control signal is transferred to on off state control unit 7;

The data that the clock signal that on off state control unit 7 bases receive and phase detection unit 6 provide, judgement electrical network interval of living in, and the positive and negative electric current outbound course selection the replacing switch number corresponding with sequential generation unit 8 output 12 road signals, switch selects the control signal corresponding with actual switch position of module 7 outputs through switch driving circuit 16 driving switch matrixes 1, to complete the control of inverter main circuit.

Beneficial effect of the present invention is that matrix converter, for high-power DC power supply, has been improved to whole power density.The mode of operation that adopts series resonance to cross resonance is compared with adopting discontinuous mode under Same Efficieney: while meeting same ripple demand, the filter capacitor capacity of needs is less, adjusts speed faster; And main circuit current peak reduction half, reduced the current stress of switch; The electric current of the bidirectional switch that current commercialization is simultaneously packaged is 400A grade, can just in time be suitable for the device of the 100kW that adopts current scheme; Proposed in high-frequency current half period simultaneously, adopt driving voltage first from low line voltage, to be switched to high line voltage, and then be switched to the control strategy of 0 voltage, realized the instantaneous synthetic of 3 voltages, when realizing equivalent driving voltage adjusting, also make the mean value of every phase input line electric current be proportional to phase voltage, only need less filter inductance value can realize high power factor and the electric current of low harmonic wave, mean that size, weight and the loss of inductance greatly reduces.

Accompanying drawing explanation

Fig. 1 is the topological structure of AC-DC matrix converter;

Fig. 2 is positive half cycle working state figure;

Fig. 3 is the schematic diagram that comprises 6 courses of work;

Fig. 4 is that the switch in one-period is controlled and change of current sequential chart;

Fig. 5 is electrical network phase voltage operation interval division figure;

Fig. 6 is that control method FPGA of the present invention realizes block diagram;

Fig. 7 is control device structural representation of the present invention.

Embodiment

Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail:

For series resonant converter, the load circuit being composed in parallel with load by output filter capacitor is connected with resonant tank, the resonance current load circuit of flowing through completely, thus the adjusting by the adjusting of resonance current being realized to output voltage is with stable.Due to the resonance current resonant capacitance of flowing through completely, and capacitance voltage variable quantity is directly proportional to current integration value, current cycle time substantially constant while supposing stable state, each periodic current mean value is also directly proportional to capacitance voltage variable quantity so, and the present invention is with resonant capacitance voltage peak (uc _max) as controlled quentity controlled variable, characterize the operating state of resonant tank; Closed-loop control according to Real-time Collection to load voltage and setting voltage carry out closed-loop control computing and obtain the controlled quentity controlled variable uc needing _max.

Concrete control method of the present invention is:

1. because be serially connected in load voltage (being equivalent to voltage source) in loop by measuring, and resonant parameter is certain, in order to realize the operating state of expectation of the present invention, just need to regulate equivalent driving voltage; The voltage that is currently available for excitation is the combination of electrical network phase voltage, the three-phase input phase voltage u arriving according to Real-time Collection _a, u _b, u _crelative size relation, each input is divided into 12 intervals in phase voltage cycle, in each is interval, polarity and the size of phase voltage are determined, and keep monotone variation, described 12 intervals are specially:

Interval I: u _a> u _c> u _b, U _p=u _a, U _m=u _c, U _n=u _b;

Interval II: u _a> u _b> u _c, U _p=u _a, U _m=u _b, U _n=u _c;

Interval III: u _a> u _b> u _c, U _p=u _c, U _m=u _b, U _n=u _a;

Interval IV: u _b> u _a> u _c, U _p=u _c, U _m=u _a, U _n=u _b;

Interval V: u _b> u _a> u _c, U _p=u _b, U _m=u _a, U _n=u _c;

Interval VI: u _b> u _c> u _a, U _p=u _b, U _m=u _c, U _n=u _a;

Interval VII: u _b> u _c> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval VIII: u _c> u _b> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval IX: u _c> u _b> u _a, U _p=u _c, U _m=u _b, U _n=u _a;

Interval X: u _c> u _a> u _b, U _p=u _c, U _m=u _a, U _n=u _b;

Interval XI: u _c> u _a> u _b, U _p=u _b, U _m=u _a, U _n=u _c;

Interval XII: u _a> u _c> u _b, U _p=u _b, U _m=u _c, U _n=u _a;

U wherein _pamplitude is maximum, U _mamplitude is minimum; Definition U _j=| U _p-U _n| and U _k=| U _p-U _m|, U _jfor high line voltage, U _kfor low line voltage.

2. adopt low line voltage (U _k), high line voltage (U _j) and the common compound mode participating in of 0 voltage complete excitation, adopt the mode of operation of 6 processes, the positive half cycle of resonance current and negative half period all carry out 2 changes of current and all comprise 3 courses of work, and the polarity of positive-negative half-cycle driving voltage is contrary, is specially: the 1st course of work adopts low line voltage U _k, the 2nd course of work adopts high line voltage U _j, the 3rd course of work adopts 0 voltage, and the 4th course of work adopts low line voltage-U _k, the 5th course of work adopts high line voltage-U _j, the 6th course of work adopts 0 voltage; Suppose in the 1-2 course of work, from U _mflowing out mutually the quantity of electric charge is Q ₁, from U _nflowing out mutually the quantity of electric charge is Q ₂, in the 4-5 course of work, flow out U _mthe quantity of electric charge of phase is Q ₃, flow out U _nthe quantity of electric charge of phase is Q ₄, the modulation strategy accurately distributing according to the quantity of electric charge, at a resonance current in the half period, flows out homophase not or the ratio of the quantity of electric charge that flows into equals the ratio of phase voltage absolute value separately, and ratio K value obtains by tabling look-up, and electric charge allocation proportion is:

$\frac{Q_1}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}=\frac{Q_3}{{\mathrm{<figure-callout\; id="4"\; label="Q"\; filenames="HDA0000432119810000032.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">Q</figure-callout>}}_4}=K.$

3. adopt state diagram as analyzing the synthetic method as driving source of series resonance 3 voltage transients, and by the controlled parameter of the method.

Variable declaration: driving voltage is selectable three: high line voltage U _j, low line voltage U _kwith 0 voltage; Load voltage equivalence is V to primary ₀, resonant capacitance voltage is uc, u ₁be that the 1st process finishes rear resonant capacitance voltage, u ₂be that the 2nd process finishes rear resonant capacitance voltage, resonant capacitance voltage peak is uc _max, resonance current is i, and resonant circuit characteristic impedance is Z, and resonance angular frequency is ω, and phase angle is θ, and run duration is t, and Lr is resonant inductance value, and Cr is resonant capacitance value.

Wherein $\mathrm{\&omega;}=1/\sqrt{\mathrm{Lr}\&CenterDot;\mathrm{Cr}},Z=\sqrt{\mathrm{Lr}/\mathrm{Cr}};$

Definition O ₁=U _k-V ₀, O ₂=U _j-V ₀, O ₃=-V ₀; (1)

As shown in Figure 2, transverse axis is resonant capacitance voltage in state diagram corresponding to the positive half cycle course of work of electric current, and the longitudinal axis is the product value of resonance current i and characteristic impedance Z; l ₁, l ₂, l ₃for three tracks that the course of work is corresponding of the positive half cycle of electric current, respectively with O ₁, O ₂, O ₃for the center of circle, respectively with R ₁, R ₂, R ₃the circular arc being connected for radius; In electric current positive half period, Δ uc ₁with Δ uc ₂be respectively resonant capacitance voltage variety corresponding to the 1st and the 2nd course of work, ratio with and quantity of electric charge Q corresponding to this two process ₁and Q ₂ratio equate.

The upper center of circle (the O of state diagram (Fig. 2) ₁, O ₂, O ₃) parameter is according to method described in b and expression formula (1) obtains and be basicly stable known quantity, capacitance voltage peak value uc _maxit is the known quantity that the controlled amount of closed-loop control is also; During steady operation, the positive maximum of resonant capacitance voltage equates with negative maximum, thus the zero hour that is 0 at electric current can be decided to be-uc of corresponding resonant capacitance starting voltage _max.Radius R in Fig. 2 so ₁and R ₃known, if radius R ₂also determine, so circular arc intersection point P ₁and P ₂just determine, thereby state diagram parameter is all determined;

R ₂value be related to P ₁and P ₂position (u ₁and u ₂), and this position relationship of 2 is subject to electric charge distributive condition (Δ uc ₁with Δ uc ₂there is certain proportion relation) restriction, adopt R ₂represent u ₁and u ₂, then be updated in ratio restrictive condition and just can calculate R ₂, after state diagram is determined, according to the geometrical relationship in state diagram, can calculate the phase angle θ that every section of circular arc (process) is corresponding, thereby obtain 3 timing node t of time control parameter according to θ=ω t ₁～t ₃.

The geometrical-restriction relation that state diagram is stable:

$\left\{\begin{array}{c}{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{(O_2-u_1)}^2+{(O_1-u_1)}^2={{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2\\ {{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{(u_2-O_2)}^2+{(u_2-O_3)}^2={R_3}^2\\ {\mathrm{uc}}_{\max }=R_1-O_1\\ R_3={\mathrm{uc}}_{\max }-O_3=R_1-O_1-O_3\end{array}\right.---\left(2\right)$

After front two arrangements of formula (2), can obtain:

$\left\{\begin{array}{c}{(u_1-O_2)}^2-{(u_1-O_1)}^2={{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2\\ {(u_2-O_3)}^2-{(u_2-O_2)}^2={(R_1-O_1-O_3)}^2-{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2\end{array}\right.---\left(3\right)$

After being simplified, formula (3) can obtain expression formula:

${\mathrm{<figure-callout\; id="1"\; label="u"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">u</figure-callout>}}_1=[\frac{{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2-{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}^2}{O_1-{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}+({\mathrm{<figure-callout\; id="1"\; label="O"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">O</figure-callout>}}_1+O_2)]/2---\left(4\right)$

${\mathrm{<figure-callout\; id="2"\; label="u"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">u</figure-callout>}}_2=[\frac{{(R_1-O_1-O_3)}^2-{{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}^2}{O_2-O_3}+({\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2+O_3)]/2---\left(5\right)$

Electric charge assignment constraints condition:

$K=\frac{Q_1}{{\mathrm{<figure-callout\; id="2"\; label="Q"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">Q</figure-callout>}}_2}=\frac{\mathrm{C\&Delta;}{\mathrm{<figure-callout\; id="1"\; label="uc"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">uc</figure-callout>}}_1}{\mathrm{C\&Delta;}{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}_2}=\frac{u_1-(-{\mathrm{uc}}_{\max })}{u_2-u_1}---\left(6\right)$

Wushu (4) and formula (5) are brought in formula (6), after arranging, can obtain R ₂expression formula (7) is as follows:

${\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2=\sqrt{\frac{K(O_1-O_2)({{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}^2}_{\max }+{{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}^2-2{\mathrm{uc}}_{\max }{O}_3)+(1+K)(O_2-O_3)({{\mathrm{<figure-callout\; id="2"\; label="uc"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">uc</figure-callout>}}^2}_{\max }={{\mathrm{<figure-callout\; id="2"\; label="O"\; filenames="HDA0000432119810000012.png,HDA0000432119810000031.png"\; state="\{\{state\}\}">O</figure-callout>}}_2}^2+{2\mathrm{uc}}_{\max }{O}_1)-2{\mathrm{uc}}_{\max }(O_1-O_2)(O_2-O_3)}{(O_2-O_3)+K(O_1-O_3)}}$

Uc wherein _maxknown; O ₁, O ₂, O ₃by formula (1), obtained; R ₁=uc _max+ O ₁, R ₃=uc _max-O ₃; K obtains by tabling look-up, thereby can calculate crucial intermediate quantity R according to formula (6) ₂.

The R that formula (7) is obtained ₂value substitution formula (5) can obtain u ₂value;

After being arranged, formula (6) can obtain:

${\mathrm{<figure-callout\; id="1"\; label="u"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">u</figure-callout>}}_1=\frac{{\mathrm{Ku}}_2-u_{c\_\mathrm{<figure-callout\; id="1"\; label="max"\; filenames="HDA0000432119810000021.png,HDA0000432119810000041.png"\; state="\{\{state\}\}">max</figure-callout>}}}{1+K}---\left(8\right)$

The u that formula (5) is obtained ₂value substitution formula (8) can obtain u ₁;

Each circular arc (l in state diagram ₁～l ₃) expression formula of corresponding angle is as follows:

${\mathrm{\&theta;}}_1={\cos }^{-1}\left(\frac{O_1-u_1}{R_1}\right)---\left(9\right)$

${\mathrm{\&theta;}}_2=\mathrm{\&pi;}-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_1}\right)-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_2}\right)=\mathrm{\&pi;}-{\cos }^{-1}\left(\frac{u_2-O_2}{R_2}\right)-{\cos }^{-1}\left(\frac{O_2-u_1}{R_2}\right)---\left(10\right)$

${\mathrm{\&theta;}}_3={\cos }^{-1}\left(\frac{u_2-O_3}{R_3}\right)---\left(11\right)$

According to θ=ω t, can obtain:

t ₁＝θ ₁/ω (12)

t ₂＝(θ ₁+θ ₂)/ω (13)

t ₃＝(θ ₁+θ ₂+θ ₃)/ω (14)

According to formula (12)～(14), try to achieve the required switching point time of controlling.

4. according to the residing interval of operation time electrical network phase voltage, the course of work by 2. described, obtains according to 3. solving the control that the switching point time completes a current cycle;

The short time of switching between same polarity, matrix switch constantly all keeps diconnected to resonant tank at other; If it is open-minded that " 1 " represents, " 0 " represents to turn-off, under different condition, just like the switching signal of following table 1-table 4.

The interval two-way power switch combinations of states race-card of table 1 the 1st to 3 (accompanying drawing 1 is seen in the position of the switch)

The interval two-way power switch combinations of states race-card of table 2 the 4th to 6

The interval two-way power switch combinations of states race-card of table 3 the 7th to 9

The interval two-way power switch combinations of states race-card of table 4 the 10th to 12

5. adopt voltage-type " the two step changes of current " and " the four step changes of current " strategy to switch for different operating process, the driving voltage of resonant tank is by upper arm voltage (H ₁point) and underarm voltage (H ₂) poor (the seeing Fig. 1 and Fig. 3) realized, the combination that the different driving voltage correspondence of resonant tank to different upper arm and underarm voltage; The change of current can Yi Beiwei unit be carried out selection and the switching that three-phase is alternate, and upper arm is by S ₁～S ₆form, underarm is by S ₇～S ₁₂form, electrical network phase voltage operation interval is divided as shown in Figure 5, and with electric network state, in the 1st interval, the full current cycle is example, and the on off state that upper arm and underarm comprise the change of current is as follows:

Upper arm:

Process 1～process 3:(S ₁+ S ₂+ S ₄+ S ₆); Do not need the change of current;

Process 3 (S ₁+ S ₂+ S ₄+ S ₆) → (S ₁+ S ₆) → process 4 (S ₁+ S ₅+ S ₆); Need 2 steps to complete the change of current;

Process 4 (S ₁+ S ₅+ S ₆) → (S ₁+ S ₅) → (S ₁+ S ₃+ S ₅) → (S ₁+ S ₃) → process 5 (S ₁+ S ₃+ S ₄); Need 4 steps to complete the change of current;

Process 5 (S ₁+ S ₃+ S ₄) → (S ₁+ S ₄) → process 6 (S ₁+ S ₂+ S ₄+ S ₆); Need 2 steps to complete the change of current;

Underarm:

Process 1:(S ₈+ S ₁₁+ S ₁₂) → (S ₈+ S ₁₂) → (S ₈+ S ₁₀+ S ₁₂) → (S ₈+ S ₁₀) → process 2 (S ₈+ S ₉+ S ₁₀); Need 4 steps to complete the change of current;

Process 2 (S ₈+ S ₉+ S ₁₀) → (S ₈+ S ₉) → process 3 (S ₇+ S ₈+ S ₉+ S ₁₁); Need 2 steps to complete the change of current;

Process 3～process 6:(S ₇+ S ₈+ S ₉+ S ₁₁); Do not need the change of current;

For the ease of the control of on off state, on off state is controlled to functional module and be divided into two submodules: sequential generation module and switch are selected module; Sequential generation module is according to the t calculating described in d ₁～t ₃generation and electric network state and the sense of current have nothing to do, but include change of current operation 12 road clock signal, as shown in Figure 4; Switch selects module according to current electrical network interval of living in, and the sense of current selects corresponding switch to be connected with above-mentioned 12 road signals, take the first interval as example, and the selection result of switch selection module is as follows:

Upper arm: S ₁=up_max ₂, S ₂=up_max ₁, S ₃=up_mid ₁, S ₄=up_mid ₂, S ₅=up_min ₁, S ₆=up_min ₂;

Underarm: S ₇=dn_max ₁, S ₈=dn_max ₂, S ₉=dn_mid ₂, S ₁₀=dn_mid ₁, S ₁₁=dn_min ₂, S ₁₂=dn_min ₁;

6. 2. step returns to step after 5. completing, until end-of-job.

A kind of AC-DC series resonance matrix converter control device of DC voltage-stabilizing output, as shown in Figure 7, comprise that series resonant tank, three phase mains 2, filter 3, switch matrix 1, series resonant tank, high frequency transformer and silicon stack 17, output filter circuit 18 form; The controller 6～10 that control system is control core by traffic filter 4, zero passage comparison circuit 5, power grid voltage detection circuit 15, electric network fault testing circuit 12, load voltage Acquisition Circuit 11, switch matrix drive circuit 16, over-current detection circuit 13, excess temperature testing circuit 14 and the FPGA of take; Controller inside selects module 7, sequential generation unit 8, control parameter calculation unit 9 and Closed Loop Control Unit 10 to form by phase detection unit 6, switch.

Described three phase mains 2 is connected with switch matrix 1 by filter 3, and switch matrix 1 is connected with series resonant circuit, series resonant circuit is connected with rectification silicon stack 17 with transformer by output filter circuit 18 connection loads.The neutral line of three phase mains 2 is connected with electric network fault testing circuit 12, zero-crossing comparator circuit 5 and voltage acquisition module 15 respectively by electromagnetic interface filter 4 with three-phase voltage, zero-crossing comparator circuit 5 is connected with the input of phase detection unit 6, and an output of phase detection unit 6 is connected with control parameter calculation unit 9, obtains the required address of K for tabling look-up, load voltage Acquisition Circuit 11 connects Closed Loop Control Unit 10, Closed Loop Control Unit is according to set point and real output value comparison and calculate controlled quentity controlled variable and input to and control parameter calculation unit 9, the line voltage that control parameter calculation unit 9 obtains according to power grid voltage detection circuit 15 and the K value obtaining of tabling look-up calculate the required time controlled quentity controlled variable of control, and flow to sequential generation unit 8, sequential generation unit 8 generates 12 tunnel control signals according to certain change of current sequential and flows to switch selects module 7, switch selects module 7 according to phase detection unit 6 judgement electrical network intervals of living in, and the positive and negative electric current outbound course replacing is selected the switch number corresponding with sequential generation unit 8 output 12 road signals, switch selects the control signal corresponding with actual switch position of module 7 outputs through switch driving circuit 16 driving switch matrixes 1, to complete the control of inverter main circuit.Failure detector circuit comprises that electric network fault testing circuit 12 detects that electrical network is abnormal, over-current detection circuit 13 current anomaly detected and excess temperature testing circuit 14 detects after excess Temperature; fault-signal is flowed to switch and select module 7, switch selects module 7 latch fault detected after fault-signal immediately and turn-off the execution that all switches complete protection action.

The input of zero-crossing comparator circuit 5 is connected with electrical network three-phase alternating current 2, by each phase voltage of input, by changing the digital signal consistent with each phase voltage polarity into the zero balancing of crossing of zero line, this signal is transferred to phase detection unit 6 and on off state control unit 7 after digital filtering.

6 pairs of electrical network polar signals of phase detection unit are followed the tracks of and are synchronous, polar signal width is measured to identify electrical network and whether have fault, according to the front and back of polar signal, change and obtain electrical network phase sequence, synchronized counter value is corresponding with the phase place of electrical network, according to this value, can indirectly obtain the phase place of electrical network, interval for the difference under the same electrical network polarity of aid in treatment, and the charge analysis ratio K that obtains not needing in the same time.

Voltage acquisition 15 modules obtain the real-time voltage after each commutating phase of electrical network, in conjunction with electrical network polarity, select to obtain mutually actual driving voltage with the excitation needing, and pass to computing unit 9, computing unit 9 calculates the required timing node t of control under current state according to actual driving voltage, equivalence to the load voltage of primary, the controlled quentity controlled variable that ratio k, harmonic period and the closed-loop control of electric charge distribution provide ₁～t ₆, final realization when exporting voltage of voltage regulation, grid side has High Power Factor, the feature of low harmonic wave.

Each process material time node (t that sequential generation unit 8 provides according to time slot demand and the computing unit of the change of current ₁, t ₂, t ₃, t ₄, t ₅, t ₆) and produce and 6 types of clock signals (seeing accompanying drawing 4) that switch is corresponding, wherein min ₁, mid ₁, max ₁be respectively minimum phase, middle mutually and maximal phase and be the switching signal of circulating current, min ₂, mid ₂, max ₂be respectively minimum phase, middle mutually and the auxiliary switch signal of maximal phase, reality is current flowing not substantially.

The confession auxiliary signal that on off state control unit 7 provides according to electrical network polarity, phase detection unit 6 and electric current outbound course, select the concrete switch number corresponding with dissimilar switch, selected switching signal is subject to the control of sequential generation unit 8 output timings, and pass to triggering drive circuit 10 and carried out, it is example that the switch of electrical network in I interval of take controlled, and switching signal logic selects expression formula as follows:

Upper arm: S ₁=up_max ₂, S ₂=up_max ₁, S ₃=up_mid ₁, S ₄=up_mid ₂, S ₅=up_min ₁, S ₆=up_min ₂;

Underarm: S ₇=dn_max ₁, S ₈=dn_max ₂, S ₉=dn_mid ₂, S ₁₀=dn_mid ₁, S ₁₁=dn_min ₂, S ₁₂=dn_min ₁;

Trigger drive circuit 16 by triggering after the signal power amplification of drive circuit 10 transmission, gate pole triggering signal each two-way power switch 1 to matrix converter is provided.

Fault secure circuit comprises three-phase input detecting circuit 12, current foldback circuit 13, and thermal-shutdown circuit 14, output connects on off state control unit 7, closes all switches and realize error protection while having fault.The input of three-phase input detecting circuit connection matrix converter, measures three-phase input overvoltage, under-voltage, phase shortage and imbalance fault.Current foldback circuit connects series resonance unit, measures resonance current, realizes overcurrent protection.Thermal-shutdown circuit connects two-way power switch base plate and the fuel tank of transformer and silicon stack is installed, and realizes excess temperature and detects and protect.

In control device of the present invention, zero-crossing comparator 5 circuit are arranged between three-phase input power 2 and input filter 3, before three-phase signal enters zero-crossing comparator circuit again through an electromagnetic interface filter 4, input phase voltage waveform is good, disturb few, zero-crossing comparator circuit 5 adopts simple custom circuit, considers that the voltage-phase that the links such as electromagnetic interface filter cause lags behind, and realizes the compensation of phase place by synchronous correction in phase detection unit 6.Phase detection unit 6, controls parameter calculation unit 9, and sequential generation unit 8 and on off state control unit 7 etc. are realized with field programmable gate array (FPGA), as shown in Figure 6.

Claims (3)

1. a control method for AC-DC series resonance matrix converter, is characterized in that, comprises the following steps:

A. Real-time Collection load voltage V ₀three-phase input phase voltage u with three-phase voltage source _a, u _b, u _c;

B. the three-phase input phase voltage u arriving according to Real-time Collection _a, u _b, u _crelative size relation, each input is divided into 12 intervals in phase voltage cycle, in each is interval, polarity and the size of phase voltage are determined, and keep monotone variation, described 12 intervals are specially:

Interval I: u _a> u _c> u _b, U _p=u _a, U _m=u _c, U _n=u _b;

Interval II: u _a> u _b> u _c, U _p=u _a, U _m=u _b, U _n=u _c;

Interval III: u _a> u _b> u _c, U _p=u _c, U _m=u _b, U _n=u _a;

Interval IV: u _b> u _a> u _c, U _p=u _c, U _m=u _a, U _n=u _b;

Interval V: u _b> u _a> u _c, U _p=u _b, U _m=u _a, U _n=u _c;

Interval VI: u _b> u _c> u _a, U _p=u _b, U _m=u _c, U _n=u _a;

Interval VII: u _b> u _c> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval VIII: u _c> u _b> u _a, U _p=u _a, U _m=u _b, U _n=u _c;

Interval IX: u _c> u _b> u _a, U _p=u _c, U _m=u _b, U _n=u _a;

Interval X: u _c> u _a> u _b, U _p=u _c, U _m=u _a, U _n=u _b;

Interval XI: u _c> u _a> u _b, U _p=u _b, U _m=u _a, U _n=u _c;

Interval XII: u _a> u _c> u _b, U _p=u _b, U _m=u _c, U _n=u _a;

U wherein _pamplitude is maximum, U _mamplitude is minimum; Define high line voltage U _j=| U _p-U _n|, low line voltage U _k=| U _p-U _m|;

C. adopt low line voltage U _k, high line voltage U _jand the common compound mode participating in of 0 voltage completes excitation, adopt the mode of operation of 6 processes, the positive half cycle of resonance current and negative half period all carry out 2 changes of current and all comprise 3 courses of work, and the polarity of positive-negative half-cycle driving voltage is contrary, is specially: the 1st course of work adopts low line voltage U _k, the 2nd course of work adopts high line voltage U _j, the 3rd course of work adopts 0 voltage, and the 4th course of work adopts low line voltage-U _k, the 5th course of work adopts high line voltage-U _j, the 6th course of work adopts 0 voltage; Suppose in the 1-2 course of work, from U _mflowing out mutually the quantity of electric charge is Q ₁, from U _nflowing out mutually the quantity of electric charge is Q ₂, in the 4-5 course of work, flow out U _mthe quantity of electric charge of phase is Q ₃, flow out U _nthe quantity of electric charge of phase is Q ₄, the modulation strategy accurately distributing according to the quantity of electric charge, at a resonance current in the half period, flows out homophase not or the ratio of the quantity of electric charge that flows into equals the ratio of phase voltage absolute value separately, can obtain electric charge allocation proportion:

D. according to resonant capacitance voltage peak uc _maxwith load voltage V ₀, obtain the low line voltage U of order access _k, high line voltage U _jwith time that in 0 voltage, each voltage need to access and some switching time of three voltages;

E. according to the residing interval of operation time electrical network phase voltage and the sense of current that needs output, and according to the course of work described in step c, distribute the Switch State Combination in Power Systems of corresponding power switch;

F. according to the general timing control signal of dot generation switching time of three of steps d gained voltages, control the switching between each course of work;

G. according to the control of step f, complete selection and the switching that three-phase is alternate, whether the work that judges finishes, and if so, exits, and if not, gets back to step a.

2. the control method of a kind of AC-DC series resonance matrix converter according to claim 1, is characterized in that, the concrete grammar of steps d is:

According to series resonant converter operating characteristic, the product value that the resonant capacitance voltage of take is transverse axis, resonance current i and characteristic impedance Z is longitudinal axis structure plane right-angle coordinate, resonant circuit characteristic impedance

wherein Lr is resonant inductance value, and Cr is resonant capacitance value, supposes that track corresponding to 3 courses of work of the positive half cycle of resonance current is for respectively with O ₁, O ₂, O ₃for the center of circle and respectively with R ₁, R ₂, R ₃for the circular arc being connected of radius, tie point is P ₁and P ₂, driving voltage is respectively high line voltage U _j, low line voltage U _kwith 0 voltage, definition O ₁=U _k-V ₀, O ₂=U _j-V ₀, O ₃=-V ₀, in electric current positive half period, suppose that resonant capacitance voltage variety corresponding to the 1st and the 2nd course of work is respectively Δ uc ₁with Δ uc ₂, Δ uc ₁with Δ uc ₂ratio with and quantity of electric charge Q corresponding to this two process ₁and Q ₂ratio equate, capacitance voltage peak value is uc _max, during steady operation, the positive maximum of resonant capacitance voltage equates with negative maximum, thus the zero hour that is 0 at electric current can be decided to be-uc of corresponding resonant capacitance starting voltage _max, establish tie point P ₁and P ₂corresponding abscissa value is u respectively ₁and u ₂, i.e. u ₁be that the 1st process finishes rear resonant capacitance voltage, u ₂be that the 2nd process finishes rear resonant capacitance voltage, pass through formula:

$\left\{\begin{array}{c}{R_2}^2-{(O_2-u_1)}^2+{(O_1-u_1)}^2={R_1}^2\\ {R_2}^2-{(u_2-O_2)}^2+{(u_2-O_3)}^2={R_3}^2\\ {\mathrm{uc}}_{\max }=R_1-O_1\\ R_3={\mathrm{uc}}_{\max }-O_3=R_1-O_1-O_3\end{array}\right.$

First two can obtain:

$\left\{\begin{array}{c}{(u_1-O_2)}^2-{(u_1-O_1)}^2={R_2}^2-{R_1}^2\\ {(u_2-O_3)}^2-{(u_2-O_2)}^2={(R_1-O_1-O_3)}^2-{R_2}^2\end{array}\right.$

After simplification:

$u_1=[\frac{{R_2}^2-{R_1}^2}{O_1-O_2}+(O_1+O_2)]/2$

$u_2=[\frac{{(R_1-O_1-O_3)}^2-{R_2}^2}{O_2-O_3}+(O_2+O_3)]/2$

According to electric charge assignment constraints condition:

$K=\frac{Q_1}{Q_2}=\frac{\mathrm{C\&Delta;}{\mathrm{uc}}_1}{\mathrm{C\&Delta;}{\mathrm{uc}}_2}=\frac{u_1-(-{\mathrm{uc}}_{\max })}{u_2-u_1}$

Can obtain:

$R_2=\sqrt{\frac{K(O_1-O_2)({{\mathrm{uc}}^2}_{\max }+{O_2}^2-2{\mathrm{uc}}_{\max }{O}_3)+(1+K)(O_2-O_3)({{\mathrm{uc}}^2}_{\max }={O_2}^2+{2\mathrm{uc}}_{\max }{O}_1)-2{\mathrm{uc}}_{\max }(O_1-O_2)(O_2-O_3)}{(O_2-O_3)+K(O_1-O_3)}}$

According to uc _max, O ₁, O ₂, O ₃can obtain u with K value ₁and u ₂value;

If the radian that the first course of work track is corresponding is θ ₁, radian that the second course of work track is corresponding is θ ₂, radian that the 3rd course of work track is corresponding is θ ₃, its corresponding expression formula is respectively:

${\mathrm{\&theta;}}_1={\cos }^{-1}\left(\frac{O_1-u_1}{R_1}\right)$

${\mathrm{\&theta;}}_2=\mathrm{\&pi;}-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_1}\right)-{\cos }^{-1}\left({\mathrm{\&theta;}}_{2\_2}\right)=\mathrm{\&pi;}-{\cos }^{-1}\left(\frac{u_2-O_2}{R_2}\right)-{\cos }^{-1}\left(\frac{O_2-u_1}{R_2}\right)$

${\mathrm{\&theta;}}_3={\cos }^{-1}\left(\frac{u_2-O_3}{R_3}\right)$

According to θ=ω t, can obtain: the first course of work end time t ₁=θ ₁/ ω, the second course of work end time t ₂=(θ ₁+ θ ₂)/ω, the 3rd course of work end time t ₃=(θ ₁+ θ ₂+ θ ₃)/ω; Wherein ω is resonance angular frequency,

can obtain respectively switching point time t ₁, t ₂and t ₃.

3. the control device of an AC-DC series resonance matrix converter, comprise three phase mains (2), filter (3), electromagnetic interface filter (4), rectification silicon stack (17) and filter circuit (18), it is characterized in that, also comprise switch matrix (1), trigger drive circuit (16), fault secure circuit, zero-crossing comparator circuit (5), phase detection unit (6), voltage acquisition module (15), load voltage Acquisition Circuit (11), Closed Loop Control Unit (10), control parameter calculation unit (9), sequential generation unit (8) and on off state control unit (7), described fault secure circuit comprises electric network fault testing circuit (12), over-current detection circuit (13) and excess temperature testing circuit (14), the phase voltage of described three phase mains (2) is connected with switch matrix (1) by filter (3), and the neutral line of three phase mains (2) is connected with electric network fault testing circuit (12), zero-crossing comparator circuit (5) and voltage acquisition module (15) respectively by electromagnetic interface filter (4) with phase voltage, zero-crossing comparator circuit (5) is connected with the input of phase detection unit (6), output of phase detection unit (6) and the output of voltage acquisition module (15) are connected with the input of controlling parameter calculation unit (9), the output of controlling parameter calculation unit (9) is connected with the input of sequential generation unit (8), the output of sequential generation unit (8), the output of another output of phase detection unit (6) and over-current detection circuit (13) and excess temperature testing circuit (14) is connected with the input of on off state control unit (7), the output of on off state control unit (7) is connected with the input that triggers drive circuit (16), switch matrix (1) connects the output that triggers drive circuit (16), the input of resonant tank excitation end and over-current detection circuit (13), the input of excess temperature testing circuit (14) inserts the fuel tank that high frequency transformer and rectification silicon stack (17) are installed, the other end of rectification silicon stack (17) connects filter circuit (18) and load voltage Acquisition Circuit (11), the output of load voltage Acquisition Circuit (11) connects the input of closed loop controller (10), the output of closed loop controller (10) connects the input of controlling parameter calculation unit (9), wherein,

Zero-crossing comparator circuit (5) is by each phase voltage of three phase mains (2) input by changing the digital signal consistent with each phase voltage polarity into the zero balancing of crossing of zero line, and this digital signal is transferred to phase detection unit (6) and on off state control unit (7) after digital filtering;

Load voltage Acquisition Circuit (11) gathers and actually outputs to the voltage of loading section and be delivered to Closed Loop Control Unit (10), and Closed Loop Control Unit (10) is according to definite value and real output value comparison and calculate controlled quentity controlled variable and input to and control parameter calculation unit (9);

Phase detection unit (6) is followed the tracks of electrical network polar signal and is synchronous, polar signal width is measured to identify electrical network and whether have fault, according to the front and back of polar signal, change and obtain electrical network phase sequence, synchronized counter value is corresponding with the phase place of electrical network, according to this value, can indirectly obtain the phase place of electrical network, interval for the difference under the same electrical network polarity of aid in treatment, and the charge analysis ratio K that obtains not needing in the same time, the transfer of data that phase detection unit (6) obtains is given and is controlled parameter calculation unit (9) and on off state control unit (7);

Control parameter calculation unit (9) according to the data of the phase detection unit (6) receiving and voltage acquisition module (15) transmission, draw the current cycle under current state and the time that need to switch phase, the time controlled quentity controlled variable obtaining is transferred to sequential generation unit (8);

Sequential generation unit (8) produces the clock signal of control switch according to the signal receiving, and control signal is transferred to on off state control unit (7);

The data that the clock signal that on off state control unit (7) basis receives and phase detection unit (6) provide, judgement electrical network interval of living in, and the positive and negative electric current outbound course selection the replacing switch number corresponding with sequential generation unit (8) output 12 road signal, switch selects the control signal corresponding with actual switch position of module (7) output through switch driving circuit (16) driving switch matrix (1), to complete the control of inverter main circuit.

Images