CN103647449B - A kind of boost-type charge pump circuit - Google Patents
A kind of boost-type charge pump circuit Download PDFInfo
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- CN103647449B CN103647449B CN201310702976.9A CN201310702976A CN103647449B CN 103647449 B CN103647449 B CN 103647449B CN 201310702976 A CN201310702976 A CN 201310702976A CN 103647449 B CN103647449 B CN 103647449B
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Abstract
The charge pump circuit that the present invention provides does not uses voltage regulator, uses feedback control to be adjusted output voltage peak value, it is ensured that output voltage is adapted to the stepper motor driver of different application；Electric charge pump, by being repeated continuously charge and discharge, maintains stablizing of output voltage, it is ensured that output voltage values is stable with the difference of reference voltage so that output voltage ripple is little, meets the requirement of stepper motor driver；Use current potential to clamp down on module, limit the charging potential of pump electric capacity, improve circuit start efficiency, thus save power consumption.
Description
Technical field
The present invention relates to a kind of charge pump circuit, particularly relate to a kind of booster type electric charge pump for stepper motor driver
Circuit.
Background technology
Fig. 1 shows charge pump circuit known to one, including pump electric capacity Cpump, output capacitance Cout with open
Close circuit；The work process of this charge pump circuit includes in two stages, in the first phase, switching S1 and S4
Being in not on-state, S2 with S3 is in the conduction state for switch so that one end NA coupling of pump electric capacity Cpump
Together in ground, other end NB is coupled in input voltage vin, and pump electric capacity Cpump is charged by power supply so that pump electricity
The potential difference held between two ends NB and NA of Cpump rises to Vin；In second stage, switch S1 and S4
In the conduction state, switch S2 Yu S3 is in not on-state so that the end points NA coupling of pump electric capacity Cpump
Together in input voltage vin, end points NB is coupled in output end vo ut.Thus, when second stage starts, pump electricity
Hold the voltage at the end points NB of Cpump to be improved to 2*Vin by moment from Vin originally, via turned on
Switch S4, this voltage 2*Vin apply output end vo ut, and the shortcoming of this charge pump circuit is only to be provided that fixing
Output voltage Vout at 2*Vin.
In order to provide the output voltage Vout that arbitrarily can adjust between Vin and 2*Vin, in output capacitance Cout
And between output end vo ut, linear voltage regulator is set, as shown in Figure 2.According to reference voltage set in advance
Vref, linear voltage regulator the pump voltage on the electrode NC of output capacitance Cout is converted between Vin with
Output voltage Vout between 2*Vin.Although fixing pump voltage can be turned by linear voltage regulator effectively
Change the adjustable output voltage Vout between Vin and 2*Vin into, but voltage regulator causes conversion effect
Rate declines and wastes the energy.
Additionally, due to stepper motor driver needs the output voltage values of electric charge pump to keep perseverance with the difference of supply voltage
Fixed, and the running voltage of stepper motor driver changes with application system change, and therefore electric charge pump is difficult to
Meet above-mentioned requirements.
Summary of the invention
Because problems of the prior art, it is an object of the present invention to provide a kind of booster type electric charge pump electricity
Road, uses feedback control, adjusts charge pump circuit output voltage, keeps output voltage values and the electricity of electric charge pump simultaneously
The difference of source voltage is stable, to meet the requirement of stepper motor driver.
For achieving the above object, the present invention provides a kind of charge pump circuit, at least includes output end vo ut, a pair NMOS
Switching tube M1, M2, pair of diodes D1, D2, pump electric capacity Cpump and charging capacitor Cout, nmos switch
Pipe M1, M2 constitute H bridge construction with diode D1, D2, and pump electric capacity Cpump is connected across nmos switch pipe M1
Source electrode and the negative pole of diode D1 between, charging capacitor Cout is connected across between negative pole and the ground of diode D2,
It is characterized in that,
Charge pump circuit also includes agitator, pulse-modulator, the first driver, the second driver and feedback
Control unit；
Agitator is used for producing pulse signal, pulse signal be dutycycle be the square-wave signal of 50%；
The output of the first driver is connected with the grid of nmos switch pipe M1, is used for controlling nmos switch pipe M1
Conducting and closedown, the output of the second driver is connected with the grid of nmos switch pipe M2, is used for controlling NMOS
The conducting of switching tube M2 and closedown；
The input of feedback control unit is connected to output end vo ut, is used for comparing output voltage VCP and setting reference
Voltage, produces control signal；
Pulse-modulator includes input CLK, VCP_DET and outfan UP_CTRL, DN_CTRL, input
CLK is connected with the output of agitator, and input VCP_DET is connected with the outfan of feedback control unit, outfan
The input of UP_CTRL and the first driver connects, and the input of outfan DN_CTRL and the second driver connects,
For the control signal that feedback control unit produces being modulated the pulse signal that agitator produces, controlling first and driving
Dynamic device and the second driver.
Further, feedback control unit includes metal-oxide-semiconductor bias current sources, and the voltage VCP of output end vo ut leads to
Cross Zener ZN input metal-oxide-semiconductor current mirror, Zener ZN is formed voltage drop Vzn；Supply voltage VBB leads to
Cross resistance R and input metal-oxide-semiconductor current mirror, resistance R is formed voltage drop Vr；
When the voltage difference of the voltage VCP and supply voltage VBB of output end vo ut, more than in Zener ZN
During the voltage difference of the voltage drop Vr on voltage drop Vzn and resistance R, right branch road in metal-oxide-semiconductor current mirror circuit
PMOS saturation current more than NMOS tube saturation current, NMOS tube works in saturation region, and drain voltage is close
For digital logic level VDD, then inverter output signal is 0；
When the voltage difference of the voltage VCP and supply voltage VBB of output end vo ut, less than in Zener ZN
During the voltage difference of the voltage drop Vr on voltage drop Vzn and resistance R, the right side in metal-oxide-semiconductor current mirror circuit is propped up
Road PMOS saturation current is less than NMOS tube saturation current, and NMOS tube works in linear zone, and therefore phase inverter is defeated
Going out signal is 1.
Further, metal-oxide-semiconductor current mirror include PMOS MP1, MP2, MP3, MP4, NMOS tube MN1, MN2,
MN3, MN4 and phase inverter, wherein
The grid of PMOS MP1 is connected with the grid of PMOS MP1, and the grid of PMOS MP1 is with drain electrode even
Connecing, the source electrode of PMOS MP1 is connected to supply voltage VBB by resistance R, and the source electrode of PMOS MP2 passes through
Zener ZN is connected to the voltage VCP of output end vo ut, the drain electrode of PMOS MP1 and the source of PMOS MP3
Pole connects, and the drain electrode of PMOS MP2 is connected with the source electrode of PMOS MP4；
The grid of PMOS MP3 is connected with the grid of PMOS MP4, and the grid of PMOS MP3 is with drain electrode even
Connecing, the drain electrode of PMOS MP3 is connected with the drain electrode of NMOS tube MN3, the drain electrode of PMOS MP4 and NMOS tube
The drain electrode of MN4 connects；
The grid of NMOS tube MN3 is connected with the grid of NMOS tube MN4, and is connected to external bias current potential, its size
For digital logic level VDD and the first NMOS tube on state threshold voltage VTH sum；The source electrode of NMOS tube MN3 with
The drain electrode of NMOS tube MN1 connects, and the source electrode of NMOS tube MN4 is connected with the drain electrode of NMOS tube MN2；
The grid of NMOS tube MN1 is connected with the grid of NMOS tube MN2, and is connected to foreign current bias potential BI,
The source electrode of NMOS tube MN1 is connected with ground l, and the source electrode of NMOS tube MN2 is connected to ground；
The drain electrode of NMOS tube MN2 is connected with the input of phase inverter.
Further, charge pump circuit also includes that current potential clamps down on circuit, in order to the charging of restrictive pump electric capacity Cpump
Current potential, limits the charging potential of pump electric capacity, improves circuit conversion efficiency, thus saves power consumption.
Further, current potential is clamped down on circuit and the grid potential of pump electric capacity Cpump is limited in not higher than Zener string
Connection reverse-conducting pressure drop Vzn and the pressure reduction 2Vzn-VTH of the first NMOS tube on state threshold voltage VTH.
Compared with prior art, the charge pump circuit that the present invention provides has the advantages that
(1) do not use voltage regulator, use feedback control that output voltage peak value is adjusted, it is ensured that output electricity
Pressure is adapted to the stepper motor driver of different application；
(2) electric charge pump is by being repeated continuously charge and discharge, maintains stablizing of output voltage, it is ensured that output voltage
Value is stable with the difference of reference voltage so that output voltage ripple is little, meets the requirement of stepper motor driver；
(3) use current potential to clamp down on module, limit the charging potential of pump electric capacity, improve circuit conversion efficiency, thus
Save power consumption.
Accompanying drawing explanation
Fig. 1 is traditional charge pump circuit structure；
Fig. 2 is traditional charge pump circuit structure；
Fig. 3 is the circuit diagram of the charge pump circuit of one embodiment of the present of invention；
Fig. 4 is the circuit diagram of the pulse-modulator of the charge pump circuit shown in Fig. 3；
Fig. 5 is the circuit diagram of the feedback control unit of the charge pump circuit shown in Fig. 3；
Fig. 6 is the circuit diagram of the driver of the charge pump circuit shown in Fig. 3；
Fig. 7 is the oscillogram of the charge pump circuit shown in Fig. 3.
Detailed description of the invention
The description below will make the aforementioned of the present invention become apparent from advantage with other purposes, feature with accompanying drawing.?
This will be explained in more detail with reference to the drawing according to a particular embodiment of the invention.
As it is shown on figure 3, the charge pump circuit of one embodiment of the present of invention, including output end vo ut, a pair NMOS
Switching tube M1, M2, pair of diodes D1, D2, pump electric capacity Cpump and charging capacitor Cout, nmos switch
Pipe M1, M2 constitute H bridge construction with diode D1, D2, and pump electric capacity Cpump is connected across nmos switch pipe M1
Source electrode and the negative pole of diode D1 between, charging capacitor Cout is connected across between negative pole and the ground of diode D2；
Charge pump circuit in the present embodiment also includes agitator, pulse-modulator, the first driver, second drives
Dynamic device and feedback control unit；
Agitator is used for producing pulse signal；Pulse signal be dutycycle be the square-wave signal of 50%；
The output of the first driver is connected with the grid of nmos switch pipe M1, is used for controlling nmos switch pipe M1
Conducting and closedown, the output of the second driver is connected with the grid of nmos switch pipe M2, is used for controlling NMOS
The conducting of switching tube M2 and closedown；
The input of feedback control unit is connected to output end vo ut, is used for comparing output voltage and setting voltage, produces
Raw control signal；
As shown in Figure 4, the comparative result of feedback control unit is entered by pulse-modulator according to the frequency of clock signal
Row modulation, output controls the control signal of nmos switch pipe；Pulse-modulator includes input CLK, VCP_DET
With outfan UP_CTRL, DN_CTRL, input CLK is connected with the output of agitator, input VCP_DET
Being connected with the outfan of feedback control unit, the input of outfan UP_CTRL and the first driver connects, defeated
The input going out to hold DN_CTRL and the second driver connects, for the control signal produced by feedback control unit
The pulse signal that modulation produces to agitator, controls the first driver and the second driver.
As it is shown in figure 5, feedback control unit includes metal-oxide-semiconductor current mirror, the voltage VCP of output end vo ut passes through
Zener ZN input metal-oxide-semiconductor current mirror, forms voltage drop Vzn in Zener ZN；Supply voltage VBB passes through
Resistance R inputs metal-oxide-semiconductor current mirror, forms voltage drop Vr on resistance R；
As it is shown in figure 5, metal-oxide-semiconductor current mirror include PMOS MP1, MP2, MP3, MP4, NMOS tube MN1,
MN2, MN3, MN4 and phase inverter, wherein
The grid of PMOS MP1 is connected with the grid of PMOS MP1, and the grid of PMOS MP1 is with drain electrode even
Connecing, the source electrode of PMOS MP1 is connected to supply voltage VBB by resistance R, and the source electrode of PMOS MP2 passes through
Zener ZN is connected to the voltage VCP of output end vo ut, the drain electrode of PMOS MP1 and the source of PMOS MP3
Pole connects, and the drain electrode of PMOS MP2 is connected with the source electrode of PMOS MP4；
The grid of PMOS MP3 is connected with the grid of PMOS MP4, and the grid of PMOS MP3 is with drain electrode even
Connecing, the drain electrode of PMOS MP3 is connected with the drain electrode of NMOS tube MN3, the drain electrode of PMOS MP4 and NMOS tube
The drain electrode of MN4 connects；
The grid of NMOS tube MN3 is connected with the grid of NMOS tube MN4, the source electrode of NMOS tube MN3 and NMOS tube
The drain electrode of MN1 connects, and the source electrode of NMOS tube MN4 is connected with the drain electrode of NMOS tube MN2；
The grid of NMOS tube MN1 is connected with the grid of NMOS tube MN2, and the source electrode of NMOS tube MN1 is with ground l even
Connecing, the source electrode of NMOS tube MN2 is connected with ground l；
The drain electrode of NMOS tube MN2 is connected with the input of phase inverter.
As VCP-VBB > Vzn-Vr time, in metal-oxide-semiconductor current mirror, the upper pipe PMOS saturation current of right branch road is more than
Down tube NMOS tube saturation current, NMOS tube works in saturation region, and drain voltage is close to digital logic level VDD,
Then inverter output signal is 0.
As VCP-VBB, < during Vzn-Vr, the upper pipe PMOS image current in metal-oxide-semiconductor current mirror is less than down tube
NMOS tube image current, NMOS tube works in linear zone, and therefore inverter output signal is 1.
The resistance of resistance R, i.e. available intended output voltage are rationally set.
Feedback comparison control circuit shown in Fig. 5 is not using operational amplifier, without voltage difference computing electricity
In the case of road, directly use two-way current source, by arranging NMOS tube and the work of PMOS in current source
Region, completes the comparison procedure of signal, is an advantage of this circuit.The threshold value of high pressure pressure reduction passes through resistance R
The dividing potential drop of size sets, and arranges flexibly, and circuit power consumption is low, is the another one advantage of this circuit.
As shown in Figure 6, PHA and PHB is the digital logic control signals of the first driver and the second driver, the
One driver is connected with the grid of NMOS tube M1, controls conducting and the closedown of NMOS tube M1；Second driver
It is connected with the grid of NMOS tube M2, controls conducting and the closedown of NMOS tube M2.When PHA and PHB is high level,
Corresponding NMOS tube conducting；When PHA and PHB is low level, corresponding NMOS tube is closed.
As shown in Figure 6, electric charge pump change-over circuit includes H bridge charge-discharge circuit and driver 1 and driver 2.Drive
Dynamic device 1 and driver 2 complete level shift function so that digital logic signal be controlled the first NMOS tube and
The conducting of the second NMOS tube and shutoff.Driver 1 is mainly made up of level shift circuit and clamp circuit, clamper
Circuit improves electric charge pump conversion efficiency, and current potential on the left of pump electric capacity Cpump has been carried out clamper restriction, restrictive pump
The charging potential of electric capacity Cpump.
In Fig. 6, the grid of the first NMOS tube uses the series connection clamper of two Zener, and its current potential is up to 2Vzn.
The on state threshold voltage size of the first nmos switch pipe is VTH, then the source potential of the first NMOS tube is up to
2Vzn-VTH, pump electric capacity Cpump left pole plate charging potential is not higher than 2Vzn-VTH, i.e. a left side of pump electric capacity Cpump
Side current potential will not be increased to supply voltage VBB.When electric charge pump initial start, pump electric capacity Cpump is to output capacitance
Cout charges, the Zener clamp circuit of series connection limit the terminal voltage of pump electric capacity Cpump and outfan VCP it
Between pressure reduction, reduce the power consumption on diode D2, steady pump electric capacity Cpump is to output capacitance Cout
Charging current, improves the starting efficiency of circuit.This is another advantage of the present invention.
Charge pump circuit in the present embodiment, by controlling conducting and the closedown of NMOS tube so that charge pump circuit
It is respectively at first stage, second stage and phase III, completes power supply to the charging of pump electric capacity Cpump and pump
The electric discharge of electric capacity Cpump, the electric discharge of pump electric capacity Cpump i.e. pump electric capacity Cpump is to output capacitance Cout and load
Electric discharge.
The work process of the charge pump circuit in the present embodiment is as follows:
The work of this electric charge pump is divided into three phases, and in the first stage, NMOS tube M1 is ended, and M2 turns on, pump
Electric capacity Cpump is coupled to ground between supply voltage VBB, and pump electric capacity Cpump is charged by power supply；Second stage
In, NMOS tube M1 turns on, and M2 ends, and pump electric capacity Cpump is coupled in supply voltage VBB and output end vo ut
Between, pump electric capacity Cpump discharges, and is charged the second electric capacity；In phase III, at pump electric capacity Cpump
In vacant state, what current potential left and right pole plate does not take over, and the discharge and recharge in the cycle completes.
Electric charge pump is repeated by constantly charge and discharge, maintains stablizing of output voltage.
Below according to signal waveforms shown in Fig. 7, describe the work process of charge pump circuit in the present embodiment in detail.
The continuous output duty cycle of agitator is that the square-wave signal CLK of 50% is to pulse-modulator, the signal shown in Fig. 7
In waveform, VCP_DET is the testing result of feedback control module output, when testing result is low level, represents
Output voltage VCP is less than pre-set output voltage；When testing result is high level, represent that output voltage VCP is high
In pre-set output voltage.
In the time t0 stage, square-wave signal CLK is low level, the first driver closedown NMOS tube M1, second
Driver opens NMOS tube M2, and output capacitance Cout the most outwards exports electric current, and electric charge pump is in described first
Stage.Pump be capacitively coupled to and power supply between.When clock signal transitions is high level, electric charge pump enters
T1 stage, i.e. electric charge pump are in second stage, and driver 2 closes the second NMOS tube, and driver 1 opens first
NMOS tube, on the left of pump electric capacity Cpump, current potential rises rapidly, can not suddenly change principle according to electric capacity two terminal potential, pump
Electric capacity Cpump right-hand member current potential also increases, when pump electric capacity Cpump right-hand member current potential is higher than VCP+VDIODE,
Wherein VDIODE is diode forward on state threshold voltage, and diode D2 turns on, and pump electric capacity Cpump gives output
Electric capacity Cout charges.When output voltage size exceedes preset value, electric charge pump enters t2 stage, feedback unit
Testing result is become 1 from 0, and driver 1 closes the first NMOS tube, and output capacitance charging is complete, enters electric discharge
Stage, i.e. phase III.When clock signal transitions is low level, electric charge pump i.e. enters initial shift.
Along with the cycle of oscillation of clock signal, above-mentioned working stage is carried out being repeated continuously, and i.e. maintains output electricity
Stablizing of pressure.
VCP is the output voltage of electric charge pump, constantly turns off and open NMOS tube M1 and M2 along with control signal,
Output capacitance Cout constantly charge and discharge, output voltage VCP constantly declines and rises, and its meansigma methods is i.e.
For intended output result.
The charge pump circuit that the present invention provides does not uses voltage regulator, uses feedback control to enter output voltage peak value
Row regulation, it is ensured that output voltage is adapted to the stepper motor driver of different application；Electric charge pump fills by being repeated continuously
Electricity and electric discharge, maintain stablizing of output voltage, it is ensured that output voltage values is stable with the difference of reference voltage so that defeated
Go out voltage ripple little, meet the requirement of stepper motor driver；Use current potential to clamp down on module, limit filling of pump electric capacity
Electric potential, improves circuit conversion efficiency, thus saves power consumption.
The specific embodiment of the present invention described in detail above.Should be appreciated that the ordinary skill of this area is without creativeness
Work just can make many modifications and variations according to the design of the present invention.Therefore, all technical staff in the art
Available by logical analysis, reasoning, or a limited experiment the most on the basis of existing technology
Technical scheme, all should be in the protection domain being defined in the patent claims.
Claims (4)
1. a charge pump circuit, at least includes outfan, a pair nmos switch pipe M1, M2, a pair two poles
Pipe D1, D2, pump electric capacity Cpump and charging capacitor Cout, described nmos switch pipe M1, M2 and described two poles
Pipe D1, D2 constitute H bridge construction, described pump electric capacity Cpump be connected across the source electrode of described nmos switch pipe M1 with
Between the negative pole of described diode D1, described charging capacitor Cout is connected across negative pole and the ground of described diode D2
Between, it is characterised in that
Described charge pump circuit also include agitator, pulse-modulator, the first driver, the second driver and
Feedback control unit；
Described agitator is used for producing pulse signal；Described pulse signal be dutycycle be the square-wave signal of 50%；
The output of described first driver is connected with the grid of described nmos switch pipe M1, described first driver
For controlling conducting and the closedown of described nmos switch pipe M1, the output of described second driver and described NMOS
The grid of switching tube M2 connects, and described second driver is for controlling conducting and the pass of described nmos switch pipe M2
Close；
The input of described feedback control unit is connected to described outfan, is used for comparing output voltage VCP and setting
Reference voltage, produces control signal；
Described pulse-modulator includes input CLK, VCP_DET and outfan UP_CTRL, DN_CTRL, described
Input CLK is connected with the output of described agitator, described input VCP_DET and described feedback control unit
Outfan connect, described outfan UP_CTRL is connected with the input of described first driver, described output
End DN_CTRL is connected with the input of described second driver, for the control produced by described feedback control unit
Signal processed modulates the pulse signal that described agitator produces, and controls described first driver and described second and drives
Device；
Wherein, described feedback control unit includes metal-oxide-semiconductor current mirror circuit, the voltage VCP of described outfan
Input described metal-oxide-semiconductor current mirror circuit by Zener ZN, described Zener ZN is formed voltage drop Vzn；
Supply voltage VBB inputs described metal-oxide-semiconductor current mirror circuit by resistance R, and is formed on described resistance R
Voltage drop Vr；
When the voltage difference of the voltage VCP and supply voltage VBB of described outfan, more than in described Zener ZN
Voltage drop Vzn and described resistance R on the voltage difference of voltage drop Vr time, described metal-oxide-semiconductor current mirror electricity
In road, the PMOS saturation current of right branch road is more than NMOS tube saturation current, and described NMOS tube works in saturation region,
Described PMOS works in linear zone, and described NMOS tube drain voltage is digital logic level VDD, then phase inverter
Output signal is 0；
When the voltage difference of the voltage VCP and supply voltage VBB of described outfan, less than in described Zener ZN
Voltage drop Vzn and described resistance R on the voltage difference of voltage drop Vr time, described metal-oxide-semiconductor current mirror electricity
In right branch road in road, upper pipe PMOS saturation current is less than down tube NMOS tube saturation current, described NMOS tube work
Making in linear zone, described PMOS works in saturation region, and therefore inverter output signal is 1.
2. charge pump circuit as claimed in claim 1, it is characterised in that described metal-oxide-semiconductor current mirror includes PMOS
Pipe MP1, MP2, MP3, MP4, NMOS tube MN1, MN2, MN3, MN4 and phase inverter, wherein
The grid of described PMOS MP1 is connected with the grid of described PMOS MP1, described PMOS MP1
Grid is connected with drain electrode, and the source electrode of described PMOS MP1 is connected to supply voltage VBB by described resistance R,
The source electrode of described PMOS MP2 is connected to the voltage VCP of described outfan by described Zener ZN, described
The drain electrode of PMOS MP1 is connected with the source electrode of described PMOS MP3, the drain electrode of described PMOS MP2 and institute
The source electrode stating PMOS MP4 connects；
The grid of described PMOS MP3 is connected with the grid of described PMOS MP4, described PMOS MP3
Grid is connected with drain electrode, and the drain electrode of described PMOS MP3 is connected with the drain electrode of described NMOS tube MN3, described
The drain electrode of PMOS MP4 is connected with the drain electrode of described NMOS tube MN4；
The grid of described NMOS tube MN3 is connected with the grid of described NMOS tube MN4, and bias potential is numeral
Logic level VDD and described NMOS tube threshold V T H sum；The source electrode of described NMOS tube MN3 is with described
The drain electrode of NMOS tube MN1 connects, and the source electrode of described NMOS tube MN4 is connected with the drain electrode of described NMOS tube MN2；
The grid of described NMOS tube MN1 is connected with the grid of described NMOS tube MN2, and bias potential size is
Current offset voltage BI；The source electrode of described NMOS tube MN1 is connected to ground, the source electrode of described NMOS tube MN2 with
Ground connects；
The drain electrode of described NMOS tube MN2 is connected with the input of described phase inverter.
3. charge pump circuit as claimed in claim 1, it is characterised in that described charge pump circuit also includes electricity
Circuit is clamped down in position, for limiting the charging potential of described pump electric capacity Cpump.
4. charge pump circuit as claimed in claim 3, it is characterised in that described current potential clamps down on circuit by two
Zener Z2 of individual series connection, the Z3 grid clamping to described nmos switch pipe M1, the Zener of said two series connection
Voltage on pipe Z2, Z3 reduces to 2Vzn, and the grid potential of described nmos switch pipe M1 is limited in not higher than institute
State difference 2Vzn-VTH of the series connection pressure drop of Zener ZN and described nmos switch pipe M1 on state threshold voltage.
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| CN201310702976.9A CN103647449B (en) | 2013-12-18 | 2013-12-18 | A kind of boost-type charge pump circuit |
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| JP5469967B2 (en) * | 2009-09-10 | 2014-04-16 | ローム株式会社 | Audio system |
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| CN202931189U (en) * | 2012-10-26 | 2013-05-08 | 嘉兴禾润电子科技有限公司 | Charge pump circuit of motor driver |
| CN203896186U (en) * | 2013-12-18 | 2014-10-22 | 嘉兴中润微电子有限公司 | Charge pump circuit |
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