CN103647449A - Boost charge pump circuit - Google Patents
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- CN103647449A CN103647449A CN201310702976.9A CN201310702976A CN103647449A CN 103647449 A CN103647449 A CN 103647449A CN 201310702976 A CN201310702976 A CN 201310702976A CN 103647449 A CN103647449 A CN 103647449A
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Abstract
The invention provides a boost charge pump circuit. The boost charge pump circuit omits a voltage regulator, utilizes feedback control to adjust an output voltage peak and guarantees that the output voltage is adaptable to step motor drivers of different applications; a boost charge pump continuously and repeatedly charge and discharge to maintain the stability of the output voltage, guarantees that the difference value of an output voltage value and a reference voltage are stable, enables output voltage ripples to be small and meets the requirements of the step motor drivers; a potential clamp module is utilized, the charging potential of a pump capacitor is limited, a circuit starting efficiency is improved, and accordingly power dissipation is reduced.
Description
Technical field
The present invention relates to a kind of charge pump circuit, relate in particular to a kind of booster type charge pump circuit for stepper motor driver.
Background technology
Fig. 1 shows a kind of known charge pump circuit, comprises pump capacitor C pump, output capacitance Cout and switching circuit; The course of work of this charge pump circuit comprises two stages, in the first stage, switch S 1 and S4 are in not on-state, switch S 2 and S3 are in conducting state, make one end NA of pump capacitor C pump be coupled in ground, other end NB is coupled in input voltage vin, and power supply, to pump capacitor C pump charging, makes the two ends NB of pump capacitor C pump and the potential difference between NA rise to Vin; In second stage, switch S 1 is with S4 in conducting state, and switch S 2 in not on-state, makes the end points NA of pump capacitor C pump be coupled in input voltage vin with S3, and end points NB is coupled in output end vo ut.Thereby, when second stage starts, the voltage at the end points NB place of pump capacitor C pump is increased to 2*Vin from Vin originally by moment, switch S 4 via conducting, this voltage 2*Vin applies output end vo ut, and the shortcoming of this charge pump circuit is only can provide the output voltage V out that is fixed on 2*Vin.
For the output voltage V out that can adjust is arbitrarily provided, between output capacitance Cout and output end vo ut, linear voltage regulator is set, as shown in Figure 2 between Vin and 2*Vin.According to predefined reference voltage Vref, linear voltage regulator converts the pump voltage on the electrode NC of output capacitance Cout to output voltage V out between Vin and 2*Vin.Although linear voltage regulator can become the adjustable output voltage Vout between Vin and 2*Vin by fixed pump voltage transitions effectively, voltage regulator causes conversion efficiency to decline and wastes energy.
In addition, because stepper motor driver needs the output voltage values of charge pump and the difference of supply voltage, keep constant, and the operating voltage of stepper motor driver changes with application system, so charge pump is difficult to meet above-mentioned requirements.
Summary of the invention
Because problems of the prior art, one object of the present invention is to provide a kind of booster type charge pump circuit, adopt FEEDBACK CONTROL, adjust charge pump circuit output voltage, keep the output voltage values of charge pump and the difference of supply voltage stable, to meet the requirement of stepper motor driver simultaneously.
For achieving the above object, the invention provides a kind of charge pump circuit, at least comprise output end vo ut, a pair of nmos switch pipe M1, M2, pair of diodes D1, D2, pump capacitor C pump and charging capacitor Cout, nmos switch pipe M1, M2 and diode D1, D2 form H bridge construction, pump capacitor C pump is connected across between the source electrode of nmos switch pipe M1 and the negative pole of diode D1, charging capacitor Cout is connected across between the negative pole and ground of diode D2, it is characterized in that
Charge pump circuit also comprises oscillator, pulse modulator, the first driver, the second driver and feedback control unit;
Oscillator is for generation of pulse signal, and pulse signal is that duty ratio is 50% square-wave signal;
The output of the first driver is connected with the grid of nmos switch pipe M1, and for controlling the conducting of nmos switch pipe M1 and closing, the output of the second driver is connected with the grid of nmos switch pipe M2, for controlling the conducting of nmos switch pipe M2 and closing;
The input of feedback control unit is connected to output end vo ut, for comparing output voltage V CP and setting reference voltage, produces control signal;
Pulse modulator comprises input CLK, VCP_DET and output UP_CTRL, DN_CTRL, input CLK is connected with the output of oscillator, input VCP_DET is connected with the output of feedback control unit, output UP_CTRL is connected with the input of the first driver, output DN_CTRL is connected with the input of the second driver, for the control signal that feedback control unit is produced, be modulated to the pulse signal that oscillator produces, control the first driver and the second driver.
Further, feedback control unit comprises metal-oxide-semiconductor bias current sources, and the voltage VCP of output end vo ut, by zener ZN input metal-oxide-semiconductor current mirror, forms voltage drop Vzn on zener ZN; Supply voltage VBB inputs metal-oxide-semiconductor current mirror by resistance R, forms voltage drop Vr in resistance R;
When the voltage VCP of output end vo ut and the voltage difference of supply voltage VBB, while being greater than the voltage difference of voltage drop Vzn on zener ZN and the voltage drop Vr in resistance R, in metal-oxide-semiconductor current mirror circuit, the PMOS of right branch road pipe saturation current is greater than NMOS pipe saturation current, NMOS pipe works in saturation region, drain voltage is close to digital logic level VDD, and inverter output signal is 0;
When the voltage VCP of output end vo ut and the voltage difference of supply voltage VBB, while being less than the voltage difference of voltage drop Vzn on zener ZN and the voltage drop Vr in resistance R, right branch road PMOS pipe saturation current in metal-oxide-semiconductor current mirror circuit is less than NMOS pipe saturation current, NMOS pipe works in linear zone, so inverter output signal is 1.
Further, metal-oxide-semiconductor current mirror comprises that PMOS pipe MP1, MP2, MP3, MP4, NMOS manage MN1, MN2, MN3, MN4 and inverter, wherein
The grid of PMOS pipe MP1 is connected with the grid of PMOS pipe MP1, the grid of PMOS pipe MP1 is connected with drain electrode, the source electrode of PMOS pipe MP1 is connected to supply voltage VBB by resistance R, the source electrode of PMOS pipe MP2 is connected to the voltage VCP of output end vo ut by zener ZN, the drain electrode of PMOS pipe MP1 is connected with the source electrode of PMOS pipe MP3, and the drain electrode of PMOS pipe MP2 is connected with the source electrode of PMOS pipe MP4;
The grid of PMOS pipe MP3 is connected with the grid of PMOS pipe MP4, and the grid of PMOS pipe MP3 is connected with drain electrode, and the drain electrode of PMOS pipe MP3 is connected with the drain electrode of NMOS pipe MN3, and the drain electrode of PMOS pipe MP4 is connected with the drain electrode of NMOS pipe MN4;
The grid of NMOS pipe MN3 is connected with the grid of NMOS pipe MN4, and is connected to external bias current potential, and its size is digital logic level VDD and NMOS pipe on state threshold voltage VTH sum; The source electrode of NMOS pipe MN3 is connected with the drain electrode of NMOS pipe MN1, and the source electrode of NMOS pipe MN4 is connected with the drain electrode of NMOS pipe MN2;
The grid of NMOS pipe MN1 is connected with the grid of NMOS pipe MN2, and is connected to foreign current bias potential BI, and the source electrode of NMOS pipe MN1 is connected with ground l, and the source electrode of NMOS pipe MN2 is connected with ground;
The NMOS pipe drain electrode of MN2 and the input of inverter are connected.
Further, charge pump circuit also comprises that current potential clamps down on circuit, in order to the charging potential of restrictive pump capacitor C pump, has limited the charging potential of pump electric capacity, has improved circuit conversion efficiency, thereby saves power consumption.
Further, current potential is clamped down on circuit the grid potential of pump capacitor C pump is limited in not to the pressure reduction 2Vzn-VTH higher than zener series opposing conduction voltage drop Vzn and NMOS pipe on state threshold voltage VTH.
Compared with prior art, charge pump circuit provided by the invention has following beneficial effect:
(1) do not use voltage regulator, adopt FEEDBACK CONTROL to regulate output voltage peak value, guarantee that output voltage is adapted to the stepper motor driver of different application;
(2) charge pump, by constantly recharge and electric discharge, maintains the stable of output voltage, guarantees that the difference of output voltage values and reference voltage is stable, makes output voltage ripple little, meets the requirement of stepper motor driver;
(3) adopt current potential to clamp down on module, limited the charging potential of pump electric capacity, improved circuit conversion efficiency, thereby save power consumption.
Accompanying drawing explanation
Fig. 1 is traditional charge pump circuit structure;
Fig. 2 is traditional charge pump circuit structure;
Fig. 3 is the circuit diagram of the charge pump circuit of one embodiment of the present of invention;
Fig. 4 is the circuit diagram of the pulse modulator of the charge pump circuit shown in Fig. 3;
Fig. 5 is the circuit diagram of the feedback control unit of the charge pump circuit shown in Fig. 3;
Fig. 6 is the circuit diagram of the driver of the charge pump circuit shown in Fig. 3;
Fig. 7 is the oscillogram of the charge pump circuit shown in Fig. 3.
Embodiment
Explanation below and accompanying drawing will make aforementioned and other objects of the present invention, feature, more obvious with advantage.At this, describe in detail according to a particular embodiment of the invention with reference to the accompanying drawings.
As shown in Figure 3, the charge pump circuit of one embodiment of the present of invention, comprise output end vo ut, a pair of nmos switch pipe M1, M2, pair of diodes D1, D2, pump capacitor C pump and charging capacitor Cout, nmos switch pipe M1, M2 and diode D1, D2 form H bridge construction, pump capacitor C pump is connected across between the source electrode of nmos switch pipe M1 and the negative pole of diode D1, and charging capacitor Cout is connected across between the negative pole and ground of diode D2;
Charge pump circuit in the present embodiment also comprises oscillator, pulse modulator, the first driver, the second driver and feedback control unit;
Oscillator is for generation of pulse signal; Pulse signal is that duty ratio is 50% square-wave signal;
The output of the first driver is connected with the grid of nmos switch pipe M1, and for controlling the conducting of nmos switch pipe M1 and closing, the output of the second driver is connected with the grid of nmos switch pipe M2, for controlling the conducting of nmos switch pipe M2 and closing;
The input of feedback control unit is connected to output end vo ut, for comparing output voltage and setting voltage, produces control signal;
As shown in Figure 4, pulse modulator is modulated the comparative result of feedback control unit according to the frequency of clock signal, and the control signal of nmos switch pipe is controlled in output; Pulse modulator comprises input CLK, VCP_DET and output UP_CTRL, DN_CTRL, input CLK is connected with the output of oscillator, input VCP_DET is connected with the output of feedback control unit, output UP_CTRL is connected with the input of the first driver, output DN_CTRL is connected with the input of the second driver, for the control signal that feedback control unit is produced, be modulated to the pulse signal that oscillator produces, control the first driver and the second driver.
As shown in Figure 5, feedback control unit comprises metal-oxide-semiconductor current mirror, and the voltage VCP of output end vo ut, by zener ZN input metal-oxide-semiconductor current mirror, forms voltage drop Vzn on zener ZN; Supply voltage VBB inputs metal-oxide-semiconductor current mirror by resistance R, forms voltage drop Vr in resistance R;
As shown in Figure 5, metal-oxide-semiconductor current mirror comprises that PMOS pipe MP1, MP2, MP3, MP4, NMOS manage MN1, MN2, MN3, MN4 and inverter, wherein
The grid of PMOS pipe MP1 is connected with the grid of PMOS pipe MP1, the grid of PMOS pipe MP1 is connected with drain electrode, the source electrode of PMOS pipe MP1 is connected to supply voltage VBB by resistance R, the source electrode of PMOS pipe MP2 is connected to the voltage VCP of output end vo ut by zener ZN, the drain electrode of PMOS pipe MP1 is connected with the source electrode of PMOS pipe MP3, and the drain electrode of PMOS pipe MP2 is connected with the source electrode of PMOS pipe MP4;
The grid of PMOS pipe MP3 is connected with the grid of PMOS pipe MP4, and the grid of PMOS pipe MP3 is connected with drain electrode, and the drain electrode of PMOS pipe MP3 is connected with the drain electrode of NMOS pipe MN3, and the drain electrode of PMOS pipe MP4 is connected with the drain electrode of NMOS pipe MN4;
The grid of NMOS pipe MN3 is connected with the grid of NMOS pipe MN4, and the source electrode of NMOS pipe MN3 is connected with the drain electrode of NMOS pipe MN1, and the source electrode of NMOS pipe MN4 is connected with the drain electrode of NMOS pipe MN2;
The grid of NMOS pipe MN1 is connected with the grid of NMOS pipe MN2, and the source electrode of NMOS pipe MN1 is connected with ground l, and the source electrode of NMOS pipe MN2 is connected with ground l;
The NMOS pipe drain electrode of MN2 and the input of inverter are connected.
When VCP-VBB>Vzn-Vr, in metal-oxide-semiconductor current mirror, the upper pipe PMOS pipe saturation current of right branch road is greater than lower pipe NMOS pipe saturation current, NMOS pipe works in saturation region, and drain voltage is close to digital logic level VDD, and inverter output signal is 0.
When VCP-VBB<Vzn-Vr, the upper pipe PMOS pipe image current in metal-oxide-semiconductor current mirror is less than lower pipe NMOS pipe image current, and NMOS pipe works in linear zone, so inverter output signal is 1.
The resistance of resistance R is rationally set, can obtains the output voltage of expection.
Feedback comparison control circuit shown in Fig. 5 is not in the situation that being used operational amplifier, not adding voltage difference computing circuit, directly use two-way current source, by the working region of the pipe of NMOS in current source and PMOS pipe is set, the comparison procedure of settling signal, is an advantage of this circuit.The threshold value of high pressure pressure reduction is set by the dividing potential drop of resistance R size, arranges flexibly, and circuit power consumption is low, is the another one advantage of this circuit.
As shown in Figure 6, PHA and PHB are the Digital Logic control signal of the first driver and the second driver, and the first driver is connected with the grid of NMOS pipe M1, control the conducting of NMOS pipe M1 and close; The second driver is connected with the grid of NMOS pipe M2, controls the conducting of NMOS pipe M2 and closes.When PHA and PHB are high level, the conducting of corresponding NMOS pipe; When PHA and PHB are low level, corresponding NMOS pipe is closed.
As shown in Figure 6, charge pump change-over circuit comprises H bridge charge-discharge circuit and driver 1 and driver 2.Driver 1 and driver 2 complete level shift function, make digital logic signal be controlled conducting and the shutoff of a NMOS pipe and the 2nd NMOS pipe.Driver 1 mainly consists of level shift circuit and clamp circuit, and clamp circuit has improved charge pump conversion efficiency, and pump capacitor C pump left side current potential has been carried out to clamper restriction, the charging potential of restrictive pump capacitor C pump.
In Fig. 6, the grid of a NMOS pipe adopts the series connection clamper of two zener, and its current potential is up to 2Vzn.The on state threshold voltage size of the first nmos switch pipe is VTH, the source potential of a NMOS pipe is up to 2Vzn-VTH, the left pole plate charging potential of pump capacitor C pump is not higher than 2Vzn-VTH, and the left side current potential of pump capacitor C pump can not be increased to supply voltage VBB.When charge pump initial start, pump capacitor C pump charges to output capacitance Cout, the zener clamp circuit of series connection has limited the terminal voltage of pump capacitor C pump and the pressure reduction between output VCP, reduced the power consumption on diode D2, steadily the charging current of pump capacitor C pump to output capacitance Cout, improved the starting efficiency of circuit.This is another advantage of the present invention.
Charge pump circuit in the present embodiment, by controlling the conducting of NMOS pipe and closing, make charge pump circuit respectively in first stage, second stage and phase III, complete the electric discharge of power supply to the charging of pump capacitor C pump and pump capacitor C pump, the electric discharge of pump capacitor C pump is that pump capacitor C pump is to output capacitance Cout and load discharge.
The course of work of the charge pump circuit in the present embodiment is as follows:
The work of this charge pump is divided into three phases, in the first stage, NMOS pipe M1 cut-off, M2 conducting, pump capacitor C pump be coupled in and supply voltage VBB between, power supply charges to pump capacitor C pump; In second stage, NMOS pipe M1 conducting, M2 cut-off, pump capacitor C pump is coupled between supply voltage VBB and output end vo ut, and pump capacitor C pump electric discharge, charges to the second electric capacity; In phase III, pump is in vacant state for pump capacitor C, and what current potential left and right pole plate does not take over, having discharged and recharged in one-period.
Charge pump repeats by charge and discharge constantly, maintains the stable of output voltage.
Following according to signal waveforms shown in Fig. 7, the course of work of charge pump circuit in detailed description the present embodiment.
The square-wave signal CLK that the continuous output duty cycle of oscillator is 50% is to pulse modulator, in signal waveform shown in Fig. 7, VCP_DET is the testing result of feedback control module output, when testing result is low level, represents that output voltage V CP is lower than default output voltage; When testing result is high level, represent that output voltage V CP is higher than default output voltage.
In the time t0 stage, square-wave signal CLK is low level, and the first driver is closed NMOS pipe M1, and the second driver is opened NMOS pipe M2, the constantly outside output current of output capacitance Cout, and charge pump is in the described first stage.Pump be capacitively coupled to and power supply between.When clock signal saltus step is high level, charge pump enters the t1 stage, be that charge pump is in second stage, driver 2 is closed the 2nd NMOS pipe, driver 1 is opened a NMOS pipe, pump capacitor C pump left side current potential rises rapidly, according to the electric capacity two terminal potentials principle of can not suddenling change, pump capacitor C pump right-hand member current potential also increases, when pump capacitor C pump right-hand member current potential is during higher than VCP+VDIODE, wherein VDIODE is diode forward on state threshold voltage, diode D2 conducting, and pump capacitor C pump charges to output capacitance Cout.When output voltage size surpasses preset value, charge pump enters the t2 stage, and feedback unit testing result becomes 1 from 0, and driver 1 is closed a NMOS pipe, and output capacitance charging is complete, enters discharge regime, i.e. the phase III.When clock signal saltus step is low level, charge pump enters initial shift.
Be accompanied by the cycle of oscillation of clock signal, above-mentioned working stage is constantly repeating, and has kept the stable of output voltage.
VCP is the output voltage of charge pump, and along with control signal is constantly turn-offed and open NMOS pipe M1 and M2, output capacitance Cout is charge and discharge constantly, and output voltage V CP constantly declines and rises, and its mean value is the Output rusults of expection.
Charge pump circuit provided by the invention is not used voltage regulator, adopts FEEDBACK CONTROL to regulate output voltage peak value, guarantees that output voltage is adapted to the stepper motor driver of different application; Charge pump, by constantly recharge and electric discharge, maintains the stable of output voltage, guarantees that the difference of output voltage values and reference voltage is stable, makes output voltage ripple little, meets the requirement of stepper motor driver; Adopt current potential to clamp down on module, limited the charging potential of pump electric capacity, improved circuit conversion efficiency, thereby save power consumption.
More than describe specific embodiments of the invention in detail.The ordinary skill that should be appreciated that this area just can design according to the present invention be made many modifications and variations without creative work.Therefore, all technical staff in the art, all should be in the determined protection range by claims under this invention's idea on the basis of existing technology by the available technical scheme of logical analysis, reasoning, or a limited experiment.
Claims (5)
1. a charge pump circuit, at least comprise output (Vout), a pair of nmos switch pipe (M1, M2), pair of diodes (D1, D2), pump electric capacity (Cpump) and charging capacitor (Cout), described nmos switch pipe (M1, M2) forms H bridge construction with described diode (D1, D2), described pump electric capacity (Cpump) is connected across between the source electrode of described nmos switch pipe (M1) and the negative pole of described diode (D1), described charging capacitor (Cout) is connected across between the negative pole and ground of described diode (D2), it is characterized in that
Described charge pump circuit also comprises oscillator, pulse modulator, the first driver, the second driver and feedback control unit;
Described oscillator is for generation of pulse signal; Described pulse signal is that duty ratio is 50% square-wave signal;
The output of described the first driver is connected with the grid of described nmos switch pipe (M1), described the first driver is used for controlling the conducting of described nmos switch pipe (M1) and closing, the output of described the second driver is connected with the grid of described nmos switch pipe (M2), and described the second driver is used for controlling the conducting of described nmos switch pipe (M2) and closing;
The input of described feedback control unit is connected to described output (Vout), for comparing output voltage (VCP) and setting reference voltage, produces control signal;
Described pulse modulator comprises input (CLK, VCP_DET) and output (UP_CTRL, DN_CTRL), described input (CLK) is connected with the output of described oscillator, described input (VCP_DET) is connected with the output of described feedback control unit, described output (UP_CTRL) is connected with the input of described the first driver, described output (DN_CTRL) is connected with the input of described the second driver, for the control signal that described feedback control unit is produced, be modulated to the pulse signal that described oscillator produces, control described the first driver and described the second driver.
2. charge pump circuit as claimed in claim 1, it is characterized in that, described feedback control unit comprises metal-oxide-semiconductor current mirror circuit, the voltage (VCP) of described output (Vout) is inputted described metal-oxide-semiconductor current mirror circuit by zener (ZN), in the upper formation of described zener (ZN) voltage drop (Vzn); Supply voltage (VBB) is inputted described metal-oxide-semiconductor current mirror circuit by resistance (R), and in the upper formation of described resistance (R) voltage drop (Vr);
When the voltage (VCP) of described output (Vout) and the voltage difference of supply voltage (VBB), while being greater than the voltage difference of the voltage drop (Vr) on voltage drop (Vzn) in described zener (ZN) and described resistance (R), in described metal-oxide-semiconductor current mirror circuit, the PMOS of right branch road pipe saturation current is greater than NMOS pipe saturation current, described NMOS pipe works in saturation region, described PMOS pipe works in linear zone, described NMOS pipe drain voltage is close to digital logic level (VDD), and inverter output signal is 0;
When the voltage (VCP) of described output (Vout) and the voltage difference of supply voltage (VBB), while being less than the voltage difference of the voltage drop (Vr) on voltage drop (Vzn) in described zener (ZN) and described resistance (R), in right branch road in described metal-oxide-semiconductor current mirror circuit, upper pipe PMOS pipe saturation current is less than lower pipe NMOS pipe saturation current, described NMOS pipe works in linear zone, described PMOS pipe works in saturation region, so inverter output signal is 1.
3. charge pump circuit as claimed in claim 2, is characterized in that, described metal-oxide-semiconductor current mirror comprises that PMOS pipe (MP1, MP2, MP3, MP4), NMOS manage (MN1, MN2, MN3, MN4) and inverter, wherein
The grid of described PMOS pipe (MP1) is connected with the grid that described PMOS manages (MP1), the grid of described PMOS pipe (MP1) is connected with drain electrode, the source electrode of described PMOS pipe (MP1) is connected to supply voltage (VBB) by described resistance (R), the source electrode of described PMOS pipe (MP2) is connected to the voltage (VCP) of described output (Vout) by described zener (ZN), the drain electrode of described PMOS pipe (MP1) is connected with the source electrode that described PMOS manages (MP3), and the drain electrode of described PMOS pipe (MP2) is connected with the source electrode that described PMOS manages (MP4);
The grid of described PMOS pipe (MP3) is connected with the grid that described PMOS manages (MP4), the grid of described PMOS pipe (MP3) is connected with drain electrode, the drain electrode of described PMOS pipe (MP3) is connected with the drain electrode that described NMOS manages (MN3), and the drain electrode of described PMOS pipe (MP4) is connected with the drain electrode that described NMOS manages (MN4);
The grid of described NMOS pipe (MN3) is connected with the grid that described NMOS manages (MN4), and bias potential is digital logic level (VDD) and described NMOS pipe threshold voltage (VTH) sum.The source electrode of described NMOS pipe (MN3) is connected with the drain electrode that described NMOS manages (MN1), and the source electrode of described NMOS pipe (MN4) is connected with the drain electrode that described NMOS manages (MN2);
The grid of described NMOS pipe (MN1) is connected with the grid that described NMOS manages (MN2), and bias potential size is current offset voltage BI.The source electrode of described NMOS pipe (MN1) is connected with ground l, and the source electrode of described NMOS pipe (MN2) is connected with ground l;
The described NMOS pipe drain electrode of (MN2) and the input of described inverter are connected.
4. charge pump circuit as claimed in claim 1, is characterized in that, described charge pump circuit also comprises that current potential clamps down on circuit, for limiting the charging potential of described pump electric capacity (Cpump).
5. charge pump circuit as claimed in claim 4, is characterized in that, described current potential is clamped down on circuit the grid potential of described pump electric capacity (Cpump) is limited in not to the difference 2Vzn-VTH higher than zener series connection pressure drop and switching tube on state threshold voltage.
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| CN105305810A (en) * | 2014-05-29 | 2016-02-03 | 展讯通信（上海）有限公司 | Improved charge pump circuit system |
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| CN111462708A (en) * | 2020-04-29 | 2020-07-28 | 深圳市华星光电半导体显示技术有限公司 | Voltage conversion circuit, voltage conversion method and display device |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011061985A (en) * | 2009-09-10 | 2011-03-24 | Rohm Co Ltd | Control circuit and control method of charge pump circuit, and power supply circuit using them, and audio system |
| CN202931189U (en) * | 2012-10-26 | 2013-05-08 | 嘉兴禾润电子科技有限公司 | Charge pump circuit of motor driver |
| CN203896186U (en) * | 2013-12-18 | 2014-10-22 | 嘉兴中润微电子有限公司 | Charge pump circuit |
-
2013
- 2013-12-18 CN CN201310702976.9A patent/CN103647449B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011061985A (en) * | 2009-09-10 | 2011-03-24 | Rohm Co Ltd | Control circuit and control method of charge pump circuit, and power supply circuit using them, and audio system |
| CN202931189U (en) * | 2012-10-26 | 2013-05-08 | 嘉兴禾润电子科技有限公司 | Charge pump circuit of motor driver |
| CN203896186U (en) * | 2013-12-18 | 2014-10-22 | 嘉兴中润微电子有限公司 | Charge pump circuit |
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