CN103633237B - LED packaging structure and wafer level packaging method thereof - Google Patents
LED packaging structure and wafer level packaging method thereof Download PDFInfo
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- CN103633237B CN103633237B CN201310698043.7A CN201310698043A CN103633237B CN 103633237 B CN103633237 B CN 103633237B CN 201310698043 A CN201310698043 A CN 201310698043A CN 103633237 B CN103633237 B CN 103633237B
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- 238000000034 method Methods 0.000 title claims abstract description 34
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 167
- 239000002184 metal Substances 0.000 claims abstract description 167
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 54
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 54
- 239000010703 silicon Substances 0.000 claims abstract description 54
- 230000004888 barrier function Effects 0.000 claims description 50
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 45
- 238000005538 encapsulation Methods 0.000 claims description 37
- 238000001259 photo etching Methods 0.000 claims description 37
- 239000000463 material Substances 0.000 claims description 23
- 239000000853 adhesive Substances 0.000 claims description 19
- 230000001070 adhesive effect Effects 0.000 claims description 19
- 239000000377 silicon dioxide Substances 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 13
- 230000008569 process Effects 0.000 claims description 13
- 238000004544 sputter deposition Methods 0.000 claims description 10
- 239000000945 filler Substances 0.000 claims description 8
- 238000012545 processing Methods 0.000 claims description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 238000009713 electroplating Methods 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 230000009467 reduction Effects 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000004064 recycling Methods 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000005507 spraying Methods 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 239000011230 binding agent Substances 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 238000007639 printing Methods 0.000 claims description 2
- 238000007711 solidification Methods 0.000 claims description 2
- 230000008023 solidification Effects 0.000 claims description 2
- 238000013461 design Methods 0.000 abstract description 13
- 239000000758 substrate Substances 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000012536 packaging technology Methods 0.000 abstract 1
- 230000000630 rising effect Effects 0.000 description 7
- 239000000741 silica gel Substances 0.000 description 6
- 229910002027 silica gel Inorganic materials 0.000 description 6
- 239000011324 bead Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 5
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000011900 installation process Methods 0.000 description 2
- 238000010992 reflux Methods 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/641—Heat extraction or cooling elements characterized by the materials
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention relates to an LED packaging structure and a wafer level packaging method thereof, belonging to the technical field of semiconductor packaging. The LED chip comprises a silicon substrate (110) and an LED chip (200), wherein discontinuous metal reflecting layers (410, 420) are arranged on the front surface of the silicon substrate (110), discontinuous metal layers I (810) and II (820) are arranged in a silicon through hole (111), an electrode (210), a metal grid (311), the metal reflecting layer (410) and the metal layer I (810) are electrically connected, and the electrode (220), the metal grid (312), the metal reflecting layer (420) and the metal layer II (820) are electrically connected; the silicon substrate further comprises a metal layer III (830), wherein the metal layer III (830) is located on the surface of the insulating layer II (520) on the back surface of the silicon substrate body (110) and located between the metal layer I (810) and the metal layer II (820). The packaging structure of the invention obtains the LED packaging structure emitting light in full angle by virtue of the wafer level packaging technology, and can reduce the thermal resistance, improve the reliability, ensure that the light-emitting angle is not limited, and reduce the design and manufacturing cost.
Description
Technical field
The present invention relates to a kind of LED encapsulation structure and wafer-level encapsulation method thereof, belong to technical field of semiconductor encapsulation.
Background technology
General, light-emitting diode (Light-EmittingDiode, is called for short LED, lower with) be packaged with multiple packing forms.Early stage, adopt lead frame to be that substrate encapsulates, LED chip is mounted on lead frame by heat-conducting cream (or conducting resinl), realize current load by the mode of wire bonding thus make it luminous; Along with technological progress, some are new, high performance baseplate material appearance, serve leading action, as ceramic substrate, AlN substrate etc. in the application of great power LED.But as the product of commercialization, also there are the following problems for existing LED technology: 1. thermal resistance is high.Because LED chip luminescence excited by electron recombination process, thus while generation light, produce a large amount of heat.As everyone knows, the generation of heat affects the efficiency that electricity is converted into light conversely, reduces the luminescent properties of LED itself.2. LED chip is connected with metal level by attachment process, because the own wt of LED chip is more and more lighter, often there is imbalance in the wetting power of its electrode and scolding tin, the just contingent drift when refluxing, sets up a monument or the bad connected mode such as rotation, affects the reliability of LED;
rising angle is limited.Existing LED lamp bead, its LED chip is seated in recessed reflector cover, and rising angle is maximum is no more than 150 degree, and limited rising angle causes the LED lamp bead scope of application limited, need the oversized angle even occasion of full angle at some, secondary optical design structure must be aided with; Cause because rising angle is not of uniform size, secondary optical design structure needs to consider that concrete rising angle designs targetedly, not only increases secondary optical design difficulty, and adds the complexity of LED structure, meanwhile, Design and manufacture cost also corresponding increase.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide a kind of and can reduce thermal resistance, improve reliability, make rising angle not limited and LED encapsulation structure and the wafer-level encapsulation method thereof of Design and manufacture cost can be reduced.
The object of the present invention is achieved like this:
A kind of wafer level LED encapsulation method of the present invention, comprises following processing step:
There is provided one with the silicon wafer of insulating barrier I, form metallic reflective layer on the surface of insulating barrier I;
Metal gate is formed on the surface of metallic reflective layer, then at the electroplating surface metal articulamentum of metal gate;
LED chip upside-down mounting with electrode is fixed in metal connecting layer;
Photic zone is bonded to the top of LED chip;
Utilize photoetching, etching technics successively, form silicon through hole at the back side of silicon wafer;
At the backside deposition insulating barrier II of silicon wafer, then in silicon through hole, formed the insulating layer openings running through insulating barrier I and insulating barrier II successively by the mode of photoetching, etching;
Successively by the mode of sputtering, photoetching, plating, at the forming metal layer on surface I of insulating barrier II, metal level II and metal level III, wherein metal level I is connected with metallic reflective layer respectively by insulating layer openings with metal level II, and metal level III is arranged between metal level I, metal level II;
The silicon wafer completing encapsulation is cut into single independently packaging body.
Further, metallic reflective layer is formed on the surface of insulating barrier I as follows:
Metallic reflective layer is formed by sputtering on the surface of insulating barrier I;
Photoetching offset plate figure is formed by photoetching process on the surface of metallic reflective layer;
Take photoetching offset plate figure as mask, etching metallic reflective layer, forms metallic reflective layer.
Further, form metal gate on the surface of metallic reflective layer, comprise step:
The corresponding flip LED chips place splash-proofing sputtering metal Seed Layer on the surface of metallic reflective layer;
Photoetching offset plate figure is formed by photoetching process on the surface of metal seed layer;
Be mask with photoetching offset plate figure, electroplate several strip metal post/blocks;
The metal seed layer of photoetching offset plate figure and inactive area is removed with degumming process.
Further, also step is comprised after the LED chip upside-down mounting with electrode being fixed in metal connecting layer:
At the gap-fill filler of LED chip and metallic reflective layer.
Further, step is comprised before being bonded to by photic zone above LED chip:
At LED chip surface spraying fluorescent material glue-line;
Printing binder I on the encapsulating structure completing fluorescent material glue-line, and solidification and leveling adhesive I;
The mode coated with adhesive II of recycling spin coating, with photic zone bonding, then cure adhesive II.
Further, step is comprised before utilizing photoetching, etching technics formation silicon through hole:
Reduction processing is carried out at the back side of silicon wafer, and the thickness to silicon wafer is no more than 200um.
The LED encapsulation structure that a kind of wafer level LED encapsulation method of the present invention is formed, comprise the back side and offer the silica-based body of several silicon through holes and the LED chip with electrode, the front of described silica-based body arranges insulating barrier I, and the inwall of described silicon through hole arranges insulating barrier II,
The surface of described insulating barrier I arranges discontinuous metallic reflective layer, the top of described silicon through hole arranges the insulating layer openings running through insulating barrier I and insulating barrier II, the surface of described insulating barrier II arranges discontinuous metal level I, metal level II, described metal level I, metal level II one end is connected with metallic reflective layer respectively by insulating layer openings, the other end outwards extends into the back side of silica-based body along silicon through hole and extends round about, described LED chip passes through metal gate upside-down mounting to metallic reflective layer, and filler is set, described electrode, metal gate, metallic reflective layer, metal level I realizes electrical connection, described electrode, metal gate, metallic reflective layer, metal level II realizes electrical connection, the periphery coating fluorescent material glue-line of described LED chip,
Also comprise metal level III, described metal level III is on the surface of the insulating barrier II at the back side of silica-based body and between metal level I, metal level II, described metal level III is not all connected with metal level I, metal level II;
Above LED chip, photic zone is set by adhesive.
Alternatively, described metal gate comprises several strip metal arranged in parallel block/posts.
Alternatively, described metal gate material is copper, and it is highly 5-15um.
Alternatively, described LED chip is connected with metal gate by metal connecting layer, and described metal connecting layer material is tin or ashbury metal, and it is highly 8-20um.
What structure of the present invention was intended to promote LED lamp bead by wafer level packaging mode goes out optical property, heat dispersion, reduces design and packaging cost.
Beneficial effect of the present invention is:
1, LED chip is seated on open and flat reflector, and surrounding is unobstructed, and LED light line can full angle outgoing;
2, use the LED rising angle needed for reality, follow-up secondary optical design structure all can be optimized on the basis of LED light line full angle outgoing;
3, LED chip realizes upside-down mounting by metal-gate structures and metallic reflective layer and is connected, and improves stability and the operability of reverse installation process;
4, the metal level being specially arranged at the vast scale at the silica-based body back side conducts the heat produced when LED chip works rapidly, effectively reduces the thermal resistance of LED encapsulation structure, contributes to promoting LED performance;
5, the chip design of wafer level packaging and package design can be unified to consider, carry out simultaneously, contribute to improving design efficiency, reduce design cost;
6, wafer level packaging from chip manufacturing, be encapsulated into product and mail to the whole process of user, intermediate link greatly reduces, and shortens the cycle, contributes to the reduction of cost.
Accompanying drawing explanation
Fig. 1 is the flow chart of a kind of wafer level LED encapsulation method of the present invention;
Fig. 2 is the schematic diagram of the embodiment of a kind of LED encapsulation structure of the present invention;
Fig. 3 is the metal gate of the embodiment of Fig. 2 and the position relationship schematic diagram of LED chip;
Fig. 4 is the LED chip of the embodiment of Fig. 2 and the position relationship schematic diagram of metal level;
Fig. 5 is the LED chip of the embodiment of Fig. 2 and the position relationship schematic diagram of metal level;
Fig. 6 to Figure 19 is the schematic diagram of the wafer level LED encapsulation method of Fig. 2 embodiment;
In figure: silicon wafer 100,101,102
Silica-based body 110
Silicon through hole 111
LED chip 200
Electrode 210,220
Photoetching offset plate figure 301
Metal gate 311,312
Metal connecting layer 321,322
Metallic reflective layer 400,410,420
Photoetching offset plate figure 401
Insulating barrier I 510,510 '
Insulating barrier II 520
Insulating layer openings 501,502
Filler 610
Adhesive 620
Adhesive I 621
Adhesive II 622
Fluorescent material glue-line 630
Photic zone 700
Protruding 801
Metal level I 810
Metal level II 820
Metal level III 830.
Embodiment
See Fig. 1, a kind of wafer level LED encapsulation method of the present invention, comprises following processing step:
Perform step S101: provide one with the silicon wafer of insulating barrier I, form metallic reflective layer on the surface of insulating barrier I;
Perform step S102: form metal gate on the surface of metallic reflective layer, then at the electroplating surface metal articulamentum of metal gate;
Perform step S103: be fixed in metal connecting layer by the LED chip upside-down mounting with electrode;
Perform step S104: top photic zone being bonded to LED chip;
Perform step S105: utilize photoetching, etching technics successively, form silicon through hole at the back side of silicon wafer;
Perform step S106: at the backside deposition insulating barrier II of silicon wafer, then in silicon through hole, formed the insulating layer openings running through insulating barrier I and insulating barrier II successively by the mode of photoetching, etching;
Perform step S107: successively by the mode of sputtering, photoetching, plating, at the forming metal layer on surface I of insulating barrier II, metal level II and metal level III, wherein metal level I is connected with metallic reflective layer respectively by insulating layer openings with metal level II, and metal level III is arranged between metal level I, metal level II;
Perform step S108: the silicon wafer completing encapsulation is cut into single independently packaging body.
The LED encapsulation structure that a kind of wafer level LED encapsulation method of the present invention is formed, as shown in Figures 2 to 5, comprise the back side and offer the silica-based body 110 of several silicon through holes 111 and the LED chip 200 with electrode 210,220, the front of described silica-based body 110 arranges insulating barrier I 510, and the inwall of described silicon through hole 111 arranges insulating barrier II 520.
The surface of insulating barrier I 510 arranges the metallic reflective layer 410,420 of the materials such as discontinuous silver, aluminium, and the interval between metallic reflective layer 410 and metallic reflective layer 420 is less than the interval between electrode 210 and electrode 220.Utilize the high reflectance character of the materials such as silver, aluminium, metallic reflective layer 410,420 can as the reflector of LED chip 200.Because LED chip 200 is seated on open and flat reflector, achieve the full angle outgoing of LED light line.LED chip 200 and can arrange the fillers such as silica gel 610 between metallic reflective layer 410 and metallic reflective layer 420, also can without any material.
Described LED chip 200 is by metal gate 311,312 upside-down mounting to metallic reflective layer 410,420, and as shown in Figure 3, described metal gate 311,312 comprises several strip metal arranged in parallel block/posts.Described electrode 210, metal gate 311, metallic reflective layer 410, metal level I 810 realize electrical connection, and described electrode 220, metal gate 312, metallic reflective layer 420, metal level II 820 realize electrical connection.The metal connecting layer 321,322 of tin or ashbury metal can be set between described LED chip 200 and metal gate 311,312.LED chip 200 realizes upside-down mounting by metal gate 311,312 with metallic reflective layer 410,420 and is connected, improve stability and the operability of reverse installation process, overcome LED chip 200 contingent drift in reflux technique, set up a monument or the bad connected mode such as rotation, ensure that consistency and uniformity that in wafer level technical process, LED chip 200 connects.Wherein the thickness range of the metal derby/post of metal gate 311 and metal gate 312 is 5-15um, and the thickness range of tin or ashbury metal is 8-20um, while the reliable connection of realization, can reduce thermal resistance to greatest extent.Metal gate 311,312 or metal gate 311,312 and metal connecting layer 321,322 also can be applied to the connection of traditional LED lamp bead being provided with LED reflection cup or other minute metallic parts and metal covering/block.
Between metal level I 810, metal level II 820, arrange metal level III 830 on the surface of the insulating backside layer II 520 of silica-based body 110, described metal level III 830 is not all connected with metal level I 810, metal level II 820.Metal level III 830 when can effectively LED chip 200 be worked the heat conducted on silica-based body 110 shed.
By the photic zone 700 of the materials such as the adhesives such as silica gel 620 fixing glass, organic resin above LED chip 200, the space between photic zone 700 and silica-based body 110 filled by adhesive 620.Wherein, the photic zone 700 of the good glass material of weatherability contributes to the life-span extending LED lamp bead environment out of doors.
The top of silicon through hole 111 arranges the insulating layer openings 501,502 running through insulating barrier I 510 and insulating barrier II 520, the surface of described insulating barrier II 520 arranges discontinuous metal level I 810, metal level II 820, described metal level I 810, metal level II 820 one end are connected with metallic reflective layer 410,420 respectively by insulating layer openings 501,502, the other end outwards extends into the back side of silica-based body 110 along silicon through hole 111 and extends round about, there is gap between metal level I 810, metal level II 820.Described metal level I 810, metal level II 820 extend rectangular at the back side of silica-based body 110, as shown in Figure 4; Described metal level I 810, metal level II 820 extend at the back side of silica-based body 110 also can in protruding 801 rectangle, described protruding 801 corresponding with silicon through hole 111, as shown in Figure 5.The described number of protruding 801 is no less than the number of silicon through hole 111, an at least corresponding silicon through hole 111 of projection 801.
Monochromatic LED chip 200 generally can only excite R(red), G(is green), B(is blue) three coloured light.And in the real life of people, more desirably use white light, in order to obtain white LED lamp pearl, the fluorescent material of blue LED die 200 excitation profile around it can be selected, the fluorescent material glue-line 630 that this fluorescent material is made can be coated on the light-emitting area of blue LED die 200, fluorescent material also can mix with adhesives 620 such as silica gel, is filled in the space between photic zone 700 and silica-based body 110.
The embodiment of a kind of LED encapsulation structure of the present invention, is formed by following wafer level LED encapsulation method.
As shown in Figures 6 to 9, there is provided one with insulating barrier I 510 ' silicon wafer 100, at insulating barrier I 510 ' surface by sputtering formed metallic reflective layer 400, photoetching offset plate figure 401 is formed by photoetching process on the surface of metallic reflective layer 400, with photoetching offset plate figure 401 for mask, etching metallic reflective layer 400, forms discontinuous metallic reflective layer 410,420.
As shown in Figure 10 and Figure 11, the corresponding flip LED chips 200 place splash-proofing sputtering metal Seed Layer (not shown) on the surface of metallic reflective layer 410,420, photoetching offset plate figure 301 is formed by photoetching process on the surface of metal seed layer, with photoetching offset plate figure 301 for mask, electroplate several strip metal post/blocks; The metal seed layer of photoetching offset plate figure 301 and inactive area is removed with degumming process, then at the electroplating surface metal articulamentum 311,312 of metal gate 321,322.
As shown in figure 12, by LED chip 200 upside-down mounting with electrode 210,220 in metal connecting layer 321,322, formed a fixed connection by backflow; The filler 610 such as some silica gel around LED chip 200, to fill the gap between LED chip 200 and metallic reflective layer 410,420.
As shown in figure 13, pre-set mask plate (not shown), fluorescent material glue-line 630 is sprayed on LED chip 200 surface by the mode of spraying, and uniform fold is peripheral to filler 610 and on the metallic reflective layer 410,420 of LED chip 200 periphery.
As shown in figure 14, the encapsulating structure completing fluorescent material glue-line 630 prints the adhesives such as silica gel I 621, and cure adhesive I 621, then the surface of adhesive I 621 is flattened by mechanical lapping mode.
As shown in figure 15, the mode recycling spin coating coats the adhesives such as silica gel II 622, with photic zone 700 bonding, then cure adhesive II 622.
As shown in figure 16, by grinder, reduction processing is carried out at the back side of silicon wafer 101, thickness to silicon wafer 102 is no more than 200um, then utilizes photoetching, etching technics successively, below the metallic reflective layer 410,420 at the back side of silicon wafer 102, form several silicon through holes 111.
As shown in figure 17, at the backside deposition insulating barrier II 520 of silicon wafer 102, then in silicon through hole 111, formed the insulating layer openings 501,502 running through insulating barrier I 510 and insulating barrier II 520 successively by the mode of photoetching, etching.
As shown in figure 18, successively by the mode of sputtering, photoetching, plating, discontinuous metal level I 810, metal level II 820 and metal level III 830 is formed on the surface of insulating barrier II 520, wherein metal level I 810 is connected with metallic reflective layer 410,420 respectively by insulating layer openings 501,502 with metal level II 820, and metal level III 830 is arranged between metal level I 810 and metal level II 820.
As shown in figure 19, adopt the mode of laser cutting or blade machine cuts that the silicon wafer 102 completing encapsulation is cut into single independently LED encapsulation structure, test also braid shipment.
LED encapsulation structure of the present invention and wafer level LED encapsulation method are not limited to above-described embodiment; any those skilled in the art without departing from the spirit and scope of the present invention; the any amendment done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all fall in protection range that the claims in the present invention define.
Claims (10)
1. a wafer level LED encapsulation method, comprises following processing step:
There is provided one with the silicon wafer of insulating barrier I (510 '), form metallic reflective layer (410,420) on the surface of insulating barrier I (510 ');
Metal gate (311,312) is formed on the surface of metallic reflective layer (410,420), then at the electroplating surface metal articulamentum (321,322) of metal gate (311,312);
LED chip (200) upside-down mounting with electrode (210,220) is fixed in metal connecting layer (321,322);
Photic zone (700) is bonded to the top of LED chip (200);
Utilize photoetching, etching technics successively, form silicon through hole (111) at the back side of silicon wafer;
At the backside deposition insulating barrier II (520) of silicon wafer, then in silicon through hole (111), formed the insulating layer openings (501,502) running through insulating barrier I (510) and insulating barrier II (520) successively by the mode of photoetching, etching;
Successively by the mode of sputtering, photoetching, plating, at the forming metal layer on surface I (810) of insulating barrier II (520), metal level II (820) and metal level III (830), wherein metal level I (810) is connected with metallic reflective layer (410,420) respectively by insulating layer openings (501,502) with metal level II (820), and metal level III (830) is arranged between metal level I (810), metal level II (820);
The silicon wafer completing encapsulation is cut into single independently packaging body.
2. a kind of wafer level LED encapsulation method according to claim 1, is characterized in that: form metallic reflective layer (410,420) on the surface of insulating barrier I (510 ') as follows:
Metallic reflective layer (400) is formed by sputtering on the surface of insulating barrier I (510 ');
Photoetching offset plate figure (401) is formed by photoetching process on the surface of metallic reflective layer (400);
With photoetching offset plate figure (401) for mask, etching metallic reflective layer (400), forms metallic reflective layer (410,420).
3. a kind of wafer level LED encapsulation method according to claim 2, is characterized in that: form metal gate (311,312) on the surface of metallic reflective layer (410,420), comprise step:
Corresponding flip LED chips (200) the place splash-proofing sputtering metal Seed Layer on the surface of metallic reflective layer (410,420);
Photoetching offset plate figure (301) is formed by photoetching process on the surface of metal seed layer;
With photoetching offset plate figure (301) for mask, electroplate several strip metal post/blocks;
The metal seed layer of photoetching offset plate figure (301) and inactive area is removed with degumming process.
4. a kind of wafer level LED encapsulation method according to claim 3, is characterized in that: also comprise step after LED chip (200) upside-down mounting with electrode (210,220) being fixed in metal connecting layer (321,322):
At the gap-fill filler (610) of LED chip (200) with metallic reflective layer (410,420).
5. a kind of wafer level LED encapsulation method according to claim 4, is characterized in that: comprise step before photic zone (700) being bonded to LED chip (200) top:
At LED chip (200) surface spraying fluorescent material glue-line (630);
Printing binder I (621) on the encapsulating structure completing fluorescent material glue-line (630), and solidification and leveling adhesive I (621);
The mode coated with adhesive II (622) of recycling spin coating, with photic zone (700) bonding, then cure adhesive II (622).
6. a kind of wafer level LED encapsulation method according to claim 5, is characterized in that: comprise step before utilizing photoetching, etching technics formation silicon through hole (111):
Reduction processing is carried out at the back side of silicon wafer, and the thickness to silicon wafer is no more than 200um.
7. the LED encapsulation structure of a wafer level LED encapsulation method formation as claimed in claim 6, it is characterized in that: comprise the back side and offer the silica-based body (110) of several silicon through holes (111) and the LED chip (200) with electrode (210,220), the front of described silica-based body (110) arranges insulating barrier I (510), the inwall of described silicon through hole (111) arranges insulating barrier II (520)
The surface of described insulating barrier I (510) arranges discontinuous metallic reflective layer (410, 420), the top of described silicon through hole (111) arranges the insulating layer openings (501 running through insulating barrier I (510) and insulating barrier II (520), 502), the surface of described insulating barrier II (520) arranges discontinuous metal level I (810), metal level II (820), described metal level I (810), metal level II (820) one end is respectively by insulating layer openings (501, 502) with metallic reflective layer (410, 420) connect, the other end outwards extends into the back side of silica-based body (110) along silicon through hole (111) and extends round about, and described LED chip (200) is by metal gate (311, 312) upside-down mounting is to metallic reflective layer (410, 420), and filler (610) is set, described electrode (210), metal gate (311), metallic reflective layer (410), metal level I (810) realizes electrical connection, described electrode (220), metal gate (312), metallic reflective layer (420), metal level II (820) realizes electrical connection, periphery coating fluorescent material glue-line (630) of described LED chip (200),
Also comprise metal level III (830), described metal level III (830) is positioned at the surface of the insulating barrier II (520) at the back side of silica-based body (110) and is positioned between metal level I (810), metal level II (820), and described metal level III (830) is not all connected with metal level I (810), metal level II (820);
In the top of LED chip (200), photic zone (700) is set by adhesive (620).
8. a kind of LED encapsulation structure according to claim 7, is characterized in that: described metal gate (311,312) comprises several strip metal arranged in parallel block/posts.
9. a kind of LED encapsulation structure according to claim 7 or 8, is characterized in that: described metal gate (311,312) material is copper, and it is highly 5-15um.
10. a kind of LED encapsulation structure according to claim 9, it is characterized in that: described LED chip (200) is connected with metal gate (311,312) by metal connecting layer (321,322), described metal connecting layer (321,322) material is tin or ashbury metal, and it is highly 8-20um.
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| CN104037305B (en) * | 2014-07-01 | 2016-11-23 | 江阴长电先进封装有限公司 | Low-thermal-resistance wafer-level LED packaging method and packaging structure thereof |
| CN104409523A (en) * | 2014-11-28 | 2015-03-11 | 江阴长电先进封装有限公司 | Package structure of semiconductor device |
| KR102481646B1 (en) * | 2015-11-12 | 2022-12-29 | 삼성전자주식회사 | Semiconductor light emitting device package |
| CN108257998A (en) * | 2018-01-23 | 2018-07-06 | 豪威科技(上海)有限公司 | CMOS image sensor and its manufacturing method |
| CN110420776B (en) * | 2019-08-06 | 2021-03-02 | 京东方科技集团股份有限公司 | Mask assembly and method for manufacturing Mini LED backlight module |
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