CN103633130A - 超低电容固体放电管 - Google Patents

超低电容固体放电管 Download PDF

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CN103633130A
CN103633130A CN201310718043.9A CN201310718043A CN103633130A CN 103633130 A CN103633130 A CN 103633130A CN 201310718043 A CN201310718043 A CN 201310718043A CN 103633130 A CN103633130 A CN 103633130A
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discharging tube
area
capacitance
solid discharging
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倪侠
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JIANGSU DONGGUANG MICRO-ELECTRONICS Co Ltd
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JIANGSU DONGGUANG MICRO-ELECTRONICS Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0839Cathode regions of thyristors

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Abstract

一种超低电容固体放电管,它包括上下两个硼基区P,在上下两个硼基区P内分别布置四个磷扩散区N+,形成元胞式阴极。本发明的上下两个硼基区P的外侧均设有金属层;在上下两个硼基区P内的磷扩散区N+等距分布;磷扩散区N+的结深为25~30μm;在上下两个硼基区P的结深均为10~15μm。本发明在原低电容结构设计基础上,将阴极调整为元胞式分布,提高每个元胞阴极的热沉周长,从而在相同芯片面积的基础上增加通流能力。基于该设计,原芯片面积可进行缩减,进而减小PN结面积,降低结电容。

Description

超低电容固体放电管
技术领域
 本发明涉及半导体芯片设计及制造,尤其是一种超低电容固体放电管。
背景技术
目前,半导体PN结两端的掺杂浓度越低,势垒展宽越宽,结寄生电容越小。其中常规结构器件以P区扩散浓度与衬底电阻率来控制电压,如图1所示,故寄生结电容值与电压值密切相关,而固体放电管应用则以电压为最主要特性参数,所以在该结构中电容为不可调节参数。该类器件电容值通常在140~180pF(击穿电压350V,抗6000V雷击)。随着固体放电管应用领域中数据传输速率的提高,器件寄生电容将对数据传输质量产生影响,寄生电容将使数字信号的传输产生丢包现象,从而降低数据传输速率。为了顺应应用领域的发展,低电容结构放电管应运而生。如图2所示,该结构使用N-埋层在高电阻率的硅衬底中形成较高掺杂浓度区域,从而使相同P扩散浓度时,即保证击穿电压,又大大降低了除埋层以外区域的寄生电容。该类器件的电容值通常在35~50pF之间(击穿电压350V,抗6000V雷击)。
随着4G网络的发展,自2012年起已有客户提出寄生电容30pF以下的产品,而按照目前的低电容结构则无法满足客户的应用需求。
发明内容
本发明的目的是针对目前的低电容结构无法实现寄生电容在30pF以下的问题,提出一种超低电容固体放电管。
本发明的技术方案是:
一种超低电容固体放电管,它包括上下两个硼基区P,在上下两个硼基区P内分别布置四个磷扩散区N+,形成元胞式阴极。
本发明的超低电容的结电容小于30pF。
本发明的上下两个硼基区P的外侧均设有金属层。
本发明中,在上下两个硼基区P内的磷扩散区N+等距分布。
本发明中,在上下两个硼基区P内的磷扩散区N+的结深为10~15μm。
本发明中,在上下两个硼基区P的结深均为25~30μm。
本发明的有益效果:
本发明的超低电容固体放电管在保证器件通流能力(PN结面积)的同时,将器件结电容降低至30pF以下,满足市场需求。
本发明在原低电容结构设计基础上,将阴极调整为元胞式分布,提高每个元胞阴极的热沉周长,从而在相同芯片面积的基础上增加通流能力。基于该设计,原芯片面积可进行缩减,进而减小PN结面积,降低结电容。
 
附图说明
图1是本发明的常规结构器件结构示意图。
图2是本发明的低电容结构放电管结构示意图。
图3是本发明的结构示意图之一。
图4是本发明的结构示意图之二即元胞式结构示意图。
 
具体实施方式
下面结合附图和实施例对本发明作进一步的说明。
如图3、4所示,一种超低电容固体放电管,它包括上下两个硼基区P,在上下两个硼基区P内分别布置四个磷扩散区N+,形成元胞式阴极;硼基区P的结深均为25~30μm。
本发明中,超低电容的结电容小于30pF。
本发明中,上下两个硼基区P的外侧均设有金属层;在上下两个硼基区P内的磷扩散区N+等距分布;磷扩散区N+的结深为10~15μm。
下表为使用该设计后所制样品的参数对比:
Figure 2013107180439100002DEST_PATH_IMAGE001
由上表可见,在DP3500低电容版其余工艺条件不变的情况下,新增“元胞式阴极结构”,使寄生结电容降低至23~24pF,且保证10/1000μs波形100A电流冲击100%通过,完全满足客户在高速数据通讯环境下的应用。目前这一低寄生电容工艺水平为行业第一,远远低于LittleFuse 35pF的电容极限值,填补了业界超低电容固体放电管技术领域的空白。
本发明未涉及部分均与现有技术相同或可采用现有技术加以实现。

Claims (6)

1.一种超低电容固体放电管,它包括上下两个硼基区P(1),其特征是在上下两个硼基区P(1)内分别布置四个磷扩散区N+(2),形成元胞式阴极。
2.根据权利要求1所述的超低电容固体放电管,其特征是超低电容的结电容小于30pF。
3.根据权利要求1所述的超低电容固体放电管,其特征是上下两个硼基区P(1)的外侧均设有金属层(3)。
4.根据权利要求1所述的超低电容固体放电管,其特征是在上下两个硼基区P(1)内的磷扩散区N+(2)等距分布。
5.根据权利要求1所述的超低电容固体放电管,其特征是在上下两个硼基区P(1)内的磷扩散区N+(2)的结深为10~15μm。
6.根据权利要求1所述的超低电容固体放电管,其特征是在上下两个硼基区P(1)的结深均为25~30μm。
CN201310718043.9A 2013-12-24 2013-12-24 超低电容固体放电管 Pending CN103633130A (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106229349A (zh) * 2016-09-30 2016-12-14 安徽富芯微电子有限公司 一种超低电容低压半导体放电管芯片及其制造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4089024A (en) * 1972-09-20 1978-05-09 Hitachi, Ltd. Semiconductor switching device
US4967256A (en) * 1988-07-08 1990-10-30 Texas Instruments Incorporated Overvoltage protector
US5479031A (en) * 1993-09-10 1995-12-26 Teccor Electronics, Inc. Four layer overvoltage protection device having buried regions aligned with shorting dots to increase the accuracy of overshoot voltage value
CN101523606A (zh) * 2006-10-03 2009-09-02 威世通用半导体公司 高击穿电压二极管及其形成方法
CN202172070U (zh) * 2011-07-20 2012-03-21 江苏东光微电子股份有限公司 带有离子注入区的固体放电管
CN203644786U (zh) * 2013-12-24 2014-06-11 江苏东光微电子股份有限公司 超低电容固体放电管

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4089024A (en) * 1972-09-20 1978-05-09 Hitachi, Ltd. Semiconductor switching device
US4967256A (en) * 1988-07-08 1990-10-30 Texas Instruments Incorporated Overvoltage protector
US5479031A (en) * 1993-09-10 1995-12-26 Teccor Electronics, Inc. Four layer overvoltage protection device having buried regions aligned with shorting dots to increase the accuracy of overshoot voltage value
CN101523606A (zh) * 2006-10-03 2009-09-02 威世通用半导体公司 高击穿电压二极管及其形成方法
CN202172070U (zh) * 2011-07-20 2012-03-21 江苏东光微电子股份有限公司 带有离子注入区的固体放电管
CN203644786U (zh) * 2013-12-24 2014-06-11 江苏东光微电子股份有限公司 超低电容固体放电管

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106229349A (zh) * 2016-09-30 2016-12-14 安徽富芯微电子有限公司 一种超低电容低压半导体放电管芯片及其制造方法
CN106229349B (zh) * 2016-09-30 2019-05-10 富芯微电子有限公司 一种超低电容低压半导体放电管芯片及其制造方法

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