CN103617785B - A kind of three-dimensional liquid crystal display device and display control method - Google Patents
A kind of three-dimensional liquid crystal display device and display control method Download PDFInfo
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Abstract
The open a kind of three-dimensional liquid crystal display device of the present invention and display control method, in order to realize controlling flexibly the brightness of the 3D liquid crystal display that refresh rate is 240Hz or above.Described three-dimensional liquid crystal display device includes: liquid crystal panel；Gate driver circuit, source electrode drive circuit；Selector circuit, for exporting to described gate driver circuit according to selecting control signal to control the wherein road in the two-way gate driving control signal that receives, and the wherein road controlled in the two paths of data drive control signal that receives exports to described source electrode drive circuit；Time schedule controller, for receiving the data signal of signal source and to described source electrode drive circuit outputting data signals, exports two-way gate driving control signal to described selector circuit simultaneously, and exports two paths of data drive control signal to described selector circuit.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of three-dimensional (3D) liquid crystal indicator and display control method.
Background technology
Along with the progress of information technology, 3D liquid crystal indicator is increasingly universal, and shutter glass type 3D liquid crystal indicator can keep picture original resolution with it, i.e. can enjoy full HD 3D effect, accounts for main flow in the market.
In 3D field of liquid crystal display, in shutter 3D liquid crystal indicator, the alternately display of right and left eyes image, specifically, when needs display eye image, right eyeglass is opened left eyeglass and is closed, when needs display left-eye image, left eyeglass is opened right eyeglass and is closed, and during whole, the refreshing sequential of right and left eyes image is to maintain synchronization with the switching sequence of glasses left and right eyeglass, thus the left eye of warrantor can see the left-eye image of each two field picture by the left eyeglass of 3D glasses, the right eye of warrantor can see the eye image of each two field picture by the right eyeglass of 3D glasses, user is again by the process of brain, form 3D image.
In the shutter 3D liquid crystal indicator of main flow, mainly include that refresh rate is 120Hz and 240Hz two kinds.Wherein, refresh rate is that the display mode of 3D liquid crystal indicator of 120Hz is: the alternately display of right and left eyes image.Coordinate the stereoeffect that the switch of backlight scanning and shutter glasses realizes simultaneously.Refresh rate is that the display mode of the 3D liquid crystal indicator of 240Hz is: insert black image between right and left eyes image, coordinates backlight scanning or flashes the stereoeffect controlling to realize plus the switch of glasses.
Prior art refresh rate is in the shutter 3D liquid crystal indicator of 240Hz, the DISPLAY ORDER of the left-eye image (L) of one two field picture, black plug image (B) and eye image (R) is as it is shown in figure 1, insert black image (B) between adjacent left-eye image (L) and eye image (R)；Black image (B) is in order to solve the cross-interference issue between left-eye image and eye image.
But prior art, the control method of display left-eye image (L), black plug image (B) and eye image (R) is as shown in Figure 2.
A, B, C, D shown in Fig. 2 represents continuous print picture frame A, picture frame B, picture frame C and picture frame D respectively.As needs display picture frame A, time schedule controller (Tcon) passes through the scanning to grid line of enable signal (OE) the control gate drive circuit of field sync signal (STV), the clock signal (CPV) scanning every a line grid line and data output, and controls, by latch signal (TP), the data signal (Data) that the liquid crystal molecule of source electrode drive circuit output current line unlatching to be inputted.
Prior art, time schedule controller (Tcon) exports a STV, a CPV, a TP and an OE value.Source electrode drive circuit and gate driver circuit drive 3D display screen display image according to the signal that Tcon exports.When display screen shows a two field picture, show left-eye image, black plug image, eye image, black plug image, left-eye image, black plug image, eye image successively, by that analogy.Left-eye image, eye image are identical with the pulse width of black plug image, and display screen refreshes the time of black plug image equal to refreshing left-eye image or the time of eye image.Usually, the time returning to original state after liquid crystal molecule tilt-stable shows left-eye image or the clock cycle (about 4.2ms) of eye image less than normal, the most usually, returns to time about about the 1.7ms of original state after liquid crystal molecule tilt-stable.When the time of black plug image is not less than after liquid crystal molecule overturns under the effect of gray scale voltage time when returning to original state, black plug image can solve the cross-interference issue between left-eye image and eye image.
Prior art, the 3D liquid crystal display of black plug mode, the black plug clock cycle is identical with the cycle all the time of display left-eye image or eye image, cause while ensureing 3D display effect, because the black plug time is long so that the brightness of display screen is relatively low, it is unfavorable for that realizing high-quality 3D rendering shows.
Summary of the invention
The embodiment of the present invention provides a kind of three-dimensional liquid crystal display device and display control method, in order to realize controlling flexibly the brightness of the 3D liquid crystal display that refresh rate is 240Hz or above.
For achieving the above object, the three-dimensional liquid crystal display device that the embodiment of the present invention provides includes:
Liquid crystal panel；
Gate driver circuit, for driving the grid line on described liquid crystal panel according to the gate driving control signal received；
Source electrode drive circuit, for providing the gray scale voltage signal corresponding with described data signal according to the data drive control signal that receives and data signal to described liquid crystal panel；
Selector circuit, for exporting to described gate driver circuit according to selecting control signal to control the wherein road in the two-way gate driving control signal that receives, and the wherein road controlled in the two paths of data drive control signal that receives exports to described source electrode drive circuit；
Time schedule controller, for receiving the data signal of signal source and to described source electrode drive circuit outputting data signals, exports two-way gate driving control signal to described selector circuit simultaneously, and exports two paths of data drive control signal to described selector circuit；Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
The embodiment of the present invention also provides for the control method of a kind of three-dimensional liquid crystal display device, including:
Selector circuit is according to selecting a control signal output wherein road from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller；
Gate driver circuit receives the gate driving control signal from described selection control, is scanned the corresponding line grid line on liquid crystal panel according to the gate driving control signal being currently received；
Source electrode drive circuit receives the data drive control signal from described selection control and the data signal from described time schedule controller, exports described data signal according to the data drive control signal being currently received to liquid crystal panel；
Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
In sum, the embodiment of the present invention is by arranging selector circuit in liquid crystal indicator, this selector circuit is for exporting to gate driver circuit according to selecting control signal to control the wherein road in the two-way gate driving control signal that receives, and the wherein road controlled in the two paths of data drive control signal that receives exports to source electrode drive circuit；When showing a frame 3-D view, the output of two-way gate driving control signal interval can be controlled, accordingly, control two paths of data drive control signal interval output left-eye image or eye image and eliminate the image of crosstalk, owing to can control to adjust interval time, i.e. show that the time of left-eye image or eye image is unequal with the time of the image of display elimination crosstalk, it is achieved thereby that the non-linear refresh technique of 3D rendering, realize the time being used for eliminating the image of the crosstalk showing described left-eye image and eye image controlling flexibly to insert between left-eye image and eye image, control the brightness of the refresh rate 3D liquid crystal display of 240Hz or above flexibly；And then when making the time showing left-eye image and eye image more than display for the time of the image eliminating crosstalk, improve the brightness of 3D liquid crystal display.
Accompanying drawing explanation
Fig. 1 is prior art 240Hz refresh rate display left-eye image, black plug image and the DISPLAY ORDER figure of eye image；
Fig. 2 is the working timing figure of prior art 240Hz refresh rate display 3D rendering liquid crystal panel；
The LCD device structure schematic diagram that Fig. 3 provides for the embodiment of the present invention；
Left-eye image that Fig. 4 provides for the embodiment of the present invention, eye image, the sequential chart of non-linear refreshing mode of gray/black image；
Fig. 5 is the selector circuit structural representation shown in Fig. 3；
Fig. 6 is the chip schematic diagram corresponding with the first selector electronic circuit shown in Fig. 5 to third selector electronic circuit；
The control method overall procedure schematic diagram of the 3D liquid crystal indicator that Fig. 7 provides for the embodiment of the present invention；
The sequential chart of each drive control signal of 3D liquid crystal indicator that Fig. 8 embodiment of the present invention provides.
Detailed description of the invention
The embodiment of the present invention provides a kind of three-dimensional (3D) liquid crystal indicator and display control method, in order to realize controlling flexibly the brightness of the 3D liquid crystal display that refresh rate is 240Hz or above.
The 3D liquid crystal indicator that the embodiment of the present invention provides, when showing each two field picture, by left-eye image and eye image alternately display, between left-eye image and eye image, insert the image (can be such as black image or gray image etc.) for eliminating crosstalk simultaneously.When showing each two field picture, the present invention by time schedule controller export for the first control signal controlling left-eye image and eye image shows, and for control between described left-eye image and eye image display for eliminating the second control signal that the image of crosstalk show, the control 3D higher 3D rendering of liquid crystal indicator display brightness.Due to the fact that display is controlled by different control signals from display left-eye image and eye image respectively for the image eliminating crosstalk, the clock cycle of the display image for eliminating crosstalk can control flexibly, specifically, control display and be less than display left-eye image or the clock cycle of eye image for the clock cycle eliminating the image of crosstalk, improve the brightness of liquid crystal indicator display image.
Specifically, the present invention is exported by the wherein road in selector circuit selection two-way gate driving control signal and exports to source electrode drive circuit to the wherein road in gate driver circuit, and two paths of data drive control signal；Realize inserting black or gray image between left-eye image and eye image.
Liquid crystal indicator and the display control method that the embodiment of the present invention provides will be illustrated below by accompanying drawing.
See Fig. 3, the liquid crystal indicator provided for the embodiment of the present invention, including:
Liquid crystal panel 1；
Gate driver circuit 2, for driving the grid line on liquid crystal panel 1 according to the gate driving control signal received；
Source electrode drive circuit 3, for providing the gray scale voltage signal corresponding with described data signal according to the data drive control signal that receives and data signal (Data) to liquid crystal panel 1；
Selector circuit 4, for exporting to gate driver circuit 2 according to selecting control signal (CS) to control the wherein road in the two-way gate driving control signal that receives, and the wherein road controlled in the two paths of data drive control signal that receives exports to source electrode drive circuit 3；
Time schedule controller (Tcon) 5, for receiving the data signal of signal source and to source electrode drive circuit 3 outputting data signals, exports two-way gate driving control signal to selector circuit 4 simultaneously, and exports two paths of data drive control signal to selector circuit 4；
Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
It is preferred that the image for eliminating the crosstalk showing described left-eye image and eye image of the present invention is black image or gray image.
It is preferred that select control signal (CS) to can come from the motherboard circuit (motherboard circuit not shown in Fig. 3) being connected with time schedule controller 5.Motherboard circuit is used for producing mainboard control signal, and time schedule controller 5 is according to mainboard control signal output source electrode drive control signal and gate driving control signal.Specifically, signal generator (SignalGenerator) the output source electrode drive control signal during mainboard control signal controls time schedule controller and gate driving control signal.
The embodiment of the present invention is by arranging selector circuit 4 in liquid crystal indicator, this selector circuit 4 is for exporting to gate driver circuit 2 according to selecting control signal CS to control the wherein road in the two-way gate driving control signal received, and the wherein road controlled in the two paths of data drive control signal that receives exports to source electrode drive circuit 3；When showing a frame 3D rendering, the output of two-way gate driving control signal interval can be controlled, and controlling the output of two paths of data drive control signal interval, corresponding image refreshing is referred to as non-linear refreshing, it is achieved that control the brightness of the 3D liquid crystal display that refresh rate is 240Hz or above flexibly.
To meet explanation as a example by refresh rate is not less than the 3D liquid crystal display of 240Hz.
See Fig. 4, show the sequential chart of a frame 3D rendering for left-eye image (L), eye image (R), gray/black image (L/B or R/B).
Left-eye image L and eye image R interval show, and insert gray/black image (L/B or R/B) between left-eye image L and eye image R；The clock cycle of display gray/black image is t2, and display left-eye image L or eye image R clock cycle are t1 or t3；Left-eye image L can be controlled by first via gate driving control signal and first via data drive control signal and eye image R shows, control gray/black image by the second tunnel gate driving control signal and the second circuit-switched data drive control signal and show；Owing to left-eye image L and eye image R are controlled by same road gate driving control signal and data drive control signal, therefore, the corresponding clock cycle identical (i.e. t1=t3)；The clock cycle of display gray/black image is that t2 can arrange and meets t2 < t1, realize the non-linear refreshing of a two field picture, and owing to the time of display gray/black image is less than display left-eye image L or the time of eye image R, the display brightness of 3D rendering is improved, and adding the frame number of refreshed image in the unit interval, refresh rate is more than 240Hz.
It is to say, the technical scheme that the embodiment of the present invention provides, at least go for the liquid crystal indicator of high-resolution and ultrahigh resolution.
It should be noted that the present invention above-mentioned gray/black image belongs to the image for eliminating crosstalk, the present invention only illustrates as a example by gray/black image, and any image for eliminating crosstalk is all applicable to the image of the above-mentioned non-linear refreshing mode of the present invention and shows.
In 3D lcd technology, the type of the described data signal that source electrode drive circuit 3 provides to liquid crystal panel 1 can be, but not limited to as left-eye image signal, eye image signal, black signal or gray image signal.
Usually, gate driving control signal at least includes:
Initial pulse signal (STV) (also referred to as field sync signal), the initial time of gated sweep in time controlling to show each two field picture, the corresponding STV signal of each two field picture, the rising edge of this signal represents the triggered time of gated sweep.
Clock signal (CPV, for row scan control), for controlling the signal that every a line grid line is opened, i.e. controls the signal that the liquid crystal molecule corresponding with grid line on this row is opened.
Output enables signal (OE), the signal whether gate driving control signal received for gate driver circuit 2 exports, and output enables output channel when signal OE signal is high level and closes, and output enables signal OE signal when being low level, and output channel is opened.
Data drive control signal at least includes the latch signal (TP) of data, time buffer in the data controlling signal of image, the rising edge of this latch signal represents that the data in this buffer are already prepared to, gray scale voltage conversion can be carried out, the trailing edge of this latch signal represents that the data signal in buffer is complete the conversion of gray scale voltage, can export gray scale voltage.
If first via gate driving control signal and first via data drive control signal are for controlling the display of left-eye image and eye image；
Second tunnel gate driving control signal and the second circuit-switched data drive control signal are for controlling the display of black plug/ash image；
It is preferred that see Fig. 5, the selector circuit 4 shown in Fig. 3 includes:
First selector electronic circuit 41, for according to selecting control signal CS to control the first clock signal (CPV1 received, also referred to as clock signal) and one of them output of second clock signal (CPV2), i.e. currently export clock signal CPV=CPV1 to gate driver circuit or CPV=CPV2.
Second selector electronic circuit 42, the first output for controlling to receive according to described selection control signal CS enables one of them output of signal (OE1) and the second output enable signal (OE2), and i.e. current output enables signal OE=OE1 or OE=OE2 to the output of gate driver circuit.
Third selector electronic circuit 43, for controlling one of them output of the first latch signal (TP1) and the second latch signal (TP2) received according to described selection control signal CS, i.e. current output is to latch signal TP=TP1 or TP=TP2 of source electrode drive circuit.
OR circuit 44, for optionally exporting the first initial pulse signal (STV1) and the second initial pulse signal (STV2).Currently export when the signal of the first initial pulse signal (STV1) is rising edge to the initial pulse signal STV=STV1 of gate driver circuit, currently export to the initial pulse signal STV=STV2 of gate driver circuit when the second initial pulse signal (STV2) is rising edge.
OR circuit 44 shown in Fig. 5, including input 1 and 2, the input of the most corresponding STV1 and the input of STV2；Including outfan 3, being used for exporting STV signal, this STV signal is STV1 or STV2 at synchronization.
It is preferred that described selection control signal CS can be any low and high level control signal, or pulse width modulating signal (PWM).
For inserting black or the nonlinear scanning mode of gray image between left-eye image and eye image, the frequency of CS signal is two times of the first initial pulse signal (STV1) frequency, or two times of the second initial pulse signal (STV2).By selector circuit, can realize the non-linear refreshing of a two field picture, the refresh time of i.e. one two field picture controls in 1/240s.
It is preferred that first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 can be single-pole double-throw switch (SPDT) respectively.
Illustrating as a example by pwm signal, one of which embodiment is:
When PWM is high level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 export the first clock signal (CPV1) respectively, the first output enables signal (OE1), and the first latch signal (TP1)；
When PWM is low level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 export second clock signal (CPV2) respectively, the second output enables signal (OE2), and the second latch signal (TP2).
Another embodiment is:
When PWM is low level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 export the first clock signal (CPV1) respectively, the first output enables signal (OE1), and the first latch signal (TP1)；
When PWM is high level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 export second clock signal (CPV2) respectively, the second output enables signal (OE2), and the second latch signal (TP2).
Table 1 is one of pwm signal logical relation schematic diagram with CPV, OE and TP signal；
Table 2 is the two of the pwm signal logical relation schematic diagram with CPV, OE and TP signal；
One of logical relation of table 1:PWM signal and CPV, OE and TP signal:
| PWM | CPV | OE | TP |
| High | CPV1 | OE1 | TP1 |
| Low | CPV2 | OE2 | TP2 |
The two of the logical relation of table 2:PWM signal and CPV, OE and TP signal:
| PWM | CPV | OE | TP |
| High | CPV2 | OE2 | TP2 |
| Low | CPV1 | OE1 | TP1 |
Table 3: the logical relation of OR circuit:
| STV1 | STV2 | STV |
| High | High | High |
| High | Low | High |
| Low | High | High |
| Low | Low | Low |
Fig. 6 is the chip schematic diagram corresponding with the first selector electronic circuit shown in Fig. 5 to third selector electronic circuit；
This chip includes 12 pins.
Pin IN is for the input of described selection control signal CS, the such as input of pwm signal；
Pin NO1 is for the input of CPV1；
Pin NC2 is for the input of CPV2；
Pin COM1 is for the output of CPV1 or CPV2；
Pin NO1, pin NC2 are corresponding with described first selector electronic circuit with pin COM1；
Pin NO2 is for the input of OE1；
Pin NC2 is for the input of OE2；
Pin COM2 is for the output of OE1 or OE2；
Pin NO2, pin NC2 are corresponding with described second selector electronic circuit with pin COM2；
Pin NO3 is for the input of TP1；
Pin NC3 is for the input of TP2；
Pin COM3 is for the output of TP1 or TP2；
Pin NO3, pin NC3 are corresponding with described third selector electronic circuit with pin COM3；
Pin 0 is for providing high level reference voltage VCC for each pin, and pin 1 is for providing low level reference voltage GND for each pin.
Shutter 3D Display Technique, especially refresh rate is not less than the 3D Display Technique of 240Hz, when showing a two field picture, control 3D liquid crystal indicator and realize left-eye image and eye image alternately display, and between left-eye image and eye image, insert black or gray image, liquid crystal panel coordinates backlight scanning simultaneously, and the switch of shutter glasses realizes stereoeffect.
To specifically introduce the control method of the 3D liquid crystal indicator that the embodiment of the present invention provides below.
Seeing Fig. 7, described control method mainly comprises the steps that
S101, selector circuit are according to selecting a control signal output wherein road from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller；
S102, gate driver circuit receive the gate driving control signal from described selection control, are scanned the corresponding line grid line on liquid crystal panel according to the gate driving control signal being currently received；
S103, source electrode drive circuit receive the data drive control signal from described selection control and the data signal from described time schedule controller, export described data signal according to the data drive control signal being currently received to liquid crystal panel；
Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
The sequencing of step S102 and step S103 can exchange.
Step S101 also included before described selector circuit exports described gate driving control signal and data drive control signal:
Time schedule controller alternately shows first grid drive control signal and the first data drive control signal of described left-eye image and eye image to selector circuit output for controlling described liquid crystal panel；And to selector circuit output for showing second grid drive control signal and the second data drive control signal of the image eliminating the crosstalk showing described left-eye image and eye image.
In the specific implementation, the mainboard control signal that time schedule controller produces according to the motherboard circuit being attached thereto exports source electrode drive control signal and gate driving control signal, and from the left-eye image signal of signal source and eye image signal, additionally output is for eliminating the picture signal of crosstalk between left-eye image and eye image.Motherboard circuit can control time schedule controller and export to selector circuit left-eye image signal, eye image signal and for eliminating the picture signal of crosstalk between left-eye image and eye image at current time simultaneously.Selector circuit at current time according to the rising edge in the first initial pulse signal in first grid drive control signal or the second initial pulse signal in second grid drive control signal, control output first grid drive control signal and the first data drive control signal, or export second grid drive control signal and the second data drive control signal.The method makes 3D display image more flexible, by controlling left-eye image or the clock cycle of eye image, and control for eliminating the clock cycle of the image of crosstalk between left-eye image and eye image, i.e. control the first initial pulse signal and the width of the second initial pulse signal rising edge, control to refresh the time of a two field picture, thus control the refresh rate that 3D rendering shows flexibly.
It is black image or gray image it is preferred that described for showing the image eliminating the crosstalk showing described left-eye image and eye image.
When showing described black image, one of which embodiment is: the pathway closure of control gate drive circuit output gate driving control signal so that corresponding row liquid crystal molecule is not switched on, and can reduce the power consumption of gate driver circuit.
Another embodiment is: controlling source electrode drive circuit and stop exporting any data signal, the latch signal TP i.e. controlling data is in low level not output state.
When showing described gray image, control gate drive circuit output raster data model Ganoderma signal, control source electrode drive circuit output gray image simultaneously.
It is preferred that described first grid drive control signal includes: the first initial pulse signal, the first clock signal and the first output enable signal；First data drive control signal includes: the latch signal of the first data；
Described second grid drive control signal includes: the second initial pulse signal, second clock signal and the second output enable signal；Second data drive control signal includes: the latch signal of the second data；
Step S101, described selector circuit is according to selecting a control signal output wherein road from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller, particularly as follows:
When the state that the state of described first pulse signal is in rising edge and the second pulse signal is in trailing edge, described selector circuit exports described first pulse signal；The most described selection control signal controls selector circuit and exports described first clock signal, the first output enable signal and latch signal of the first data；
When the state that the state of described second pulse signal is in rising edge and the first pulse signal is in trailing edge, described selector circuit exports described second pulse signal；The most described selection control signal controls selector circuit and exports described second clock signal, the second output enable signal and latch signal of the second data.
Generally, within the same clock cycle, the first pulse signal and the second pulse signal one are in rising edge (or trailing edge), and one is in trailing edge (or rising edge).Certainly also it is not excluded for being simultaneously in rising edge or trailing edge.The present invention is directed to one and be in rising edge (or trailing edge), one is in trailing edge (or rising edge) and illustrates.
It is preferred that described selection control signal controls, selector circuit exports described first clock signal, the first output enables signal and the latch signal of the first data, particularly as follows:
Described selection control signal control selector circuit output for row scan control the first clock signal, export the first output that the passage of liquid crystal panel opens for control gate drive control signal and enable signal, and the latch signal of the first data that the data within representing the buffer in source electrode drive circuit are already prepared to；
Described selection control signal controls selector circuit and exports described second clock signal, the second output enable signal and latch signal of the second data, particularly as follows:
The control selector circuit output of described selection control signal is used for the second clock signal of row scan control, is used for controlling the second output enable signal of the pathway closure that control gate drive control signal exports liquid crystal panel, and for representing that the buffer of source electrode drive circuit gets out output gray scale voltage.
It is preferred that the clock cycle of described second pulse signal is less than the clock cycle of the first pulse signal, and reverted to the time of original state experience by deflection state more than liquid crystal molecule in liquid crystal panel so that left-eye image and eye image are completely separable.Usually, time about about the 1.7ms of original state is returned to after liquid crystal molecule tilt-stable.The clock cycle of the embodiment of the present invention the second pulse signal i.e. black plug cycle can control at about 2sm, specifically can according to the actual requirements depending on, be not particularly limited here.
It is preferred that described selection control signal is low and high level control signal, or pulse width modulating signal.
In sum, the present invention provide above-mentioned can perception method mainly by controlling initial pulse signal (STV) (also referred to as field sync signal) and selecting the sequential of control signal (CS) to select to enable signal OE, the latch signal TP of data with display left-eye image and clock signal CPV corresponding to eye image, output by selector circuit, or select and show black or clock signal CPV corresponding to gray image, export enable signal OE, the latch signal TP of data.
Below will be with the 240Hz refresh rate non-linear black plug time as 1.8ms, resolution is explanation as a example by 1024*2048.
See Fig. 8, for the sequential chart of each drive control signal of 3D liquid crystal indicator.
YDIO_U is the first pulse signal STV1.
The pulse of each STV1 represents the beginning refreshing a two field picture.YDIO_U signal shows at 2D and is the pulse signal of 120Hz under 3D display pattern；Clock cycle is 1/ (120Hz)=1/120 (s).
STV2 is the synchronizing signal of black plug image under 3D display pattern, and each pulse represents the beginning of black plug image.
YCLK signal is the first clock signal CPV1.
The clock signal that YCLK signal refreshes for single file under 2D display pattern, the clock cycle is 1/1080s；When 3D shows pattern, left eye eye pattern picture and eye image are the clock signal that duplicate rows refreshes, and the clock cycle is respectively 1/2160(s)；
YCLK1 is second clock signal CPV2(clock signal when i.e. showing black image), YCLK1 is the clock signal that four row refresh, and the clock cycle is 1/4320(s),
YCLKO signal is clock signal CPV selected by selector circuit, and the YCLKO signal shown in Fig. 8 includes CPV1 and CPV2 signal.The clock cycle refreshing black image is the 1/2 of the clock cycle refreshing left-eye image or eye image.
YOE signal is that under 3D display pattern, the first output enable signal OE1 and second output enables the signal that signal OE2 controls to export by selector circuit, by the display of the sequencing contro image of OE1 when display left-eye image and eye image, by the display of the sequencing contro black image of OE2 during black plug.
LD signal is the latch signal TP of data；When being punctual with the logical relation described in table 1, normally exporting TP1 signal, display left-eye image and eye image when PWM is high level, when PWM is low level, output LD signal is low level, shows black image.
The embodiment of the present invention realizes the 3D black insertion technology of 240Hz refresh rate by arranging selector circuit, the moment of inserting black image and the cycle of inserting black image are adjusted flexibly, substantially reduce the time inserted used by black image, by inserting the technology opening multirow input black image in image process simultaneously, reduce the time inserted used by black image.
Can be to ensure the effectiveness that image shows by the way of reaching stable state by effective image, left being kept completely separate along image and eye image is accomplished by the insertion of the black image of short time, avoid crosstalk bad, the 3D rendering display effect of high refresh rate high-quality can be realized, the display time of the effective image shown in Fig. 8 is 5.5ms, and the time of black plug image is 1.8ms.
It addition, the present invention is by arranging selector circuit between time schedule controller and source electrode drive circuit and gate driver circuit, it is achieved the non-linear refreshing display mode of a two field picture.In the SG3D display system that 240Hz black plug or image repeat, the refresh time of black image or multiimage can be compressed in 2ms the most shorter, as efficiently separated out right and left eyes image by insertion black image, simultaneously because the black plug time short substantially reduces the luminance loss that black image brings, it is effectively increased SG3D effect.TconIC is required relatively low by the most this mode so that the cost of whole 3D liquid crystal indicator is lower.
Obviously, those skilled in the art can carry out various change and deform without departing from the spirit and scope of the present invention the present invention.So, if these amendments of the present invention and deformation belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these changes and deformation.
Claims (14)
1. a three-dimensional liquid crystal display device, it is characterised in that including:
Liquid crystal panel；
Gate driver circuit, for driving the grid line on described liquid crystal panel according to the gate driving control signal received；
Source electrode drive circuit, for providing the gray scale voltage signal corresponding with described data signal according to the data drive control signal that receives and data signal to described liquid crystal panel；
Selector circuit, for exporting to described gate driver circuit according to selecting control signal to control the wherein road in the two-way gate driving control signal that receives, and the wherein road controlled in the two paths of data drive control signal that receives exports to described source electrode drive circuit；
Time schedule controller, for receiving the data signal of signal source and to described source electrode drive circuit outputting data signals, exports two-way gate driving control signal to described selector circuit simultaneously, and exports two paths of data drive control signal to described selector circuit；Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
Three-dimensional liquid crystal display device the most according to claim 1, it is characterized in that, time schedule controller is to described selector circuit output first grid drive control signal, the first data drive control signal, second grid drive control signal and the second data drive control signal；
Described first grid drive control signal and the first data drive control signal are used for controlling described liquid crystal panel interval and show described left-eye image and eye image；
Described second grid drive control signal and the second data drive control signal are for controlling to insert before described liquid crystal panel shows eye image after display left-eye image the image of the described crosstalk for eliminating the described left-eye image of display and eye image.
Three-dimensional liquid crystal display device the most according to claim 2, it is characterised in that the described image for eliminating the crosstalk showing described left-eye image and eye image is black image or gray image.
Three-dimensional liquid crystal display device the most according to claim 3, it is characterised in that
Described first grid drive control signal includes: the first initial pulse signal, the first clock signal and the first output enable signal；First data drive control signal includes: the latch signal of the first data；
Described second grid drive control signal includes: the second initial pulse signal, second clock signal and the second output enable signal；Second data drive control signal includes: the latch signal of the second data.
Three-dimensional liquid crystal display device the most according to claim 4, it is characterised in that described selector circuit includes:
First selector electronic circuit, for controlling one of them output of described first clock signal and the second clock signal received according to described selection control signal；
Second selector electronic circuit, the first output for controlling to receive according to described selection control signal enables signal and second and exports one of them output enabling signal；
Third selector electronic circuit, for controlling one of them output of the latch signal of the latch signal of the first data and the second data received according to described selection control signal；
OR circuit, is used for selecting to export the first initial pulse signal or the second initial pulse signal.
Three-dimensional liquid crystal display device the most according to claim 5, it is characterised in that described first selector electronic circuit, second selector electronic circuit and third selector electronic circuit are respectively single-pole double-throw switch (SPDT).
7. according to the three-dimensional liquid crystal display device described in the arbitrary claim of claim 1-6, it is characterised in that described selection control signal is low and high level control signal, or pulse width modulating signal.
8. the control method of a three-dimensional liquid crystal display device, it is characterised in that including:
Selector circuit is according to selecting a control signal output wherein road from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller；
Gate driver circuit receives the gate driving control signal from described selector circuit, is scanned the corresponding line grid line on liquid crystal panel according to the gate driving control signal being currently received；
Source electrode drive circuit receives the data drive control signal from described selection control and the data signal from described time schedule controller, exports gray scale voltage signal according to the data drive control signal being currently received and data signal to liquid crystal panel；
Wherein, described data signal is left-eye image signal, eye image signal or for eliminating the image of the crosstalk showing described left-eye image and eye image.
Control method the most according to claim 8, it is characterised in that also included before described selector circuit exports described gate driving control signal and data drive control signal:
Time schedule controller alternately shows first grid drive control signal and the first data drive control signal of described left-eye image and eye image to selector circuit output for controlling described liquid crystal panel；And to selector circuit output for eliminating second grid drive control signal and the second data drive control signal of the image of the crosstalk showing described left-eye image and eye image.
Control method the most according to claim 9, it is characterised in that the described image for eliminating the crosstalk showing described left-eye image and eye image is black image or gray image.
11. control methods according to claim 10, it is characterised in that described first grid drive control signal includes: the first initial pulse signal, the first clock signal and the first output enable signal；First data drive control signal includes: the latch signal of the first data；
Described second grid drive control signal includes: the second initial pulse signal, second clock signal and the second output enable signal；Second data drive control signal includes: the latch signal of the second data；
Described selector circuit is according to selecting a control signal output wherein road from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller, particularly as follows:
When the state that the state of described first initial pulse signal is in rising edge and the second initial pulse signal is in low level, described selector circuit exports described first initial pulse signal；The most described selection control signal controls selector circuit and exports described first clock signal, the first output enable signal and latch signal of the first data；
When the state that the state of described second initial pulse signal is in rising edge and the first initial pulse signal is in low level, described selector circuit exports described second initial pulse signal；The most described selection control signal controls selector circuit and exports described second clock signal, the second output enable signal and latch signal of the second data.
12. control methods according to claim 11, it is characterised in that described selection control signal controls selector circuit and exports described first clock signal, the first output enable signal and latch signal of the first data, particularly as follows:
Described selection control signal control selector circuit output for row scan control the first clock signal, export the first output that the passage of liquid crystal panel opens for control gate drive control signal and enable signal, and the latch signal of the first data that the data within representing the buffer in source electrode drive circuit are already prepared to；
Described selection control signal controls selector circuit and exports described second clock signal, the second output enable signal and latch signal of the second data, particularly as follows:
Described selection control signal controls selector circuit output and is used for the second clock signal of row scan control, exports the second output enable signal that the passage of liquid crystal panel is opened for control gate drive control signal, and for representing that the buffer of source electrode drive circuit gets out export the latch signal of the second data of gray scale voltage.
13. control methods according to claim 11, it is characterised in that the clock cycle of the second initial pulse signal is equal to the clock cycle of the first initial pulse signal, and is reverted to the time of original state experience by deflection state more than liquid crystal molecule in liquid crystal panel.
14. control methods according to claim 11, it is characterised in that described selection control signal is low and high level control signal, or pulse width modulating signal.
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| CN103871386B (en) * | 2014-03-25 | 2015-11-25 | 昆山龙腾光电有限公司 | A kind of scan control circuit and use its display device |
| TWI514349B (en) * | 2014-06-05 | 2015-12-21 | Au Optronics Corp | Display device and method of switching display mode |
| TWI639991B (en) * | 2016-07-11 | 2018-11-01 | 茂達電子股份有限公司 | Led display device |
| CN113450726A (en) | 2020-03-26 | 2021-09-28 | 聚积科技股份有限公司 | Scanning display and driving device and driving method thereof |
| CN113450722A (en) * | 2020-03-26 | 2021-09-28 | 聚积科技股份有限公司 | Scanning display and driving method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101895782A (en) * | 2010-08-09 | 2010-11-24 | 福建华映显示科技有限公司 | Stereoscopic display and display method thereof |
| JP2012088536A (en) * | 2010-10-20 | 2012-05-10 | Jvc Kenwood Corp | Liquid crystal display device and driving method thereof |
| CN102789769A (en) * | 2012-07-05 | 2012-11-21 | 青岛海信电器股份有限公司 | Three-dimensional (3D) liquid crystal display driving method and 3D liquid crystal display system |
| CN102789774A (en) * | 2012-08-15 | 2012-11-21 | 贵阳海信电子有限公司 | Method and device for optimizing 3D (three dimensional) display effect of LCD (liquid crystal display) screen and LCD television |
| CN103151005A (en) * | 2013-01-31 | 2013-06-12 | 南京中电熊猫液晶显示科技有限公司 | Driving method of liquid crystal display |
| CN103297791A (en) * | 2012-03-02 | 2013-09-11 | 精工爱普生株式会社 | Video display apparatus and video display method |
-
2013
- 2013-11-29 CN CN201310628427.1A patent/CN103617785B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101895782A (en) * | 2010-08-09 | 2010-11-24 | 福建华映显示科技有限公司 | Stereoscopic display and display method thereof |
| JP2012088536A (en) * | 2010-10-20 | 2012-05-10 | Jvc Kenwood Corp | Liquid crystal display device and driving method thereof |
| CN103297791A (en) * | 2012-03-02 | 2013-09-11 | 精工爱普生株式会社 | Video display apparatus and video display method |
| CN102789769A (en) * | 2012-07-05 | 2012-11-21 | 青岛海信电器股份有限公司 | Three-dimensional (3D) liquid crystal display driving method and 3D liquid crystal display system |
| CN102789774A (en) * | 2012-08-15 | 2012-11-21 | 贵阳海信电子有限公司 | Method and device for optimizing 3D (three dimensional) display effect of LCD (liquid crystal display) screen and LCD television |
| CN103151005A (en) * | 2013-01-31 | 2013-06-12 | 南京中电熊猫液晶显示科技有限公司 | Driving method of liquid crystal display |
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