CN103617785A - Three-dimensional liquid crystal display device and display control method - Google Patents
Three-dimensional liquid crystal display device and display control method Download PDFInfo
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- CN103617785A CN103617785A CN201310628427.1A CN201310628427A CN103617785A CN 103617785 A CN103617785 A CN 103617785A CN 201310628427 A CN201310628427 A CN 201310628427A CN 103617785 A CN103617785 A CN 103617785A
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Abstract
The invention discloses a three-dimensional liquid crystal display device and a display control method, so that the display brightness of 3D liquid crystal with the refresh rate to be 240Hz or more is flexibly controlled. The three-dimensional liquid crystal display device comprises a liquid crystal panel, a grid drive circuit, a source drive circuit, a selector circuit and a time schedule controller. The selector circuit is used for controlling one of two received grid drive control signals to be output to the grid drive circuit according to a selective control signal, and controlling one of two received data drive control signals to be output to the source drive circuit. The time schedule controller is used for receiving data signals of a signal source and outputting the data signals to the source drive circuit, outputting two grid drive control signals to the selector circuit, and outputting two data drive control signals to the selector circuit.
Description
Technical field
The present invention relates to display technique field, relate in particular to a kind of three-dimensional (3D) liquid crystal indicator and display control method.
Background technology
Along with the progress of infotech, 3D liquid crystal indicator is increasingly general, and shutter glass type 3D liquid crystal indicator can keep picture original resolution with it, can enjoy full HD 3D effect, accounts for main flow in market.
In 3D field of liquid crystal display, in shutter 3D liquid crystal indicator, right and left eyes image Alternation Display, particularly, when needs show eye image, right eyeglass is opened left eyeglass and is closed, when needs show left-eye image, left eyeglass is opened right eyeglass and is closed, and in whole process, the sequential that refreshes of right and left eyes image keeps synchronizeing with the switching sequence of glasses left and right eyeglass, so just underwriter's left eye can be seen by the left eyeglass of 3D glasses the left-eye image of each two field picture, underwriter's right eye can be seen by the right eyeglass of 3D glasses the eye image of each two field picture, user is again by the processing of brain, form 3D image.
In the shutter 3D liquid crystal indicator of main flow, mainly comprise that refresh rate is two kinds of 120Hz and 240Hz.The display mode of the 3D liquid crystal indicator that wherein, refresh rate is 120Hz is: right and left eyes image Alternation Display.The stereoeffect that simultaneously coordinates the switch realization of scanning backlight and shutter glasses.Refresh rate is that the display mode of the 3D liquid crystal indicator of 240Hz is: between right and left eyes image, insert black image, coordinate scanning backlight or flicker control to add the stereoeffect that the switch of glasses is realized.
Prior art refresh rate is in the shutter 3D liquid crystal indicator of 240Hz, the DISPLAY ORDER of the left-eye image of one two field picture (L), black plug image (B) and eye image (R), for as shown in Figure 1, is inserted black image (B) between adjacent left-eye image (L) and eye image (R); Black image (B) is in order to solve the cross-interference issue between left-eye image and eye image.
But prior art, shows the control method of left-eye image (L), black plug image (B) and eye image (R) as shown in Figure 2.
A shown in Fig. 2, B, C, D represent respectively continuous picture frame A, picture frame B, picture frame C and picture frame D.When needs show picture frame A, time schedule controller (Tcon) is controlled the scanning of gate driver circuit to grid line by the enable signal (OE) of field sync signal (STV), the clock signal (CPV) that scans every a line grid line and data output, and the data-signal (Data) of the liquid crystal molecule wish input of opening by latch signal (TP) control source electrode drive circuit output current line.
Prior art, time schedule controller (Tcon) is exported a STV, CPV, a TP and an OE value.Source electrode drive circuit and gate driver circuit show image according to the signal driver 3D display screen of Tcon output.When display screen shows a two field picture, show successively left-eye image, black plug image, eye image, black plug image, left-eye image, black plug image, eye image, by that analogy.Left-eye image, eye image are identical with the pulse width of black plug image, and display screen refreshes the time that time of black plug image equals to refresh left-eye image or eye image.Usually, the time of getting back to original state after liquid crystal molecule tilt-stable is less than the clock period (about 4.2ms) of normal demonstration left-eye image or eye image, for example usually, gets back to about 1.7ms of the time left and right of original state after liquid crystal molecule tilt-stable.During time while getting back to original state after the time of black plug image is not less than under the effect of liquid crystal molecule at gray scale voltage upset, black plug image can solve the cross-interference issue between left-eye image and eye image.
Prior art, the 3D liquid crystal display of black plug mode, the black plug clock period is identical with the cycle all the time that shows left-eye image or eye image, cause when guaranteeing 3D display effect, because the black plug time is long, make the brightness of display screen lower, be unfavorable for realizing high-quality 3D rendering and show.
Summary of the invention
The embodiment of the present invention provides a kind of three-dimensional liquid crystal display device and display control method, in order to realize the brightness that flexible control refresh rate is 240Hz or above 3D liquid crystal display.
For achieving the above object, the three-dimensional liquid crystal display device that the embodiment of the present invention provides comprises:
Liquid crystal panel;
Gate driver circuit, for driving the grid line on described liquid crystal panel according to the gate driving control signal receiving;
Source electrode drive circuit, for providing the gray scale voltage signal corresponding with described data-signal according to the data drive control signal and the data-signal that receive to described liquid crystal panel;
Selector circuit, for exporting to described gate driver circuit according to a wherein road of selecting control signal to control the two-way gate driving control signal receiving, and described source electrode drive circuit is exported on a wherein road of controlling in the two paths of data drive control signal receiving;
Time schedule controller, for receiving the data-signal of signal source and to described source electrode drive circuit outputting data signals, simultaneously to described selector circuit output two-way gate driving control signal, and exporting two paths of data drive control signal to described selector circuit; Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
The embodiment of the present invention also provides a kind of control method of three-dimensional liquid crystal display device, comprising:
Selector circuit is according to a wherein road of selecting control signal output from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller;
Gate driver circuit receives the gate driving control signal from described selection control, according to the current gate driving control signal receiving, the corresponding line grid line on liquid crystal panel is scanned;
Source electrode drive circuit receives from the data drive control signal of described selection control with from the data-signal of described time schedule controller, according to the current data drive control signal receiving, to liquid crystal panel, exports described data-signal;
Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
In sum, the embodiment of the present invention by arranging selector circuit in liquid crystal indicator, this selector circuit is for exporting to gate driver circuit according to a wherein road of selecting control signal to control the two-way gate driving control signal receiving, and source electrode drive circuit is exported on a wherein road of controlling in the two paths of data drive control signal receiving, when showing a frame 3-D view, can control the output of two-way gate driving control signal interval, accordingly, control the image that two paths of data drive control signal interval output left-eye image or eye image and elimination are crosstalked, because can control adjustment interval time, the time that shows left-eye image or eye image is unequal with the time that shows the image that elimination is crosstalked, thereby realized the non-linear refresh technique of 3D rendering, realize control flexibly between left-eye image and eye image, insert for eliminating the time of the image of crosstalking that shows described left-eye image and eye image, control flexibly the brightness of 240Hz or above refresh rate 3D liquid crystal display, and then be greater than and show when eliminating the time of the image of crosstalking in the time that makes to show left-eye image and eye image, improved the brightness of 3D liquid crystal display.
Accompanying drawing explanation
Fig. 1 is the DISPLAY ORDER figure that prior art 240Hz refresh rate shows left-eye image, black plug image and eye image;
Fig. 2 is the working timing figure that prior art 240Hz refresh rate shows 3D rendering liquid crystal panel;
The LCD device structure schematic diagram that Fig. 3 provides for the embodiment of the present invention;
The non-linear sequential chart that refreshes mode of the left-eye image that Fig. 4 provides for the embodiment of the present invention, eye image, grey/black image;
Fig. 5 is the selector circuit structural representation shown in Fig. 3;
Fig. 6 is to chip schematic diagram corresponding to third selector electronic circuit with the first selector electronic circuit shown in Fig. 5;
The control method overall procedure schematic diagram of the 3D liquid crystal indicator that Fig. 7 provides for the embodiment of the present invention;
The sequential chart of each drive control signal of 3D liquid crystal indicator that Fig. 8 embodiment of the present invention provides.
Embodiment
The embodiment of the present invention provides a kind of three-dimensional (3D) liquid crystal indicator and display control method, in order to realize the brightness that flexible control refresh rate is 240Hz or above 3D liquid crystal display.
The 3D liquid crystal indicator that the embodiment of the present invention provides, when showing each two field picture, by left-eye image and eye image Alternation Display, between left-eye image and eye image, insert for eliminating the image (such as thinking black image or gray image etc.) of crosstalking simultaneously.When showing each two field picture, the first control signal showing for controlling left-eye image and eye image that the present invention exports by time schedule controller, and for being controlled at the second control signal showing for eliminating the image of crosstalking showing between described left-eye image and eye image, control the higher 3D rendering of 3D liquid crystal indicator display brightness.The present invention controls by different control signals respectively from showing left-eye image and eye image owing to showing for eliminating the image of crosstalking, show for eliminating the clock period of the image of crosstalking and can control flexibly, particularly, control and show the clock period that is less than demonstration left-eye image or eye image for eliminating the clock period of the image of crosstalking, improve the brightness that liquid crystal indicator shows image.
Particularly, the present invention selects the wherein road in two-way gate driving control signal to export to gate driver circuit by selector circuit, and source electrode drive circuit is exported on the wherein road in two paths of data drive control signal; Black or gray image are inserted in realization between left-eye image and eye image.
Below by the liquid crystal indicator and the display control method that illustrate the embodiment of the present invention by accompanying drawing and provide.
Referring to Fig. 3, the liquid crystal indicator for the embodiment of the present invention provides, comprising:
Source electrode drive circuit 3, for providing the gray scale voltage signal corresponding with described data-signal according to the data drive control signal and the data-signal (Data) that receive to liquid crystal panel 1;
Time schedule controller (Tcon) 5, for receiving the data-signal of signal source and to source electrode drive circuit 3 outputting data signals, simultaneously to selector circuit 4 output two-way gate driving control signal, and exporting two paths of data drive control signal to selector circuit 4;
Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
Preferably, of the present invention is black image or gray image for eliminating the image of crosstalking of the described left-eye image of demonstration and eye image.
Preferably, selection control signal (CS) can be from the motherboard circuit being connected with time schedule controller 5 (not shown motherboard circuit in Fig. 3).Motherboard circuit is for generation of mainboard control signal, and time schedule controller 5 is according to mainboard control signal output source electrode drive control signal and gate driving control signal.Particularly, mainboard control signal is controlled signal generator (Signal Generator) output source electrode drive control signal and the gate driving control signal in time schedule controller.
The embodiment of the present invention by arranging selector circuit 4 in liquid crystal indicator, this selector circuit 4 is for exporting to gate driver circuit 2 according to a wherein road of selecting control signal CS to control the two-way gate driving control signal receiving, and source electrode drive circuit 3 is exported on a wherein road of controlling in the two paths of data drive control signal receiving; When showing a frame 3D rendering, can control the output of two-way gate driving control signal interval, and control the output of two paths of data drive control signal interval, corresponding image refreshing is called non-linear refreshing, and has realized flexible control refresh rate and be the brightness of 240Hz or above 3D liquid crystal display.
Take that to meet the 3D liquid crystal display that refresh rate is not less than 240Hz be example explanation.
Referring to Fig. 4, for left-eye image (L), eye image (R), grey/black image (L/B or R/B) show the sequential chart of a frame 3D rendering.
Left-eye image L and eye image R interval show, and between left-eye image L and eye image R, insert grey/black image (L/B or R/B); The clock period that shows grey/black image is t2, shows that left-eye image L or eye image R clock period are t1 or t3; Can show by first via gate driving control signal and first via data drive control signal controlling left-eye image L and eye image R, by the second tunnel gate driving control signal and the second circuit-switched data drive control signal, control grey/black image and show; Because left-eye image L and eye image R are by same road gate driving control signal and data drive control signal controlling, therefore, the corresponding clock period identical (being t1=t3); The clock period that shows grey/black image is that t2 can arrange and meets t2<t1, realizing the non-linear of a two field picture refreshes, and owing to showing that the time of grey/black image is less than the time that shows left-eye image L or eye image R, the display brightness of 3D rendering is improved, and the frame number that has increased refreshed image in the unit interval, refresh rate is greater than 240Hz.
That is to say that the technical scheme that the embodiment of the present invention provides at least goes for the liquid crystal indicator of high resolving power and ultrahigh resolution.
It should be noted that, the above-mentioned grey/black image of the present invention belongs to the image of crosstalking for eliminating, and the present invention only be take grey/black image as example explanation, anyly for eliminating the image of crosstalking, is all applicable to the above-mentioned non-linear image that refreshes mode of the present invention and shows.
In 3D lcd technology, the type of the described data-signal that source electrode drive circuit 3 provides to liquid crystal panel 1 can be, but not limited to as left-eye image signal, eye image signal, black signal or gray image signal.
Usually, gate driving control signal at least comprises:
Initial pulse signal (STV) (also claiming field sync signal), the initial time of gated sweep while showing each two field picture for controlling, the corresponding STV signal of each two field picture, the rising edge of this signal represents the triggered time of gated sweep.
Clock signal (CPV controls for line scanning), the signal of opening for controlling every a line grid line, controls the signal that the liquid crystal molecule corresponding with grid line on this row opened.
Output enable signal (OE), the signal whether gate driving control signal receiving for gate driver circuit 2 is exported, when output enable signal OE signal is high level, output channel is closed, and when output enable signal OE signal is low level, output channel is opened.
Data drive control signal at least comprises the latch signal (TP) of data, time working storage in the data controlling signal of image, the rising edge of this latch signal represents that the data in this working storage are ready to, can carry out gray scale voltage conversion, the negative edge of this latch signal represents that the data-signal in working storage has completed the conversion of gray scale voltage, can export gray scale voltage.
If first via gate driving control signal and first via data drive control signal are for controlling the demonstration of left-eye image and eye image;
The second tunnel gate driving control signal and the second circuit-switched data drive control signal are for controlling the demonstration of black plug/grey image;
Preferably, referring to Fig. 5, the selector circuit 4 shown in Fig. 3 comprises:
First selector electronic circuit 41, for controlling according to selection control signal CS the first clock signal (CPV1 receiving, also claim clock signal) and one of them output of second clock signal (CPV2), i.e. current clock signal C PV=CPV1 or CPV=CPV2 that exports to gate driver circuit.
Second selector electronic circuit 42, for control the first output enable signal (OE1) of receiving and one of them of the second output enable signal (OE2) according to described selection control signal CS, export, i.e. current output enable signal OE=OE1 or OE=OE2 that exports to gate driver circuit.
Third selector electronic circuit 43, for control the first latch signal (TP1) of receiving and one of them of the second latch signal (TP2) according to described selection control signal CS, export, i.e. current latch signal TP=TP1 or TP=TP2 that exports to source electrode drive circuit.
OR circuit 44, for optionally exporting the first initial pulse signal (STV1) and the second initial pulse signal (STV2).The current initial pulse signal STV=STV1 that exports to gate driver circuit when the signal of the first initial pulse signal (STV1) is rising edge, the current initial pulse signal STV=STV2 that exports to gate driver circuit when the second initial pulse signal (STV2) is rising edge.
OR circuit 44 shown in Fig. 5, comprises input end 1 and 2, respectively the input end of corresponding STV1 and the input end of STV2; Comprise output terminal 3, for exporting STV signal, this STV signal is STV1 or STV2 at synchronization.
Preferably, described selection control signal CS can be any low and high level control signal, or pulse width modulating signal (PWM).
For the nonlinear sweep mode of inserting black or gray image between left-eye image and eye image, the frequency of CS signal is two times of the first initial pulse signal (STV1) frequency, or two times of the second initial pulse signal (STV2).By selector circuit, can realize the non-linear of a two field picture and refresh, the refresh time of a two field picture is controlled in 1/240s.
Preferably, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 can be single-pole double-throw switch (SPDT) respectively.
Take pwm signal as example explanation, and wherein a kind of embodiment is:
When PWM is high level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 are exported respectively the first clock signal (CPV1), the first output enable signal (OE1), and the first latch signal (TP1);
When PWM is low level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 are exported respectively second clock signal (CPV2), the second output enable signal (OE2), and the second latch signal (TP2).
Another embodiment is:
When PWM is low level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 are exported respectively the first clock signal (CPV1), the first output enable signal (OE1), and the first latch signal (TP1);
When PWM is high level, first selector electronic circuit 41, second selector electronic circuit 42 and third selector electronic circuit 43 are exported respectively second clock signal (CPV2), the second output enable signal (OE2), and the second latch signal (TP2).
Table 1 is one of logical relation schematic diagram of pwm signal and CPV, OE and TP signal;
Table 2 be pwm signal and CPV, OE and TP signal logical relation schematic diagram two;
One of logical relation of table 1:PWM signal and CPV, OE and TP signal:
| PWM | CPV | OE | TP |
| High | CPV1 | OE1 | TP1 |
| Low | CPV2 | OE2 | TP2 |
Two of the logical relation of table 2:PWM signal and CPV, OE and TP signal:
| PWM | CPV | OE | TP |
| High | CPV2 | OE2 | TP2 |
| Low | CPV1 | OE1 | TP1 |
Table 3: the logical relation of OR circuit:
| STV1 | STV2 | STV |
| High | High | High |
| High | Low | High |
| Low | High | High |
| Low | Low | Low |
Fig. 6 is to chip schematic diagram corresponding to third selector electronic circuit with the first selector electronic circuit shown in Fig. 5;
This chip comprises 12 pins.
Pin IN for example, for the input of described selection control signal CS, the input of pwm signal;
Pin NO1 is for the input of CPV1;
Pin NC2 is for the input of CPV2;
Pin COM1 is for the output of CPV1 or CPV2;
Pin NO1, pin NC2 and pin COM1 are corresponding with described first selector electronic circuit;
Pin NO2 is for the input of OE1;
Pin NC2 is for the input of OE2;
Pin COM2 is for the output of OE1 or OE2;
Pin NO2, pin NC2 and pin COM2 are corresponding with described second selector electronic circuit;
Pin NO3 is for the input of TP1;
Pin NC3 is for the input of TP2;
Pin COM3 is for the output of TP1 or TP2;
Pin NO3, pin NC3 and pin COM3 are corresponding with described third selector electronic circuit;
Pin 0 is used to each pin that high level reference voltage VCC is provided, and pin one is used to each pin that low level reference voltage GND is provided.
Shutter 3D display technique, especially refresh rate is not less than the 3D display technique of 240Hz, while showing a two field picture, control 3D liquid crystal indicator and realize left-eye image and eye image Alternation Display, and between left-eye image and eye image, insert black or gray image, liquid crystal panel coordinates scanning backlight simultaneously, and the switch of shutter glasses is realized stereoeffect.
The control method of the 3D liquid crystal indicator that the embodiment of the present invention provides will specifically be introduced below.
Referring to Fig. 7, described control method mainly comprises the following steps:
S101, selector circuit are according to a wherein road of selecting control signal output from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller;
S102, gate driver circuit receive the gate driving control signal from described selection control, according to the current gate driving control signal receiving, the corresponding line grid line on liquid crystal panel are scanned;
S103, source electrode drive circuit receive from the data drive control signal of described selection control with from the data-signal of described time schedule controller, according to the current data drive control signal receiving, to liquid crystal panel, export described data-signal;
Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
The sequencing of step S102 and step S103 can exchange.
Step S101 also comprised before described selector circuit is exported described gate driving control signal and data drive control signal:
Time schedule controller to selector circuit output for controlling first grid drive control signal and the first data drive control signal of left-eye image and eye image described in described liquid crystal panel Alternation Display; And for showing elimination, show second grid drive control signal and the second data drive control signal of the image of crosstalking of described left-eye image and eye image to selector circuit output.
In the specific implementation, mainboard control signal output source electrode drive control signal and gate driving control signal that time schedule controller produces according to the motherboard circuit being attached thereto, and from left-eye image signal and the eye image signal of signal source, output is for eliminating the picture signal of crosstalking between left-eye image and eye image in addition.Motherboard circuit can be controlled time schedule controller and export to selector circuit left-eye image signal, eye image signal and for eliminating the picture signal of crosstalking between left-eye image and eye image at current time simultaneously.Selector circuit at current time according to the first initial pulse signal in first grid drive control signal or the rising edge in the second initial pulse signal in second grid drive control signal, control output first grid drive control signal and the first data drive control signal, or output second grid drive control signal and the second data drive control signal.The method makes 3D show that image is more flexible, by controlling the clock period of left-eye image or eye image, and the clock period of control for eliminating the image of crosstalking between left-eye image and eye image, control the width of the first initial pulse signal and the second initial pulse signal rising edge, control refreshes the time of a two field picture, thereby controls flexibly the refresh rate that 3D rendering shows.
Preferably, the described image of crosstalking of eliminating the described left-eye image of demonstration and eye image for showing is black image or gray image.
When showing described black image, wherein a kind of embodiment is: control the pathway closure of gate driver circuit output gate driving control signal, corresponding row liquid crystal molecule is not opened, can reduce the power consumption of gate driver circuit.
Another kind of embodiment is: control source electrode drive circuit and stop exporting any data-signal, the latch signal TP that controls data is in low level output state not.
When showing described gray image, control gate driver circuit output grid and drive glossy ganoderma signal, control source electrode drive circuit output gray image simultaneously.
Preferably, described first grid drive control signal comprises: the first initial pulse signal, the first clock signal and the first output enable signal; The first data drive control signal comprises: the latch signal of the first data;
Described second grid drive control signal comprises: the second initial pulse signal, second clock signal and the second output enable signal; The second data drive control signal comprises: the latch signal of the second data;
Step S101, described selector circuit is according to a wherein road of selecting control signal output from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller, is specially:
When the state of described the first pulse signal state in rising edge and the second pulse signal is during in negative edge, described selector circuit is exported described the first pulse signal; Simultaneously described selection control signal is controlled the latch signal that selector circuit is exported described the first clock signal, the first output enable signal and the first data;
When the state of described the second pulse signal state in rising edge and the first pulse signal is during in negative edge, described selector circuit is exported described the second pulse signal; Simultaneously described selection control signal is controlled the latch signal that selector circuit is exported described second clock signal, the second output enable signal and the second data.
Generally, within the same clock period, one of the first pulse signal and the second pulse signal are in rising edge (or negative edge), and one in negative edge (or rising edge).Certainly do not get rid of simultaneously in rising edge or negative edge yet.The present invention is directed to one in rising edge (or negative edge), one describes in negative edge (or rising edge).
Preferably, described selection control signal is controlled the latch signal that selector circuit is exported described the first clock signal, the first output enable signal and the first data, is specially:
The first output enable signal that described selection control signal controls the first clock signal that selector circuit output controls for line scanning, output to liquid crystal panel passage for controlling gate driving control signal is opened, and for representing the latch signal of ready the first data of data in the working storage of source electrode drive circuit;
Described selection control signal is controlled the latch signal that selector circuit is exported described second clock signal, the second output enable signal and the second data, is specially:
Described selection control signal is controlled selector circuit and is exported the second clock signal of controlling for line scanning, the second output enable signal that outputs to the pathway closure of liquid crystal panel for controlling gate driving control signal, and for representing that the working storage of source electrode drive circuit is ready to export gray scale voltage.
Preferably, the clock period of described the second pulse signal is less than the clock period of the first pulse signal, and is greater than liquid crystal molecule in liquid crystal panel and by deflection state, is reverted to the time of original state experience, and left-eye image and eye image are separated completely.Usually, after liquid crystal molecule tilt-stable, get back to about 1.7ms of the time left and right of original state.The clock period of the embodiment of the present invention the second pulse signal is to be controlled at 2sm left and right the black plug cycle, specifically can determine according to the actual requirements, does not do concrete restriction here.
Preferably, described selection control signal is low and high level control signal, or pulse width modulating signal.
In sum, provided by the invention above-mentioned can perception method mainly by controlling initial pulse signal (STV) (also claiming field sync signal) and selecting the sequential of control signal (CS) select clock signal C PV, the output enable signal OE corresponding with demonstration left-eye image and eye image, the latch signal TP of data by selector circuit, or selection clock signal C PV, the output enable signal OE corresponding with demonstration black or gray image, the latch signal TP of data.
Below will take the non-linear black plug time of 240Hz refresh rate is 1.8ms, and resolution is that 1024*2048 is example explanation.
Referring to Fig. 8, it is the sequential chart of each drive control signal of 3D liquid crystal indicator.
YDIO_U is the first pulse signal STV1.
The beginning that the pulse representative of each STV1 refreshes a two field picture.YDIO_U signal is the pulse signal of 120Hz under 2D demonstration and 3D display mode; Clock period is 1/ (120Hz)=1/120 (s).
STV2 is the synchronizing signal of black plug image under 3D display mode, and each pulse represents the beginning of black plug image.
YCLK signal is the first clock signal C PV1.
The clock signal that YCLK signal refreshes for single file under 2D display mode, the clock period is 1/1080s; During 3D display mode, left eye eye pattern picture and eye image are the clock signal that duplicate rows refreshes, and the clock period is respectively 1/2160(s);
YCLK1 is the clock signal of second clock signal CPV2(while showing black image), YCLK1 is the clock signal that four lines refreshes, the clock period is 1/4320(s),
The clock signal C PV of YCLKO signal for selecting by selector circuit, the YCLKO signal shown in Fig. 8 comprises CPV1 and CPV2 signal.The clock period of refreshing black image be refresh left-eye image or eye image clock period 1/2.
YOE signal is that under 3D display mode, the first output enable signal OE1 and the second output enable signal OE2 control the signal of output by selector circuit, while showing left-eye image and eye image, pass through the demonstration of the sequential control image of OE1, during black plug, pass through the demonstration of the sequential control black image of OE2.
LD signal is the latch signal TP of data; When the logical relation of take described in table 1 is as punctual, when PWM is high level, normal output TP1 signal, shows left-eye image and eye image, and when PWM is low level, output LD signal is low level, shows black image.
The embodiment of the present invention realizes the 3D black insertion technology of 240Hz refresh rate by selector circuit is set, adjust flexibly and insert the moment of black image and the cycle of inserting black image, greatly reduced to insert the black image time used, by insert the technology of opening multirow input black image in image process simultaneously, reduce to insert the black image time used.
The mode that can reach stable state by effective image guarantees the validity that image shows, left complete separated along image and eye image accomplished in the insertion of the black image by the short time, avoid crosstalking bad, can realize the high-quality 3D rendering display effect of high refresh rate, the displaying time of the effective image shown in Fig. 8 is 5.5ms, and the time of black plug image is 1.8ms.
In addition, the present invention, by selector circuit being set between time schedule controller and source electrode drive circuit and gate driver circuit, realizes the non-linear display mode that refreshes of a two field picture.In the SG3D display system of 240Hz black plug or image repetition, the refresh time of black image or multiimage can be compressed in to 2ms even shorter, as effectively separated right and left eyes image by inserting black image, because the black plug time is short, greatly reduced the luminance loss that black image brings, effectively improved SG3D effect simultaneously.This mode is lower to Tcon IC requirement simultaneously, makes the cost of whole 3D liquid crystal indicator lower.
Obviously, those skilled in the art can carry out various changes and distortion and not depart from the spirit and scope of the present invention the present invention.Like this, if within these modifications of the present invention and distortion belong to the scope of the claims in the present invention and equivalent technologies thereof, the present invention is also intended to comprise these changes and distortion interior.
Claims (14)
1. a three-dimensional liquid crystal display device, is characterized in that, comprising:
Liquid crystal panel;
Gate driver circuit, for driving the grid line on described liquid crystal panel according to the gate driving control signal receiving;
Source electrode drive circuit, for providing the gray scale voltage signal corresponding with described data-signal according to the data drive control signal and the data-signal that receive to described liquid crystal panel;
Selector circuit, for exporting to described gate driver circuit according to a wherein road of selecting control signal to control the two-way gate driving control signal receiving, and described source electrode drive circuit is exported on a wherein road of controlling in the two paths of data drive control signal receiving;
Time schedule controller, for receiving the data-signal of signal source and to described source electrode drive circuit outputting data signals, simultaneously to described selector circuit output two-way gate driving control signal, and exporting two paths of data drive control signal to described selector circuit; Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
2. three-dimensional liquid crystal display device according to claim 1, it is characterized in that, time schedule controller is to described selector circuit output first grid drive control signal, the first data drive control signal, second grid drive control signal and the second data drive control signal;
Described first grid drive control signal and the first data drive control signal are used for controlling described liquid crystal panel interval and show described left-eye image and eye image;
Described second grid drive control signal and the second data drive control signal insert show eye image after showing left-eye image before described for eliminating the image of crosstalking that shows described left-eye image and eye image for controlling described liquid crystal panel.
3. three-dimensional liquid crystal display device according to claim 2, is characterized in that, described is black image or gray image for eliminating the image of crosstalking of the described left-eye image of demonstration and eye image.
4. three-dimensional liquid crystal display device according to claim 3, is characterized in that,
Described first grid drive control signal comprises: the first initial pulse signal, the first clock signal and the first output enable signal; The first data drive control signal comprises: the latch signal of the first data;
Described second grid drive control signal comprises: the second initial pulse signal, second clock signal and the second output enable signal; The second data drive control signal comprises: the latch signal of the second data.
5. three-dimensional liquid crystal display device according to claim 4, is characterized in that, described selector circuit comprises:
First selector electronic circuit, for controlling described the first clock signal of receiving and one of them output of second clock signal according to described selection control signal;
Second selector electronic circuit, for controlling the first output enable signal of receiving and one of them output of the second output enable signal according to described selection control signal;
Third selector electronic circuit, for controlling the first latch signal of receiving and one of them output of the second latch signal according to described selection control signal;
OR circuit, for selecting to export the first initial pulse signal and the second initial pulse signal.
6. three-dimensional liquid crystal display device according to claim 5, is characterized in that, described first selector electronic circuit, second selector electronic circuit and third selector electronic circuit are respectively single-pole double-throw switch (SPDT).
7. according to the three-dimensional liquid crystal display device described in the arbitrary claim of claim 1-6, it is characterized in that, described selection control signal is low and high level control signal, or pulse width modulating signal.
8. a control method for three-dimensional liquid crystal display device, is characterized in that, comprising:
Selector circuit is according to a wherein road of selecting control signal output from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller;
Gate driver circuit receives the gate driving control signal from described selection control, according to the current gate driving control signal receiving, the corresponding line grid line on liquid crystal panel is scanned;
Source electrode drive circuit receives from the data drive control signal of described selection control with from the data-signal of described time schedule controller, according to the current data drive control signal receiving and data-signal to liquid crystal panel output gray scale voltage signal;
Wherein, described data-signal is left-eye image signal, eye image signal or for eliminating the image of crosstalking that shows described left-eye image and eye image.
9. control method according to claim 8, is characterized in that, before described selector circuit is exported described gate driving control signal and data drive control signal, also comprises:
Time schedule controller to selector circuit output for controlling first grid drive control signal and the first data drive control signal of left-eye image and eye image described in described liquid crystal panel Alternation Display; And for showing elimination, show second grid drive control signal and the second data drive control signal of the image of crosstalking of described left-eye image and eye image to selector circuit output.
10. control method according to claim 9, is characterized in that, the described image of crosstalking of eliminating the described left-eye image of demonstration and eye image for showing is black image or gray image.
11. control methods according to claim 10, is characterized in that, described first grid drive control signal comprises: the first initial pulse signal, the first clock signal and the first output enable signal; The first data drive control signal comprises: the latch signal of the first data;
Described second grid drive control signal comprises: the second initial pulse signal, second clock signal and the second output enable signal; The second data drive control signal comprises: the latch signal of the second data;
Described selector circuit is according to a wherein road of selecting control signal output from the two-way gate driving control signal of time schedule controller, and output is from a wherein road of the two paths of data drive control signal of time schedule controller, is specially:
When the state of described the first pulse signal state in rising edge and the second pulse signal is during in negative edge, described selector circuit is exported described the first pulse signal; Simultaneously described selection control signal is controlled the latch signal that selector circuit is exported described the first clock signal, the first output enable signal and the first data;
When the state of described the second pulse signal state in rising edge and the first pulse signal is during in negative edge, described selector circuit is exported described the second pulse signal; Simultaneously described selection control signal is controlled the latch signal that selector circuit is exported described second clock signal, the second output enable signal and the second data.
12. control methods according to claim 11, is characterized in that, described selection control signal is controlled the latch signal that selector circuit is exported described the first clock signal, the first output enable signal and the first data, is specially:
The first output enable signal that described selection control signal controls the first clock signal that selector circuit output controls for line scanning, output to liquid crystal panel passage for controlling gate driving control signal is opened, and for representing the latch signal of ready the first data of data in the working storage of source electrode drive circuit;
Described selection control signal is controlled the latch signal that selector circuit is exported described second clock signal, the second output enable signal and the second data, is specially:
Described selection control signal is controlled selector circuit and is exported the second clock signal of controlling for line scanning, the second output enable signal that outputs to the pathway closure of liquid crystal panel for controlling gate driving control signal, and for representing that the working storage of source electrode drive circuit is ready to export gray scale voltage.
13. control methods according to claim 11, is characterized in that, the clock period of the second pulse signal is less than the clock period of the first pulse signal, and are greater than liquid crystal molecule in liquid crystal panel and by deflection state, are reverted to the time of original state experience.
14. control methods according to claim 11, is characterized in that, described selection control signal is low and high level control signal, or pulse width modulating signal.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103871386A (en) * | 2014-03-25 | 2014-06-18 | 昆山龙腾光电有限公司 | Scanning control circuit and display device with same |
| CN104123907A (en) * | 2014-06-05 | 2014-10-29 | 友达光电股份有限公司 | Display device and method for switching display modes |
| CN107610638A (en) * | 2016-07-11 | 2018-01-19 | 茂达电子股份有限公司 | Light emitting diode display device |
| US20210304667A1 (en) * | 2020-03-26 | 2021-09-30 | Macroblock, Inc. | Scan-type display apparatus and driving method thereof |
| US11568793B2 (en) | 2020-03-26 | 2023-01-31 | Macroblock, Inc. | Scan-type display apparatus, and driving device and driving method thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101895782A (en) * | 2010-08-09 | 2010-11-24 | 福建华映显示科技有限公司 | Stereoscopic display and display method thereof |
| JP2012088536A (en) * | 2010-10-20 | 2012-05-10 | Jvc Kenwood Corp | Liquid crystal display device and driving method thereof |
| CN102789769A (en) * | 2012-07-05 | 2012-11-21 | 青岛海信电器股份有限公司 | Three-dimensional (3D) liquid crystal display driving method and 3D liquid crystal display system |
| CN102789774A (en) * | 2012-08-15 | 2012-11-21 | 贵阳海信电子有限公司 | Method and device for optimizing 3D (three dimensional) display effect of LCD (liquid crystal display) screen and LCD television |
| CN103151005A (en) * | 2013-01-31 | 2013-06-12 | 南京中电熊猫液晶显示科技有限公司 | Driving method of liquid crystal display |
| CN103297791A (en) * | 2012-03-02 | 2013-09-11 | 精工爱普生株式会社 | Video display apparatus and video display method |
-
2013
- 2013-11-29 CN CN201310628427.1A patent/CN103617785B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101895782A (en) * | 2010-08-09 | 2010-11-24 | 福建华映显示科技有限公司 | Stereoscopic display and display method thereof |
| JP2012088536A (en) * | 2010-10-20 | 2012-05-10 | Jvc Kenwood Corp | Liquid crystal display device and driving method thereof |
| CN103297791A (en) * | 2012-03-02 | 2013-09-11 | 精工爱普生株式会社 | Video display apparatus and video display method |
| CN102789769A (en) * | 2012-07-05 | 2012-11-21 | 青岛海信电器股份有限公司 | Three-dimensional (3D) liquid crystal display driving method and 3D liquid crystal display system |
| CN102789774A (en) * | 2012-08-15 | 2012-11-21 | 贵阳海信电子有限公司 | Method and device for optimizing 3D (three dimensional) display effect of LCD (liquid crystal display) screen and LCD television |
| CN103151005A (en) * | 2013-01-31 | 2013-06-12 | 南京中电熊猫液晶显示科技有限公司 | Driving method of liquid crystal display |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103871386A (en) * | 2014-03-25 | 2014-06-18 | 昆山龙腾光电有限公司 | Scanning control circuit and display device with same |
| CN103871386B (en) * | 2014-03-25 | 2015-11-25 | 昆山龙腾光电有限公司 | A kind of scan control circuit and use its display device |
| CN104123907A (en) * | 2014-06-05 | 2014-10-29 | 友达光电股份有限公司 | Display device and method for switching display modes |
| TWI514349B (en) * | 2014-06-05 | 2015-12-21 | Au Optronics Corp | Display device and method of switching display mode |
| CN104123907B (en) * | 2014-06-05 | 2016-09-07 | 友达光电股份有限公司 | Display device and method for switching display modes |
| CN107610638A (en) * | 2016-07-11 | 2018-01-19 | 茂达电子股份有限公司 | Light emitting diode display device |
| CN107610638B (en) * | 2016-07-11 | 2019-07-02 | 茂达电子股份有限公司 | Light emitting diode display device |
| US20210304667A1 (en) * | 2020-03-26 | 2021-09-30 | Macroblock, Inc. | Scan-type display apparatus and driving method thereof |
| US11568793B2 (en) | 2020-03-26 | 2023-01-31 | Macroblock, Inc. | Scan-type display apparatus, and driving device and driving method thereof |
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| Publication number | Publication date |
|---|---|
| CN103617785B (en) | 2016-08-03 |
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Address after: 266100 Zhuzhou Road, Laoshan District, Shandong, No. 151, No. Patentee after: Hisense Video Technology Co.,Ltd. Address before: 266100 Zhuzhou Road, Laoshan District, Shandong, No. 151, No. Patentee before: HISENSE ELECTRIC Co.,Ltd. |