CN103605028B - A kind of PWM test macro based on monocycle multi-point sampling - Google Patents

A kind of PWM test macro based on monocycle multi-point sampling Download PDF

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CN103605028B
CN103605028B CN201310611927.4A CN201310611927A CN103605028B CN 103605028 B CN103605028 B CN 103605028B CN 201310611927 A CN201310611927 A CN 201310611927A CN 103605028 B CN103605028 B CN 103605028B
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CN103605028A (en
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赵波
张佃青
詹雄
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State Grid Corp of China SGCC
China EPRI Science and Technology Co Ltd
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China EPRI Science and Technology Co Ltd
State Grid Smart Grid Research Institute of SGCC
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Abstract

本发明提供一种基于单周期多点采样的PWM测试系统,所述系统包括PWM变流器阀控板模块、通信管理板模块和录波装置;所述PWM变流器阀控板模块通过通信管理板模块与录波装置通信。本发明提供一种基于单周期多点采样的PWM测试系统,在单个采样周期内对PWM波形多点采样,把对PWM信号的实际采样频率提高了数倍;可以灵活配置,可以根据需求,设置成单周期16点、32点、48点等采样,以进一步提高采样频率,使测试录波波形更加精确,并可用于静止同步无功发生器SVG、静止同步无功补偿装置STATCOM、统一潮流控制器UPFC、高压直流输电装置的阀控装置中。

The present invention provides a PWM test system based on single-cycle multi-point sampling. The system includes a PWM converter valve control board module, a communication management board module and a wave recording device; the PWM converter valve control board module communicates The management board module communicates with the wave recording device. The present invention provides a PWM test system based on single-cycle multi-point sampling, which samples PWM waveforms at multiple points within a single sampling cycle, increasing the actual sampling frequency of PWM signals several times; it can be flexibly configured, and can be set according to requirements. Sampling at 16 points, 32 points, and 48 points in a single cycle to further increase the sampling frequency and make the test recording waveform more accurate, and can be used for static synchronous var generator SVG, static synchronous var compensation device STATCOM, and unified power flow control In the valve control device of UPFC and HVDC transmission device.

Description

一种基于单周期多点采样的PWM测试系统A PWM test system based on single-period multi-point sampling

技术领域technical field

本发明涉及一种测试系统,具体讲涉及一种基于单周期多点采样的PWM测试系统。The invention relates to a test system, in particular to a PWM test system based on single-period multi-point sampling.

背景技术Background technique

目前,电力电子PWM变流器广泛应用在电力系统电能质量控制领域,如有源电力滤波器APF、SVG、STATCOM等。变流器相应控制器的整体结构一般采用的是控保(负责调节控制保护)、阀控(功率模块触发检测)、单元控制器(功率模块接口)的组成形式。At present, power electronic PWM converters are widely used in the field of power system power quality control, such as active power filters APF, SVG, STATCOM, etc. The overall structure of the corresponding controller of the converter generally adopts the composition form of control protection (responsible for regulating control and protection), valve control (power module trigger detection), and unit controller (power module interface).

为了实时监测变流器装置的工作状态,装置的上位机一般有遥测、遥信、录波等功能。其中录波功能可以在装置稳态或装置故障暂态时,把启动录波时刻前一段时间以及之后一段时间的装置模拟量、开关信号等存到上位机中。变流器的信号采样频率一般选择每工频周期128点(采样频率6.4kHz,采样周期156us)或256点((采样频率12.8kHz,采样周期78us)。In order to monitor the working status of the converter device in real time, the upper computer of the device generally has functions such as telemetry, remote signaling, and wave recording. Among them, the wave recording function can store the analog quantity and switch signal of the device in the host computer for a period of time before and after the start of wave recording when the device is in a steady state or in a transient state of device failure. The signal sampling frequency of the converter generally chooses 128 points (sampling frequency 6.4kHz, sampling period 156us) or 256 points ((sampling frequency 12.8kHz, sampling period 78us) per power frequency cycle.

针对电流电压等模拟量,由于是工频变化,采样周期为156us或者78us时可以得到较为完整的录波波形。但对于PWM变流器中PWM波形输出的测试,由于其开关频率范围在几百Hz到几KHz,最小脉宽为数十us,若采样周期为156us或者78us,无法得到精确的PWM录波波形。For analog quantities such as current and voltage, due to the change of power frequency, a relatively complete recording waveform can be obtained when the sampling period is 156us or 78us. However, for the test of the PWM waveform output in the PWM converter, since the switching frequency ranges from several hundred Hz to several KHz, and the minimum pulse width is tens of us, if the sampling period is 156us or 78us, it is impossible to obtain an accurate PWM recording waveform .

目前PWM变流器上位机以及专用的电力系统故障录波装置中,都只有针对模拟量、开入开出量的录波通道,没有专门针对PWM波形的录波功能。电力系统RTDS(Real-TimeDigitalSimulator,实时数字仿真系统)装置用户可以利用RTDS对单元控制器PWM输出进行小步长采样得到PWM录波信号,但RTDS装置价格昂贵,使用较为复杂。At present, in the upper computer of PWM converter and the dedicated power system fault recording device, there are only recording channels for analog quantities, binary input and output quantities, and there is no special recording function for PWM waveforms. Power system RTDS (Real-Time Digital Simulator, real-time digital simulation system) device users can use RTDS to sample the PWM output of the unit controller in small steps to obtain PWM wave recording signals, but RTDS devices are expensive and complicated to use.

发明内容Contents of the invention

为了克服上述现有技术的不足,本发明提供一种基于单周期多点采样的PWM测试系统,用于静止同步无功发生器SVG、静止同步无功补偿装置STATCOM、统一潮流控制器UPFC、高压直流输电装置的阀控装置中。In order to overcome the deficiencies of the above-mentioned prior art, the present invention provides a PWM test system based on single-cycle multi-point sampling, which is used for static synchronous var generator SVG, STATCOM STATCOM, unified power flow controller UPFC, high voltage In the valve control device of the direct current transmission device.

为了实现上述发明目的,本发明采取如下技术方案:In order to realize the above-mentioned purpose of the invention, the present invention takes the following technical solutions:

本发明提供一种基于单周期多点采样的PWM测试系统,所述系统包括PWM变流器阀控板模块、通信管理板模块和录波装置;所述PWM变流器阀控板模块通过通信管理板模块与录波装置通信。The present invention provides a PWM test system based on single-cycle multi-point sampling. The system includes a PWM converter valve control board module, a communication management board module and a wave recording device; the PWM converter valve control board module communicates The management board module communicates with the wave recording device.

所述PWM变流器阀控板模块包括FPGA模块和DSP模块;所述FPGA模块根据正弦脉宽调制方法,实时比较调制波和载波大小,生成PWM波形,与所述DSP模块通信。The PWM converter valve control board module includes an FPGA module and a DSP module; the FPGA module compares the modulation wave and the carrier wave in real time according to the sinusoidal pulse width modulation method, generates a PWM waveform, and communicates with the DSP module.

所述FPGA模块在单个采样周期内,利用高频时钟,等时间间隔的多点采样PWM高低信号,把PWM高低变化以1和0的形式存到同一录波信号量中;FPGA模块把录波信号量发送给DSP模块,并在采样同步信号有效时,产生中断信号给DSP模块。In a single sampling period, the FPGA module uses a high-frequency clock to sample PWM high and low signals at equal time intervals, and stores the PWM high and low changes in the form of 1 and 0 in the same wave recording signal quantity; the FPGA module records the wave recording The semaphore is sent to the DSP module, and when the sampling synchronization signal is valid, an interrupt signal is generated to the DSP module.

单个采样周期内设置N个采样点进行采样,N取16、32或48。Set N sampling points for sampling in a single sampling period, and N is 16, 32 or 48.

所述DSP模块对接收的中断信号进行中断处理,控制地址总线及数据总线及相关读写使能信号,DSP模块同时接收录波信号量,并启动背板通信,控制背板通信时序,经背板总线把录波信号量发送给通信管理板模块。The DSP module interrupts the received interrupt signal, controls the address bus and data bus and related read and write enable signals, the DSP module simultaneously receives the wave recording semaphore, and starts the backplane communication, controls the backplane communication sequence, The board bus sends the wave recording semaphore to the communication management board module.

所述通信管理板模块包括SRAM存储器和NANDFLASH存储器;所述SRAM存储器用于存储所述通信管理板模块接收的预录波信号量,所述NANDFLASH存储器用于存储启动录波后的录波信号量。The communication management board module includes a SRAM memory and a NANDFLASH memory; the SRAM memory is used to store the pre-recorded signal amount received by the communication management board module, and the NANDFLASH memory is used to store the recorded wave signal amount after starting the wave recording .

所述通信管理板模块按照录波协议把存储的录波信号量传给所述录波装置。The communication management board module transmits the stored wave recording signal quantity to the wave recording device according to the wave recording protocol.

所述录波装置在单个采样周期内,解析PWM高低信号并按照时间先后顺序,等时间间隔完成单个采样周期的录波描点。The wave recording device analyzes the PWM high and low signals in a single sampling period and completes the wave recording and tracing points of a single sampling period at equal time intervals in chronological order.

与现有技术相比,本发明的有益效果在于:Compared with prior art, the beneficial effect of the present invention is:

1)可用于静止同步无功发生器SVG、静止同步无功补偿装置STATCOM、统一潮流控制器UPFC、高压直流输电装置的阀控装置中;1) It can be used in valve control devices of static synchronous var generator SVG, static synchronous var compensation device STATCOM, unified power flow controller UPFC, and HVDC transmission device;

2)本发明在单个采样周期内对PWM波形多点采样,把对PWM信号的实际采样频率提高了数倍;2) The present invention samples the PWM waveform at multiple points within a single sampling period, increasing the actual sampling frequency of the PWM signal several times;

3)实现PWM测试成本较低,简单可靠,无需复杂且价格昂贵的RTDS装置;3) The cost of PWM testing is low, simple and reliable, without complex and expensive RTDS devices;

4)可以灵活配置,可以根据需求,设置成单周期16点、32点、48点等采样,以进一步提高采样频率,使测试录波波形更加精确。4) It can be flexibly configured, and can be set to single-cycle 16-point, 32-point, 48-point sampling according to requirements, so as to further increase the sampling frequency and make the test recording waveform more accurate.

附图说明Description of drawings

图1是基于单周期多点采样的PWM测试系统结构框图;Figure 1 is a block diagram of a PWM test system based on single-cycle multi-point sampling;

图2是单周期多点采样的PWM测试过程图。Fig. 2 is a PWM test process diagram of single-cycle multi-point sampling.

具体实施方式detailed description

下面结合附图对本发明作进一步详细说明。The present invention will be described in further detail below in conjunction with the accompanying drawings.

本发明提供一种基于单周期多点采样的PWM测试系统,所述系统包括PWM变流器阀控板模块、通信管理板模块和录波装置;所述PWM变流器阀控板模块通过通信管理板模块与录波装置通信。The present invention provides a PWM test system based on single-cycle multi-point sampling. The system includes a PWM converter valve control board module, a communication management board module and a wave recording device; the PWM converter valve control board module communicates The management board module communicates with the wave recording device.

所述PWM变流器阀控板模块包括FPGA模块和DSP模块;所述FPGA模块根据正弦脉宽调制方法,实时比较调制波和载波大小,生成PWM波形,与所述DSP模块通信。The PWM converter valve control board module includes an FPGA module and a DSP module; the FPGA module compares the modulation wave and the carrier wave in real time according to the sinusoidal pulse width modulation method, generates a PWM waveform, and communicates with the DSP module.

所述FPGA模块在单个采样周期内,利用高频时钟,等时间间隔的多点采样PWM高低信号,把PWM高低变化以1和0的形式存到同一录波信号量中;FPGA模块把录波信号量发送给DSP模块,并在采样同步信号有效时,产生中断信号给DSP模块。In a single sampling period, the FPGA module uses a high-frequency clock to sample PWM high and low signals at equal time intervals, and stores the PWM high and low changes in the form of 1 and 0 in the same wave recording signal quantity; the FPGA module records the wave recording The semaphore is sent to the DSP module, and when the sampling synchronization signal is valid, an interrupt signal is generated to the DSP module.

单个采样周期内设置N个采样点进行采样,N取16、32或48。Set N sampling points for sampling in a single sampling period, and N is 16, 32 or 48.

所述DSP模块对接收的中断信号进行中断处理,控制地址总线及数据总线及相关读写使能信号,DSP模块同时接收录波信号量,并启动背板通信,控制背板通信时序,经背板总线把录波信号量发送给通信管理板模块。The DSP module interrupts the received interrupt signal, controls the address bus and data bus and related read and write enable signals, the DSP module simultaneously receives the wave recording semaphore, and starts the backplane communication, controls the backplane communication sequence, The board bus sends the wave recording semaphore to the communication management board module.

所述通信管理板模块包括SRAM存储器和NANDFLASH存储器;所述SRAM存储器用于存储所述通信管理板模块接收的预录波信号量,所述NANDFLASH存储器用于存储启动录波后的录波信号量。The communication management board module includes a SRAM memory and a NANDFLASH memory; the SRAM memory is used to store the pre-recorded signal amount received by the communication management board module, and the NANDFLASH memory is used to store the recorded wave signal amount after starting the wave recording .

所述通信管理板模块按照录波协议把存储的录波信号量传给所述录波装置。The communication management board module transmits the stored wave recording signal quantity to the wave recording device according to the wave recording protocol.

所述录波装置在单个采样周期内,解析PWM高低信号并按照时间先后顺序,等时间间隔完成单个采样周期的录波描点。The wave recording device analyzes the PWM high and low signals in a single sampling period and completes the wave recording and tracing points of a single sampling period at equal time intervals in chronological order.

实施例Example

下面以采样周期156us、每周期16个点进行PWM采样为例,对本发明的实施例作详细说明。Taking PWM sampling with a sampling period of 156us and 16 points per period as an example, the embodiments of the present invention will be described in detail below.

如图1,本发明提供一种基于单周期多点采样的PWM测试系统,包括PWM变流器阀控板模块、通信管理板模块和录波装置;所述PWM变流器阀控板模块通过通信管理板模块与录波装置通信。As shown in Figure 1, the present invention provides a PWM test system based on single-cycle multi-point sampling, including a PWM converter valve control board module, a communication management board module and a wave recording device; the PWM converter valve control board module passes The communication management board module communicates with the wave recording device.

所述PWM变流器阀控板模块包括FPGA模块和DSP模块;所述FPGA模块根据正弦脉宽调制方法,实时比较调制波和载波大小,生成PWM波形,与所述DSP模块通信。The PWM converter valve control board module includes an FPGA module and a DSP module; the FPGA module compares the modulation wave and the carrier wave in real time according to the sinusoidal pulse width modulation method, generates a PWM waveform, and communicates with the DSP module.

所述FPGA模块采用XC3S5000芯片;所述DSP模块采用TMS320F28335芯片。The FPGA module adopts XC3S5000 chip; the DSP module adopts TMS320F28335 chip.

假设FPGA模块和DSP模块双口RAM通信时间间隔为156us,双口RAM中断信号由FPGA模块产生,周期也为156us。FPGA模块内部采用20MHz时钟采样和计数,PWM脉宽为32us,针对以上情况,如图2所示,测试系统按照以下过程实现单周期多点采样PWM测试:Assume that the communication time interval between the FPGA module and the DSP module dual-port RAM is 156us, and the interrupt signal of the dual-port RAM is generated by the FPGA module, and the period is also 156us. The FPGA module uses a 20MHz clock for sampling and counting, and the PWM pulse width is 32us. For the above situation, as shown in Figure 2, the test system implements the single-cycle multi-point sampling PWM test according to the following process:

1)采样同步信号采用双口RAM中断信号,20MHz时钟检测到该信号拉高后,FPGA模块开始采样PWM输出;1) The sampling synchronization signal uses the dual-port RAM interrupt signal. After the 20MHz clock detects that the signal is pulled high, the FPGA module starts to sample the PWM output;

2)20MHz时钟每计9.75us进行一次PWM输出采样,并依次把采样值从低位到高位存入一个16位的PWM采样信号量,即:0us采样值存入信号量bit0,9.75us采样值存入bit1,9.75*2us采样值存入bit2,类推,9.75*nus采样值存入bit(n),采样时间到9.75*15=146.25us时,把PWM输出采样值存入信号量bit15;2) The 20MHz clock performs a PWM output sampling every 9.75us, and sequentially stores the sampling value from low to high into a 16-bit PWM sampling semaphore, that is: 0us sampling value is stored in semaphore bit0, and 9.75us sampling value is stored in Enter bit1, 9.75*2us sampling value is stored in bit2, and analogously, 9.75*nus sampling value is stored in bit(n), when the sampling time reaches 9.75*15=146.25us, the PWM output sampling value is stored in semaphore bit15;

3)下一采样同步信号有效时,FPGA模块把上一周期的PWM信号量发送给DSP模块,通信管理板模块通过背板McBSP总线接收到阀控板发送的PWM信号量并发送给录波装置录波;3) When the next sampling synchronization signal is valid, the FPGA module sends the PWM semaphore of the previous cycle to the DSP module, and the communication management board module receives the PWM semaphore sent by the valve control board through the backplane McBSP bus and sends it to the wave recording device recording wave;

4)录波装置得到录波PWM信号量录波数据后,在156us内,按照从低位到高位的顺序,等时间间隔(9.75us)依次取相应bit位的值进行0或1描点。4) After the wave recording device obtains the wave recording data of the wave recording PWM signal, within 156us, in the order from low to high, at equal time intervals (9.75us), the value of the corresponding bit is sequentially taken to draw 0 or 1 point.

至此,实现了单周期(156us)多点(16点)采样PWM的测试,通过在录波装置中查看录波波形,相关人员可以判断FPGA输出的PWM是否正常。So far, the single-period (156us) multi-point (16 points) sampling PWM test has been realized. By viewing the recorded waveform in the wave recording device, relevant personnel can judge whether the PWM output by the FPGA is normal.

由于采样同步信号与PWM高低变化时刻客观存在时间差并且离散采样,最终得到的采样值高低持续宽度与PWM实际宽度会有误差,单周期16点采样误差范围:±7.95us。本例由于离散采样,误差为4*7.95us-32us=﹢7us,即采样得到的PWM宽度为39us。可以通过提高单周期采样的点数(如32点、48点等)来进一步减小该误差。Due to the fact that there is an objective time difference between the sampling synchronous signal and PWM high and low changes and discrete sampling, there will be errors between the high and low continuous width of the final sampling value and the actual width of the PWM, and the single-cycle 16-point sampling error range: ±7.95us. In this example, due to discrete sampling, the error is 4*7.95us-32us=﹢7us, that is, the PWM width obtained by sampling is 39us. The error can be further reduced by increasing the number of sampling points in a single cycle (such as 32 points, 48 points, etc.).

最后应当说明的是:以上实施例仅用以说明本发明的技术方案而非对其限制,尽管参照上述实施例对本发明进行了详细的说明,所属领域的普通技术人员应当理解:依然可以对本发明的具体实施方式进行修改或者等同替换,而未脱离本发明精神和范围的任何修改或者等同替换,其均应涵盖在本发明的权利要求范围当中。Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: the present invention can still be Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention shall be covered by the scope of the claims of the present invention.

Claims (6)

1. the PWM test macro based on monocycle multi-point sampling, is characterized in that: described system comprises PWM unsteady flowDevice valve control plate module, telecommunication management plate module and wave recording device; Described PWM current transformer valve control plate module is by telecommunication management plateModule is communicated by letter with wave recording device;
Described PWM current transformer valve control plate module comprises FPGA module and DSP module; Described FPGA module is according to positive taut pulseWide modulator approach, compares modulating wave and carrier wave size in real time, generates PWM waveform, with described DSP module communication;
Described FPGA module, within the single sampling period, is utilized high frequency clock, the multi-point sampling PWM height of constant durationSignal, changes PWM height to deposit in same record ripple semaphore with 1 and 0 form; FPGA module is record ripple semaphoreSend to DSP module, and in the time that sample-synchronous signal is effective, produce interrupt signal to DSP module.
2. the PWM test macro based on monocycle multi-point sampling according to claim 1, is characterized in that: single adoptingN sampled point was set in the sample cycle and samples, N gets 16,32 or 48.
3. the PWM test macro based on monocycle multi-point sampling according to claim 1, is characterized in that: described inDSP module interrupts processing to the interrupt signal receiving, and controls address bus and data/address bus and relevant read-write enable signal,DSP module receives simultaneously records ripple semaphore, and starts backboard communication, controls backboard communication sequential, through core bus, record ripple is believedNumber amount sends to telecommunication management plate module.
4. according to the PWM test macro based on monocycle multi-point sampling described in claim 1 or 3, it is characterized in that: instituteState telecommunication management plate module and comprise SRAM memory and NANDFLASH memory; Described SRAM memory is for storageThe ripple semaphore of pre-recording that described telecommunication management plate module receives, described NANDFLASH memory is used for storing starting to be recorded after rippleRecord ripple semaphore.
5. the PWM test macro based on monocycle multi-point sampling according to claim 1, is characterized in that: described logicalFuse tube reason plate module is passed to described wave recording device according to record ripple agreement the record ripple semaphore of storage.
6. the PWM test macro based on monocycle multi-point sampling according to claim 5, is characterized in that: described recordWave apparatus, within the single sampling period, is resolved PWM high-low signal according to time order and function order, and constant duration completes singleThe record ripple described point in sampling period.
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