CN103605028A - PWM testing system based on single period multipoint sampling - Google Patents
PWM testing system based on single period multipoint sampling Download PDFInfo
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- CN103605028A CN103605028A CN201310611927.4A CN201310611927A CN103605028A CN 103605028 A CN103605028 A CN 103605028A CN 201310611927 A CN201310611927 A CN 201310611927A CN 103605028 A CN103605028 A CN 103605028A
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Abstract
The invention provides a PWM testing system based on single period multipoint sampling. The PWM testing system comprises a PWM converter valve control plate module, a communication management plate module and a wave recording device. The PWM converter valve control plate module is communicated with the wave recording device through the communication management plate module. According to the PWM testing system based on the single period multipoint sampling, multipoint sampling is carried out on a PWM waveform in a single sampling period, and actual sampling frequency for PWM signals is increased by several times. The PWM testing system can be configured flexibly, and 16-point sampling in a single period, 32-point sampling in a single period, 48-point sampling in a single period and the like are arranged according to demands to improve the sampling frequency and to enable recording waves to be tested more precisely. The PWM testing system can be applied to a static SVG, a STATCOM, a UPFC and a valve control device of a high-voltage direct current transmission device.
Description
Technical field
The present invention relates to a kind of test macro, specifically relate to a kind of PWM test macro based on monocycle multi-point sampling.
Background technology
At present, power electronics PWM current transformer is widely used in electric power quality control field, as Active Power Filter-APF APF, SVG, STATCOM etc.What the one-piece construction of current transformer corresponding controllers generally adopted is the composition form that (be responsible for adjusting and control protection), valve control (power model detection trigger), cell controller (power model interface) are protected in control.
For the duty of Real-Time Monitoring converter device, the host computer of device generally has the functions such as remote measurement, remote signalling, record ripple.Wherein recording wave energy can be when device stable state or plant failure transient state, and starting record ripple, for the previous period and afterwards the unit simulation amount of a period of time, switching signal etc. are deposited in host computer constantly.General every power frequency period 128 points (sample frequency 6.4kHz, sampling period 156us) or 256 points ((sample frequency 12.8kHz, sampling period 78us) selected of signal sampling frequency of current transformer.
For analog quantitys such as current/voltages, owing to being that power frequency changes, when being 156us or 78us, can obtain comparatively complete record waveform in the sampling period.But for the test of PWM waveform output in PWM current transformer, because its switching frequency scope arrives several KHz at hundreds of Hz, minimum pulse width is tens of us, if the sampling period is 156us or 78us, cannot obtain accurate PWM record waveform.
In the power system fault recorder of PWM current transformer host computer and special use, all only for the record ripple passage of analog quantity, input and output amount, there is no the special record wave energy for PWM waveform at present.Electric system RTDS(Real-Time Digital Simulator, real-timedigital simulation system) device users can utilize RTDS to carry out the long sampling of small step to cell controller PWM output and obtain PWM record ripple signal, but RTDS device is expensive, use comparatively complicated.
Summary of the invention
In order to overcome above-mentioned the deficiencies in the prior art, the invention provides a kind of PWM test macro based on monocycle multi-point sampling, for the valve control device of static synchronous reacance generator SVG, static synchronous reactive compensator STATCOM, THE UPFC UPFC, high-voltage dc transmission electric installation.
In order to realize foregoing invention object, the present invention takes following technical scheme:
The invention provides a kind of PWM test macro based on monocycle multi-point sampling, described system comprises PWM current transformer valve control plate module, telecommunication management plate module and wave recording device; Described PWM current transformer valve control plate module is communicated by letter with wave recording device by telecommunication management plate module.
Described PWM current transformer valve control plate module comprises FPGA module and DSP module; Described FPGA module is according to sinusoidal pulse width modulation method, and relatively modulating wave and carrier wave are big or small in real time, generates PWM waveform, with described DSP module communication.
Described FPGA module, within the single sampling period, is utilized high frequency clock, and the multi-point sampling PWM high-low signal of constant duration just changes PWM with 1 and 0 form and deposits in same record ripple semaphore; FPGA module sends to DSP module record ripple semaphore, and when sample-synchronous signal is effective, produces look-at-me to DSP module.
N sampled point was set in the single sampling period and samples, N gets 16,32 or 48.
Described DSP module interrupts processing to the look-at-me receiving, control address bus and data bus and relevant read-write enable signal, DSP module receives record ripple semaphore simultaneously, and start backboard communication, control backboard communication sequential, through core bus, record ripple semaphore is sent to telecommunication management plate module.
Described telecommunication management plate module comprises SRAM storer and NAND FLASH storer; The ripple semaphore of pre-recording that described SRAM storer receives for storing described telecommunication management plate module, described NAND FLASH storer is for storing the record ripple semaphore starting after record ripple.
Described telecommunication management plate module is passed to described wave recording device according to record ripple agreement the record ripple semaphore of storage.
Described wave recording device, within the single sampling period, is resolved PWM high-low signal and according to time order and function order, constant duration completes the record ripple described point in single sampling period.
Compared with prior art, beneficial effect of the present invention is:
1) can be used in the valve control device of static synchronous reacance generator SVG, static synchronous reactive compensator STATCOM, THE UPFC UPFC, high-voltage dc transmission electric installation;
2) the present invention, to PWM waveform multi-point sampling within the single sampling period, has improved several times the actual samples frequency to pwm signal;
3) realize PWM testing cost lower, simple and reliable, without complicated and expensive RTDS device;
4) can flexible configuration, can be according to demand, be arranged to the samplings such as monocycles 16 point, 32 points, at 48, further to improve sample frequency, make test record waveform more accurate.
Accompanying drawing explanation
Fig. 1 is the PWM test system structure block diagram based on monocycle multi-point sampling;
Fig. 2 is the PWM test process figure of monocycle multi-point sampling.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
The invention provides a kind of PWM test macro based on monocycle multi-point sampling, described system comprises PWM current transformer valve control plate module, telecommunication management plate module and wave recording device; Described PWM current transformer valve control plate module is communicated by letter with wave recording device by telecommunication management plate module.
Described PWM current transformer valve control plate module comprises FPGA module and DSP module; Described FPGA module is according to sinusoidal pulse width modulation method, and relatively modulating wave and carrier wave are big or small in real time, generates PWM waveform, with described DSP module communication.
Described FPGA module, within the single sampling period, is utilized high frequency clock, and the multi-point sampling PWM high-low signal of constant duration just changes PWM with 1 and 0 form and deposits in same record ripple semaphore; FPGA module sends to DSP module record ripple semaphore, and when sample-synchronous signal is effective, produces look-at-me to DSP module.
N sampled point was set in the single sampling period and samples, N gets 16,32 or 48.
Described DSP module interrupts processing to the look-at-me receiving, control address bus and data bus and relevant read-write enable signal, DSP module receives record ripple semaphore simultaneously, and start backboard communication, control backboard communication sequential, through core bus, record ripple semaphore is sent to telecommunication management plate module.
Described telecommunication management plate module comprises SRAM storer and NAND FLASH storer; The ripple semaphore of pre-recording that described SRAM storer receives for storing described telecommunication management plate module, described NAND FLASH storer is for storing the record ripple semaphore starting after record ripple.
Described telecommunication management plate module is passed to described wave recording device according to record ripple agreement the record ripple semaphore of storage.
Described wave recording device, within the single sampling period, is resolved PWM high-low signal and according to time order and function order, constant duration completes the record ripple described point in single sampling period.
Embodiment
With sampling period 156us, 16 points of each cycle, carry out PWM and be sampled as example below, embodiments of the invention are elaborated.
As Fig. 1, the invention provides a kind of PWM test macro based on monocycle multi-point sampling, comprise PWM current transformer valve control plate module, telecommunication management plate module and wave recording device; Described PWM current transformer valve control plate module is communicated by letter with wave recording device by telecommunication management plate module.
Described PWM current transformer valve control plate module comprises FPGA module and DSP module; Described FPGA module is according to sinusoidal pulse width modulation method, and relatively modulating wave and carrier wave are big or small in real time, generates PWM waveform, with described DSP module communication.
Described FPGA module adopts XC3S5000 chip; Described DSP module adopts TMS320F28335 chip.
Suppose that FPGA module and DSP module dual port RAM call duration time are spaced apart 156us, dual port RAM look-at-me is produced by FPGA module, and the cycle is also 156us.FPGA inside modules adopts 20MHz clock sampling and counting, and PWM pulsewidth is 32us, and for above situation, as shown in Figure 2, test macro is tested according to following process implementation monocycle multi-point sampling PWM:
1) sample-synchronous signal adopts dual port RAM look-at-me, and after 20MHz clock detection is drawn high to this signal, the FPGA module PWM that starts to sample exports;
2) the every meter of 20MHz clock 9.75us carries out a PWM output sampling, and successively sampled value is deposited from low level to a high position in to the PWM sampled signal amount of 16, that is: 0us sampled value deposits semaphore bit0 in, 9.75us sampled value deposits bit1 in, 9.75*2us sampled value deposits bit2 in, analogizes, and 9.75*n us sampled value deposits bit (n) in, sampling time, while arriving 9.75*15=146.25us, deposits semaphore bit15 in PWM output sampled value;
3) when next sample-synchronous signal is effective, FPGA module sent to DSP module the pwm signal amount in a upper cycle, and telecommunication management plate module is received the pwm signal amount of valve control plate transmission and sent to wave recording device record ripple by backboard McBSP bus;
4) wave recording device obtains recording after ripple pwm signal amount recorder data, and in 156us, according to from low level to high-order order, constant duration (9.75us) is got successively the value of corresponding bit position and carried out 0 or 1 described point.
So far, realized the test of monocycle (156us) multiple spot (16 point) sampling PWM, by check record waveform in wave recording device, related personnel can judge that whether the PWM of FPGA output is normal.
Because sample-synchronous signal and PWM just change outwardness mistiming and discrete sampling constantly, the sampled value finally obtaining just continues width and PWM developed width and has error, monocycles 16 point sampling error range: ± 7.95us.This example is due to discrete sampling, and error is 4*7.95us-32us=﹢ 7us, and the PWM width that sampling obtains is 39us.Can further reduce this error by improving the counting of monocycle sampling (as 32 points, etc.) at 48.
Finally should be noted that: above embodiment is only in order to illustrate that technical scheme of the present invention is not intended to limit, although the present invention is had been described in detail with reference to above-described embodiment, those of ordinary skill in the field are to be understood that: still can modify or be equal to replacement the specific embodiment of the present invention, and do not depart from any modification of spirit and scope of the invention or be equal to replacement, it all should be encompassed in the middle of claim scope of the present invention.
Claims (8)
1. the PWM test macro based on monocycle multi-point sampling, is characterized in that: described system comprises PWM current transformer valve control plate module, telecommunication management plate module and wave recording device; Described PWM current transformer valve control plate module is communicated by letter with wave recording device by telecommunication management plate module.
2. the PWM test macro based on monocycle multi-point sampling according to claim 1, is characterized in that: described PWM current transformer valve control plate module comprises FPGA module and DSP module; Described FPGA module is according to sinusoidal pulse width modulation method, and relatively modulating wave and carrier wave are big or small in real time, generates PWM waveform, with described DSP module communication.
3. the PWM test macro based on monocycle multi-point sampling according to claim 2, it is characterized in that: described FPGA module is within the single sampling period, utilize high frequency clock, the multi-point sampling PWM high-low signal of constant duration, just changes PWM with 1 and 0 form and deposits in same record ripple semaphore; FPGA module sends to DSP module record ripple semaphore, and when sample-synchronous signal is effective, produces look-at-me to DSP module.
4. the PWM test macro based on monocycle multi-point sampling according to claim 3, is characterized in that: N sampled point was set in the single sampling period and samples, N gets 16,32 or 48.
5. the PWM test macro based on monocycle multi-point sampling according to claim 3, it is characterized in that: described DSP module interrupts processing to the look-at-me receiving, control address bus and data bus and relevant read-write enable signal, DSP module receives record ripple semaphore simultaneously, and start backboard communication, control backboard communication sequential, through core bus, record ripple semaphore is sent to telecommunication management plate module.
6. the PWM test macro based on monocycle multi-point sampling according to claim 1 or 5, is characterized in that: described telecommunication management plate module comprises SRAM storer and NAND FLASH storer; The ripple semaphore of pre-recording that described SRAM storer receives for storing described telecommunication management plate module, described NAND FLASH storer is for storing the record ripple semaphore starting after record ripple.
7. the PWM test macro based on monocycle multi-point sampling according to claim 1, is characterized in that: described telecommunication management plate module is passed to described wave recording device according to record ripple agreement the record ripple semaphore of storage.
8. the PWM test macro based on monocycle multi-point sampling according to claim 7, it is characterized in that: described wave recording device is within the single sampling period, resolve PWM high-low signal and according to time order and function order, constant duration completes the record ripple described point in single sampling period.
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Cited By (5)
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| CN104950693A (en) * | 2015-06-23 | 2015-09-30 | 广州供电局有限公司 | Method and system for improving simulation accuracy of controller HIL (hardware-in-the-loop) simulation system |
| CN109031980A (en) * | 2018-09-27 | 2018-12-18 | 南方电网科学研究院有限责任公司 | A kind of emulation test method and system of the valve control device based on FPGA |
| CN109031981A (en) * | 2018-09-27 | 2018-12-18 | 南方电网科学研究院有限责任公司 | A kind of emulation test method and system of the valve control device based on FPGA |
| CN111786865A (en) * | 2020-06-09 | 2020-10-16 | 青岛信芯微电子科技股份有限公司 | Data processing method and equipment |
| CN112946355A (en) * | 2021-02-25 | 2021-06-11 | 云谷技术(珠海)有限公司 | Power distribution terminal PWM analog sampling system and method |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104950693A (en) * | 2015-06-23 | 2015-09-30 | 广州供电局有限公司 | Method and system for improving simulation accuracy of controller HIL (hardware-in-the-loop) simulation system |
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| CN111786865B (en) * | 2020-06-09 | 2021-11-12 | 青岛信芯微电子科技股份有限公司 | Data processing method and equipment |
| CN112946355A (en) * | 2021-02-25 | 2021-06-11 | 云谷技术(珠海)有限公司 | Power distribution terminal PWM analog sampling system and method |
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Effective date of registration: 20170531 Address after: 100031 Xicheng District West Chang'an Avenue, No. 86, Beijing Co-patentee after: China Electric Prime Technology Co., Ltd. Patentee after: State Grid Corporation of China Address before: 100031 Xicheng District West Chang'an Avenue, No. 86, Beijing Co-patentee before: State Grid Smart Grid Institute Patentee before: State Grid Corporation of China Co-patentee before: China Electric Prime Technology Co., Ltd. |