CN203117711U - Portable type multifunctional data recorder - Google Patents

Abstract

The utility model relates to a portable type multifunctional data recorder, which comprises a DSP (digital signal processor) collecting board, a PC104 (personal computer 104) main board, a display unit, a data storage unit, a plurality of analog collecting units, a switch unit and a power source unit, wherein the analog collecting units and the switch unit are connected with the DSP collecting board through a back board bus, the DSP collecting board is connected with the PC104 main board, the PC104 main board is respectively connected with the display unit and the data storage unit, the power source unit is used for supplying power for the recorder, the DSP collecting board comprises a plurality of A/D (analog-to-digital) chips, a DSP chip, a FPGA (field programmable gate array) chip and a dual-port RAM (random access memory), the switch unit is connected with the FPGA chip through a photoelectric coupler, the A/D chips are connected with the FPGA chip, the FPGA chip is connected with the DSP chip, and the FPGA chip is connected with the dual-port RAM. The recorder has the advantages that the calculation precision is high, the electrical structure is concise and reliable, and the number of collecting and measuring channels is large.

Description

A Portable Multifunctional Data Logger

technical field

The utility model should relate to a portable multifunctional data recorder.

Background technique

Before a new unit is put into operation or the unit is overhauled and restarted, a power plant needs to conduct a series of tests on boilers, turbines, generators, etc. to check whether the status of the unit and various parameters meet the requirements. After the generator set is put into operation, it is also necessary to monitor the state of the unit. When the unit has a problem, the waveform before and after the fault should be recorded to analyze and find the cause of the fault.

The existing fault recording device can record waveforms when the unit fails, but for the steam turbine test, because the frequency of the steam valve and the valve signal is relatively high (up to 2K), a high-speed data recorder is currently required to complete it, and the high-speed data recorder is It is a general-purpose equipment that does not have special treatment for steam turbine tests. If it cannot start automatically, it cannot calculate the closing time of the steam valve, but needs to be measured manually. Therefore, it is necessary to cooperate with a wave recorder and a high-speed data recorder during the generator start-up process. Complete the data recording function of generator start-up. Therefore, it is necessary to develop a high-speed data acquisition device which integrates wave recording function and steam turbine test function.

Utility model content

Based on the above deficiencies, the utility model should disclose a portable multifunctional data recorder, which can be used in electric power and power plant sites. When the generator starts up and runs normally, the recorder can automatically complete the data recording of the generator and steam turbine. And analysis, turbine test data recording, analysis and calculation.

The utility model adopts the following technologies: a portable multifunctional data recorder, including a DSP acquisition board, a PC104 main board, a display unit, a data storage unit, a plurality of analog quantity acquisition units, a switch quantity unit and a power supply unit, and a plurality of analog quantity acquisition units The unit and the switching value unit are connected with the DSP acquisition board through the backplane bus, the DSP acquisition board is connected with the PC104 main board, and the PC104 main board is connected with the display unit and the data storage unit respectively, and the power supply unit supplies power for the recorder. The DSP acquisition board includes Multiple A/D chips, DSP chips, FPGA chips and dual-port RAM, each A/D chip is connected to an analog quantity acquisition unit, the switch value unit is connected to the FPGA chip through a photocoupler, and multiple A/D chips are connected to The FPGA chip is connected, the FPGA chip is connected to the DSP chip, and the FPGA chip is connected to the dual-port RAM; multiple analog signals: including AC voltage, AC current, DC voltage and DC current, are processed by multiple analog acquisition units and input to the back Board bus, the switching signal is processed by the switching unit and then input to the backplane bus, and multiple analog signals and switching data arrive at the DSP acquisition board after passing through the backplane; the DSP acquisition board is responsible for completing the high The collected data is stored in the dual-port RAM on the DSP acquisition board, and the PC104 main board reads the data in the dual-port RAM through the PC104 bus interface to realize data interaction.

The utility model also has the following characteristics: the above-mentioned DSP chip is the calculation core, and the FPGA chip is the logic control core, and the FPGA chip controls 4 slices of 8-channel 16-bit synchronous sampling A/D chips, with a sampling rate of up to 100k/s The analog channel data is sampled synchronously, and the calculation of the amplitude and phase angle parameters of the analog signal is completed by the DSP chip.

The data recorder can trigger data recording through the main steam valve or valve action signal, automatically record the main steam valve and regulating valve action waveform, and analyze and calculate the action time, delay time and other parameters. The utility model has high collection frequency, can realize multi-channel synchronous 100K/S frequency sampling, and has high calculation precision, which can reach 0.2%. The electrical structure is simple and reliable, and the number of acquisition and measurement channels is large. Calculation and analysis are completed automatically, saving manpower and improving efficiency.

Description of drawings

Figure 1 is a schematic block diagram of the data recorder;

Fig. 2 is the schematic diagram of the AC voltage acquisition channel circuit;

Fig. 3 is the schematic diagram of the switch channel circuit;

Figure 4 is a block diagram of the DSP data acquisition unit.

Detailed ways

For example below, the utility model is further explained:

Example 1

This embodiment technically adopts the following technical solutions:

A portable multi-function data recorder, including DSP acquisition board 1, PC104 main board 2, display unit 5, data storage unit 7, 4 analog quantity acquisition units 4, switch quantity unit 9 and power supply unit 3, 4 analog quantity acquisition units Unit 4 and switch unit 9 are connected with DSP acquisition board 1 through the backplane bus, DSP acquisition board 1 is connected with PC104 main board 2, PC104 main board 2 is connected with data storage unit 7, PC104 main board 2 is connected with display unit 5 through LVDS line, The power supply unit supplies power for 3 recorders, and the DSP acquisition board 1 includes 4 A/D chips 12, DSP chips 10, FPGA chips 11 and dual-port RAM 8, each A/D chip 12 and one analog quantity acquisition unit 4 connections, the switch unit 9 is connected to the FPGA chip 11 through a photocoupler, 4 A/D chips 12 are connected to the FPGA chip 11, the FPGA chip 11 is connected to the DSP chip 10, and the FPGA chip 11 is connected to the dual-port RAM 8; Analog signal: including AC voltage, AC current, DC voltage and DC current, processed by 4 analog quantity acquisition units 4 and then input to the backplane bus, switch signal is processed by the switch quantity unit and then input to the backplane bus, 4 The analog signal and switch data arrive at the DSP acquisition board 1 after passing through the backboard; the DSP acquisition board 1 is responsible for completing the high-frequency acquisition of the analog and switch signals, and the collected data is stored in the dual-port RAM 8 of the DSP acquisition board 1 , the PC104 main board 2 reads the data in the dual-port RAM 8 through the PC104 bus interface 13 to realize data interaction. The PC104 main board 2 has an external communication interface 6 . The DSP chip is the calculation core, and the FPGA chip is the logic control core. The FPGA chip controls 4 8-channel 16-bit synchronous sampling A/D chips, and the highest sampling rate is 100k/s. The analog channel data is synchronously sampled by the DSP The chip completes the calculation of the amplitude and phase angle parameters of the analog signal.

The DSP acquisition board is responsible for high-speed sampling and calculation of analog signals and switching signals. The PC104 main board is responsible for data storage, man-machine interface processing, wave recording logic, and test data recording and analysis. The PC104 main board communicates with the DSP through the bus and shared RAM. Communication between data acquisition units.

The DSP data acquisition unit adopts the design of DSP+FPGA as the core. In order to realize multi-channel synchronous sampling and high-precision A/D conversion, the unit adopts multi-channel synchronous sampling A/D chip. In order to achieve multi-channel synchronous sampling and high-speed data acquisition, the FPGA realizes the control of synchronous sampling of multiple A/D chips and the reading of sampling data. The sampling speed of the A/D chip reaches 100K/S, that is, a batch of channel data is sampled every 10us. If the DSP adopts the method of interrupting once every sampling, the processing of the interrupt signal will take up most of the time of the DSP, and individual data may be lost. interrupt response. Therefore, the sampling data is first read and cached by the FPGA. There are two ping-pong buffers inside the FPGA, each buffer is 4k bytes, and the two buffers work alternately. FPGA is responsible for high-speed A/D sampling and switching value sampling. The sampled data is stored in the buffer in turn. After each sampling 1ms, a DMA (direct data transfer) request is sent to the DSP, and the DSP reads the buffer data through DMA. While the DSP reads the buffer data, the FPGA continues to control the acquisition, and its sampling data is saved to another buffer. The DMA data transmission is controlled by the DMA controller of the DSP to directly perform batch data transmission between the FPGA and the DSP memory, which does not take up the DSP program time, and the transmission efficiency is high. The sampling data of 1ms (8 channels 100k/s, 24 channels 10k/s) At about 1K words, its transmission time is less than 50uS.

After the DSP collects the data, it performs operations on the data, calculates data such as amplitude and phase angle, and saves the sampling data and calculation data to the shared RAM. In order to realize the reading and writing of shared RAM by PC104, the control interface of PC104 bus (that is, ISA bus) is realized inside FPGA.

PC104 mainboard is a complete embedded computer with CPU, memory, electronic hard disk, etc. integrated on the board, and the operating system installed on the mainboard is Windows system. The upper computer software of the device is Windows software, which has a rich man-machine interface and is easy to learn and accept.

Example 2

1. The physical structure of the DSR-1000 portable multi-function data recorder. The device is installed in a metal box with a height of 4U. The box is equipped with a power plug-in, a management and data acquisition plug-in, a switch plug-in, an analog plug-in, and a chassis. There is a back panel inside, and a liquid crystal display is installed on the front panel of the chassis. The functions of each part are as follows:

(1.1), power plug-in, input AC 220V or DC power 220V, output the power used by each plug-in and module to the backplane bus, including 24V, ±15V, 12V, 5V power supply signals.

(1.2), management + data acquisition plug-in, including DSP acquisition board and management main board, the two are connected through PC104 socket to complete functions such as data acquisition, calculation, data display, waveform display, wave recording, test record and analysis, etc. The core of the whole device.

(1.3) The switching value plug-in completes the isolation input and switching value output functions of the switching value signal.

(1.4), the analog plug-in, to complete the analog signal isolation transformation input function.

2. The overall principle of the device. Figure 1 illustrates the overall principle of the device. The analog signal (including AC voltage, AC current, DC voltage, and DC current) is processed by the analog plug-in and then input to the backplane bus. The switch signal is sent by the switch After being processed by the quantity plug-in, it is input to the backplane bus, and the analog signal and switch quantity data reach the DSP board after passing through the backplane. The DSP is responsible for the high-frequency acquisition of analog and switch signals, and the collected data is stored in the shared RAM on the DSP board and read by the PC104 main board on the management unit board.

3. Analog signal processing. Figure 2 illustrates the principle of AC voltage signal processing. After the AC voltage signal is isolated and transformed by a voltage transformer, it is transformed into a mA-level current signal, converted into a 0-5V signal by an amplifier circuit and a filter circuit, and then passed through The backplane is input to the A/D chip analog input pin on the DSP board.

4. Switch signal processing, as shown in Figure 3, the principle of passive switch signal input processing, when the 24V power supply provided by the external switch signal closing device is added to the input optocoupler through the external switch signal, the optocoupler is turned on, and the switch Quantity KR1 output is high level, when the external switch signal is not conducted, KR1 output low level.

5. The principle of the DSP board, as shown in Figure 4, the principle of the DSP acquisition board, the A/D chip uses a 16-bit 8-channel synchronous sampling chip AD7606, and its maximum sampling frequency can reach 200K/S, which is sent by the FPGA chip by 100K/S Sampling conversion start pulse to 4 slices of A/D, start 6 slices of A/D and start conversion at the same time. After the A/D conversion of all chips is completed, an interrupt signal is sent, and the A/D chip conversion data (32 channels) and digital input data are read by the FPGA, and stored in the internal current data buffer. After the data sampling time reaches 1ms, the FPGA applies for DMA transmission to the DSP, and at the same time the A/D data read by the FPGA starts to be saved to another buffer. After the DSP receives the DMA transmission request, the DMA controller starts the batch data reading, and it only takes about 50us to read the data in the FPGA transmission buffer and prepare the FPGA for the next data transmission. After DSP reads the data and calculates, it transmits the waveform data and calculation data to dual-port RAM. Dual-port RAM also adopts a double-buffering mechanism, that is, one is used to save the current sampling data, and the other is used for PC104 to read data. Every time the amount of data memory reaches 20ms, apply for a data read interrupt to PC104, and PC104 reads the data in the current buffer of the dual-port RAM.

6. The working principle of the management board. The management board is equipped with a PC104 main board and an electronic hard disk. The PC104 uses an embedded industrial control main board. The main board uses a high-performance, low-power CPU. There is no fan on the main board. PC104 is inserted into the PC104 interface on the DSP board through the PC104 interface, and the data exchange with the DSP board is carried out through the PC104 bus.

7. PC104 software includes driver software, online monitoring software, data analysis software, test software, etc., and mainly completes the following functions:

(7.1), PC104 main board and DSP acquisition board carry out data interaction through PC104 bus, and Windows device driver needs to be written. The driver program is written in the WDM model, which realizes real-time management and real-time collection of data from the DSP acquisition board.

(7.2), real-time display of analog channel signal waveform, analog signal curve trend graph, analog amplitude, analog phase angle (AC), switching status, etc.

(7.3) Record the steady-state waveform data according to the set sampling frequency, and record the disturbance information and sequence event information.

(7.4) Check various fault criteria. When the starting element meets the conditions, start fault recording, record the waveforms before and after the fault, and send out an alarm signal at the same time.

(7.5) Provide data analysis software to analyze steady-state waveform data and transient waveform data. The analysis software can calculate frequency or time, analyze harmonic content and display harmonic distribution diagrams and analysis vector diagrams.

(7.6), automatically record steam turbine test data and calculate and analyze, test and calculate steam valve closing time, the action time of main steam valve and regulating valve is generally several hundred milliseconds, and its travel signal may be a signal with a frequency of 2K, so its The measurement requires a high-frequency signal channel, and its acquisition frequency is up to 100K/S. The program automatically starts the valve action recording according to the main valve switch contact, without manually capturing the signal. After recording the waveform, it is automatically or manually calculated by the analysis software. Parameters such as operation delay and valve closing time.

The utility model adopts a 16-bit multi-channel synchronous A/D chip, combines DSP technology and FPGA technology, has high acquisition frequency, can realize multi-channel synchronous 100K/S frequency sampling, and has high calculation accuracy, which can reach 0.2%. It adopts back plug-in structure, 4U height 19-inch chassis design, simple and reliable electrical structure, and a large number of acquisition and measurement channels, up to 32 channels of analog and 24 channels of switch. PC104 main board is used as the host computer, running Windows operating system, the software interface is rich, powerful, easy to learn and operate. At the same time, it supports fault recording and turbine test functions. Turbine test data recording, calculation and analysis are completed automatically, saving manpower and improving efficiency.

Claims (2)

1. A portable multifunctional data recorder, comprising a DSP acquisition board, a PC104 main board, a display unit, a data storage unit, a plurality of analog acquisition units, a switch unit and a power supply unit, is characterized in that: a plurality of analog acquisition units and the switch unit are connected with the DSP acquisition board through the backplane bus, the DSP acquisition board is connected with the PC104 main board, the PC104 main board is respectively connected with the display unit and the data storage unit, and the power supply unit supplies power for the recorder. The DSP acquisition board includes multiple Each A/D chip, DSP chip, FPGA chip and dual-port RAM, each A/D chip is connected to one analog quantity acquisition unit, the switch value unit is connected to the FPGA chip through a photocoupler, and multiple A/D chips are connected to the FPGA chip Chip connection, FPGA chip is connected to DSP chip, FPGA chip is connected to dual-port RAM; multiple analog signals: including AC voltage, AC current, DC voltage and DC current, are processed by multiple analog acquisition units and input to the backplane Bus, the switching signal is processed by the switching unit and then input to the backplane bus, and multiple analog signals and switching data arrive at the DSP acquisition board after passing through the backplane; the DSP acquisition board is responsible for completing the high frequency of analog and switching signals Acquisition, the collected data is stored in the dual-port RAM on the DSP acquisition board, and the PC104 main board reads the data in the dual-port RAM through the PC104 bus interface to realize data interaction. 2. A kind of portable multifunctional data recorder as claimed in claim 1, is characterized in that: described DSP chip is computing core, and FPGA chip is logic control core, is controlled 4 slices of 8 channels 16-bit synchronous sampling by FPGA chip The A/D chip synchronously samples the analog channel data at a sampling rate of up to 100k/s, and the DSP chip completes the calculation of the amplitude and phase angle parameters of the analog signal.

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