CN103604517A - Depletion type field-effect transistor (FET) temperature rise and thermal resistance real-time measuring method - Google Patents
Depletion type field-effect transistor (FET) temperature rise and thermal resistance real-time measuring method Download PDFInfo
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- CN103604517A CN103604517A CN201310558106.9A CN201310558106A CN103604517A CN 103604517 A CN103604517 A CN 103604517A CN 201310558106 A CN201310558106 A CN 201310558106A CN 103604517 A CN103604517 A CN 103604517A
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Abstract
The invention discloses a depletion type field-effect transistor (FET) temperature rise and thermal resistance real-time measuring method and relates to the field of semiconductor device testing. The method comprises the following steps: placing a device to be measured on constant temperature platform with a temperature of T0; the gate electrode of the device to be measured not being externally connected; connecting a drain electrode with a voltage source which generates a step voltage with a low level VL and a high level VH; connecting the source electrode of the device to be measured with one end of a sampling resistor with a resistance value R1; the other end of the sampling resistor being grounded, and connecting a high-speed data collector with a sampling frequency greater than 400 MHz to the two ends of the sampling resistor for acquiring a drain current IDS; and obtaining the temperature rises of different parts of the device to be measured through calculating. The method provided by the invention can be applied to the transient temperature rise measuring of a depletion type FET, i.e., a normally-open type channel device under the condition of equivalent power. The measuring method is simple and accurate, and is applied to the fields of production, reliability and performance research and device development of an electronic device.
Description
Technical field
The present invention relates to semiconducter device testing field, be mainly used in measurement and the analysis of depletion type (open type raceway groove) fieldistor channel transient temperature measuring and thermal resistance.
Background technology
Depletion mode fet, as GaN base, GaAs base schottky gated power transistors have outstanding performance parameter performance in microwave power field.Yet its active volume is little, thin thickness, thermal time constant is little, power density is high, thereby makes active area temperature transient changing very remarkable.The temperature rise of 1 microsecond time changes can reach 100C.This will be directly to device performance parameter, and particularly serviceable life and reliability are brought impact.Because epitaxial film materials only has several microns, thermal time constant is little, and pace of change is fast, serious on the impact of device transient response.Measure active area transient temperature rise, significant to device architecture and performance optimization.Existing optical measurement technology, can only provide the surface temperature of device, and the thermal resistance that can not realize from active area to temperature platform forms.Electrical parameter method based on forward Xiao characteristic can finely provide device thermal resistance and form, but because device grids postpones to be generally microsecond magnitude the switching time from anti-(duty) partially to positively biased (measuring state), can have influence on the temperature measurement precision of transient changing.
The technology of the present invention can be applied to depletion type, and the transient temperature rise under open type channel device equivalent power is measured.Measuring method is simple, accurate, is applicable to production, reliability and performance study and the device development field of electron device.
The principle of work of the inventive method:
Between open type field effect transistor drain-source, be a resistance.When grid does not add electrode, while applying a potential pulse between drain-source, drain-source current can increase sharply, and then due to current/voltage Self-heating effect, along with the increase of time, temperature raises, and drain-source current can reduce gradually.After reaching stable state, drain-source current reaches a steady state value.Can pass through drain-source current process over time, temperature temperature-rise period in time in measuring element raceway groove.The temperature correction implementation procedure of drain-source current is on a steady temperature platform, and temperature is T1, and in the moment that applies drain-source voltage, electric current is rapidly increased to mxm..Because rise time of electric current is much smaller than thermal time constant, can think that this electric current is the current value of temperature while being T1.Again temperature setting is set to T2, T3.。。Deng, as can be seen from Fig. 2.This current value has varied with temperature good linear relationship.By this Ids temperature correction relation, can obtain the temperature variant temperature coefficient of Ids.This temperature coefficient, for the calibration to actual Ids, can be obtained to temperature curve over time.
Because the method is directly measured drain-source current variation with temperature, the transient temperature that therefore can obtain nanosecond changes.Particularly practical for the temperature variation of measuring micron order epitaxy layer thickness, there is good advance.
Real-time measurement depletion mode fet transient temperature rise and a thermal resistance method, is characterized in that comprising the steps:
It is T0 temperature platform that measured device is positioned over to a temperature; The gate electrode of measured device does not carry out any outside connection; Drain electrode connects voltage source, and voltage source produces low level V
l, high level is V
hstepped-up voltage; The source electrode of measured device is connected to one end of sampling resistor, and sampling resistor resistance is R1; The other end ground connection of sampling resistor, and by high speed data acquisition system access sampling resistor two ends more than a sample frequency 400MHz, to gather leakage current I
dS;
Low-voltage V is set
lobject be in order to remove in advance the impact of possible interface state, and don't as for producing from heating up.
When voltage source is when low level becomes high level, start high speed data acquisition system, gather drain electrode voltage and arrive V
hafter drain electrode electric current I
dS(t), after reaching steady state (SS) between device and temperature platform, drain electrode electric current no longer changes, and reaches stable state; Voltage arrives V
hmoment drain electrode electric current be I
dS0, temperature rise causes the time dependent curve of drain electrode electric current:
△I
DS(t)=I
DS(t)-I
DS0；
By temperature platform temperature is set, set two temperature T 1, T2, gather respectively drain electrode voltage at two temperature and arrive V
helectric current I during moment
dS2, I
dS1, the temperature coefficient α of drain electrode electric current;
α=(I
DS2-I
DS1)/(T2-T1)；
Device heterojunction transient temperature rise curve △ T (t)=(I
dS2-I
dS1)/α; △ T (t) data are inputed to business thermo-resistance measurement instrument (the Analysis Tech Phase11 of company thermal resistance analysis instrument), or structure function process software, the temperature rise of device different parts obtained;
In the present invention, by the variation of Real-time Collection drain current, measure in real time raceway groove transient temperature.Can realize real-time, quick, convenient measuring element, especially the temperature rise of device be formed and analyzed.
Accompanying drawing explanation
Fig. 1 (a) heterojunction semiconductor chip
Fig. 1 and (b) method of testing schematic diagram
1SiC substrate; 2GaN layer; 3AlGaN layer; 4 drain electrodes; 5 source electrodes; 6 gate electrodes; 7Si
3n
4passivation layer 8 high speed data acquisition systems
The calibration of Fig. 2 temperature coefficient
Fig. 3 heterojunction semiconductor device drain current declines and active area temperature rise curve figure;
Fig. 4 differential structrue functional based method extracts each layer of temperature rise schematic diagram of chip internal;
Fig. 5 differential structrue functional based method extracts chip internal thermal resistance schematic diagram.
Embodiment
Select one singly to refer to that AlGaN/GaN HEMT device is device under test, device architecture is as shown in Fig. 1 (a), and 1 is the SiC layer of 400 microns, and 2 for thickness is the GaN layer of 1.5 microns, and 3 is the AlGaN layer of 25 nanometers.Distance between its drain electrode 4 and source electrode 5 is 4.5 microns, and it is 100 microns that source is leaked wide, and 6 is gate electrode, and 7 is Si
3n
4passivation layer.
Device is placed in to temperature platform, it is contacted with temperature platform well, device electricity connects as shown in Fig. 1 (b), gate electrode 6 does not carry out any outside connection, drain electrode 4 connects voltage source, voltage source can produce low level 0.01-0.1V, high level is the stepped-up voltage (voltage swing visual organ part rated voltage is determined) of 10V, source electrode connects the sampling resistor that a size is 1 Europe, resistance other end ground connection, and sampling resistor is connected to the electric current being used between record drain electrode 4 and source electrode 5 with the high speed data acquisition system 8 of a 400MHz.
It is 20 degrees Celsius that temperature platform temperature is set, and gathers drain voltage and reaches the moment drain electrode 4 of 10V and the electric current I between source electrode 5
dS(20), temperature platform temperature is adjusted to 90 degrees Celsius from 20, each adjusting range is 10 degrees Celsius, adopts in the same way the forward voltage drop between record drain electrode 4 and source electrode 5 respectively, and when temperature platform temperature is 90 degrees Celsius, electric current is I
dS(90),, by linear fit, can obtain temperature coefficient lubber-line, as shown in Figure 2.Calculate schottky junction temperature coefficient α:
α=(I
DS(90)-I
DS(20)))/(90-20)
Temperature platform temperature is made as to 20 degrees Celsius, and collection drain voltage starts to gather the electric current I between drain electrode and source electrode when reaching 10V
dS(t), until I
dS(t) reach steady state (SS).Utilize α to calculate the temperature rise Δ T temporal evolution curve 1 between drain electrode and source electrode, as shown in Figure 3,
ΔT(t)=(I
DS(t)-I
DS(20))/α
Utilize structure function method, to temperature rise over time curve 1 process, obtain differential structrue function curve 2, as shown in Figure 4, the temperature rise of each layer in the corresponding heat transmission channel of each peak value in figure, thus the interface temperature rise effectively obtaining between Bimaterial in terface GaN layer 2 and SiC substrate layer 1 is 100K.Utilize thermal resistance calculation formula Rth=Δ T/Wh, the interface resistance obtaining between Bimaterial in terface GaN layer 2 and SiC substrate layer 1 is 20K/W, as shown in Figure 5.
By above explanation, can be found out, adopt method of the present invention, by gathering the heat lag time between thermal source district and temperature sensing district, can measure the temperature rise of heterogeneous semiconductor material interface and thermal resistance.
Claims (1)
1. measure in real time depletion mode fet transient temperature rise and a thermal resistance method, it is characterized in that comprising the steps:
It is T0 temperature platform that measured device is positioned over to a temperature; The gate electrode of measured device does not carry out any outside connection; Drain electrode connects voltage source, and voltage source produces low level V
l, high level is V
hstepped-up voltage; The source electrode of measured device is connected to one end of sampling resistor, and sampling resistor resistance is R1; The other end ground connection of sampling resistor, and by high speed data acquisition system access sampling resistor two ends more than a sample frequency 400MHz, to gather leakage current I
dS;
When voltage source is when low level becomes high level, start high speed data acquisition system, gather drain electrode voltage and arrive V
hafter drain electrode electric current I
dS(t), after reaching steady state (SS) between device and temperature platform, drain electrode electric current no longer changes, and reaches stable state; Voltage arrives V
hmoment drain electrode electric current be I
dS0, temperature rise causes the time dependent curve of drain electrode electric current:
△I
DS(t)=I
DS(t)-I
DS0；
By temperature platform temperature is set, set two temperature T 1, T2, gather respectively drain electrode voltage at two temperature and arrive V
helectric current I during moment
dS2, I
dS1, the temperature coefficient α of drain electrode electric current;
α=(I
DS2-I
DS1)/(T2-T1)；
Measured device heterojunction transient temperature rise curve △ T (t)=(I
dS2-I
dS1)/α; △ T (t) data are inputed to business thermo-resistance measurement instrument or structure function process software, obtain the temperature rise of measured device different parts.
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| CN103869233A (en) * | 2014-04-01 | 2014-06-18 | 北京工业大学 | Method for measuring thin-film heat resistance inside semi-conductor components |
| CN103954899A (en) * | 2014-04-09 | 2014-07-30 | 北京工业大学 | Method for measuring diode transient temperature rise in real time |
| CN106199366A (en) * | 2016-06-25 | 2016-12-07 | 北京工业大学 | A kind of method of power MOS (Metal Oxide Semiconductor) device temperature measurement on-line |
| CN106483439A (en) * | 2015-08-31 | 2017-03-08 | 中芯国际集成电路制造(上海)有限公司 | The self-heating effect evaluation method and self-heating effect evaluation system of ldmos transistor |
| CN106526442A (en) * | 2015-09-09 | 2017-03-22 | 中芯国际集成电路制造(上海)有限公司 | LDMOS transistor self-heating effect evaluation method and self-heating effect evaluation system |
| CN109709141A (en) * | 2019-01-21 | 2019-05-03 | 北京工业大学 | A kind of IGBT temperature rise and thermal resistance constitute test device and method |
| CN110168328A (en) * | 2017-04-03 | 2019-08-23 | 宝马股份公司 | For determining the method and electronic building brick of the temperature of at least one electronic switching element |
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| CN103869233B (en) * | 2014-04-01 | 2017-06-06 | 北京工业大学 | A kind of measuring method of semiconductor device inside thin layer thermal resistance |
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| CN106483439B (en) * | 2015-08-31 | 2019-05-28 | 中芯国际集成电路制造(上海)有限公司 | The self-heating effect evaluation method and self-heating effect evaluation system of ldmos transistor |
| CN106526442A (en) * | 2015-09-09 | 2017-03-22 | 中芯国际集成电路制造(上海)有限公司 | LDMOS transistor self-heating effect evaluation method and self-heating effect evaluation system |
| CN106526442B (en) * | 2015-09-09 | 2019-05-28 | 中芯国际集成电路制造(上海)有限公司 | The self-heating effect evaluation method and self-heating effect evaluation system of ldmos transistor |
| CN106199366A (en) * | 2016-06-25 | 2016-12-07 | 北京工业大学 | A kind of method of power MOS (Metal Oxide Semiconductor) device temperature measurement on-line |
| CN106199366B (en) * | 2016-06-25 | 2018-11-20 | 北京工业大学 | A kind of method of power MOS (Metal Oxide Semiconductor) device temperature measurement on-line |
| CN110168328A (en) * | 2017-04-03 | 2019-08-23 | 宝马股份公司 | For determining the method and electronic building brick of the temperature of at least one electronic switching element |
| CN110168328B (en) * | 2017-04-03 | 2021-08-31 | 宝马股份公司 | Method for determining the temperature of at least one electronic switching element and electronic assembly |
| US11852543B2 (en) | 2017-04-03 | 2023-12-26 | Bayerische Motoren Werke Aktiengesellschaft | Method and electronic assembly for determining a temperature of at least one electronic switching element |
| CN109709141A (en) * | 2019-01-21 | 2019-05-03 | 北京工业大学 | A kind of IGBT temperature rise and thermal resistance constitute test device and method |
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