CN103593324A

CN103593324A - Quick-start and low-power-consumption computer system-on-chip with self-learning function

Info

Publication number: CN103593324A
Application number: CN201310561241.9A
Authority: CN
Inventors: 景蔚亮; 陈邦明
Original assignee: Shanghai Xinchu Integrated Circuit Co Ltd
Current assignee: Shanghai Xinchu Integrated Circuit Co Ltd
Priority date: 2013-11-12
Filing date: 2013-11-12
Publication date: 2014-02-19
Anticipated expiration: 2033-11-12
Also published as: CN103593324B; CN106951392A

Abstract

The invention relates to the technical field of computers, in particular to a computer system-on- chip. The quick-start and low-power-consumption computer system-on-chip with the self-learning function comprises a central processing unit and an on-chip mixed cache, and the central processing unit is connected with the on-chip mixed cache. The on-chip mixed cache comprises an on-chip nonvolatile memory, further comprises an on-chip cache and is connected with an out-chip main memory and an external high-capacity nonvolatile memory. The quick-start and low-power-consumption computer system-on-chip with the self-learning function further comprises a system monitoring statistics module, and the system monitoring statistics module is used for obtaining, configuring and loading operating system start-up information and/or heat application program information to the on-chip nonvolatile memory. The power-on time of an operating system and the starting time of a heat application program can be saved on the basis of keeping high performance of the system, and the power consumption produced when data are guided into an internal storage from the external high-capacity nonvolatile memory to be read by the central processing unit can be reduced.

Description

A kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function

Technical field

The present invention relates to field of computer technology, be specifically related to a kind of computing machine SOC (system on a chip).

Background technology

With regard to hardware system, most computers mainly adopts two kinds of architectures, is respectively von Neumann structure and Harvard structure.As shown in Figure 1, wherein SOC (system on a chip) (System on Chip, SoC) 5, comprises Cache (cache) 2 on central processing unit (CPU) 1 and sheet to the system architecture of von Neumann structure.Primary memory outside SOC (system on a chip) 5 braces (main memory) 3 and external non-volatile memory 4.Central processing unit 1 can directly be accessed Cache 2 and primary memory 3 on sheet by system bus.Leave data or instruction in external non-volatile memory 4 in, first to import in primary memory 3 through outside interconnection, then primary memory 3 importing tablets in Cache 2, exist on sheet the instruction in Cache 2 or data by central processing unit 1, directly to be accessed again.The main volatile memory that adopts of Cache 2 on primary memory 3 and sheet, after power-off, information is all lost.The general dynamic RAM (DRAM) that adopts of primary memory 3, compares central processing unit 1 frequency and wants slow many due to the speed of primary memory 3, if all data and instruction are all stored in primary memory 3, will have a strong impact on the performance of system.On sheet, Cache 2 is to access the primary memory memory unit of 3 required averaging times for reducing central processing unit 1, on sheet, Cache 2 generally consists of static RAM (SRAM), in pyramid storage system as shown in Figure 2, the top-down capacity of memory unit is larger, speed is slower, and price is lower.On sheet, Cache 2 is positioned at the top-down second layer, is only second to the register 11 of central processing unit, and its capacity is much smaller than primary memory 3, but speed can approach the frequency of central processing unit 1.When central processing unit 1 sends primary memory 3 request of access, can first access on sheet and in Cache 2, check and whether have request msg.If exist or hit, without access primary memory 3, directly return to these data; If there is no or lost efficacy, want first the corresponding data in primary memory 3 is written into Cache 2 on sheet, then return to central processing unit 1.External non-volatile memory 4 mainly refers to hard disk, flash memory etc., also comprises the memory units such as CD, smart card, and after the large and power down of its capacity, information is not lost, but reading speed is low.Central processing unit 1 will read the content in external non-volatile memory 4, need to first data or instruction be imported in primary memory 3 by peripheral interface bus, and central processing unit 1 operates the data in primary memory 3 or instruction again.The speed of peripheral interface bus will be much smaller than the speed of system bus, so the reading rate of Cache 2 and primary memory 3 will be much larger than external non-volatile memory 4 reading rates on 1 pair of sheet of central processing unit.

Harvard structure is a kind of parallel architecture based on von Neumann system, but it is taked instruction storage and data storage memory construction separately, as shown in Figure 3, compare with the von Neumann structure shown in Fig. 1, on sheet, Cache 2 is split as on-chip command Cache 6, shared cache 8 on data high-speed impact damper 7 and sheet on sheet, be characterized in instruction and data to be stored in respectively different storage spaces, be that command memory and data-carrier store are two independently storeies, each storer independently addresses, independent access.Similar with von Neumann structure, leave data or instruction in external non-volatile memory 4 in, first to import in primary memory 3 through outside interconnection, then primary memory 3 importing tablets in shared cache 8.Difference is, instruction on sheet in shared cache 8 will be sent to on-chip command Cache 6 by Cache instruction bus 11 on sheet independently, and central processing unit 1 is again by the instruction in system directive bus 9 access on-chip command Caches 6; Data on sheet in shared cache 8 will be sent to data cache 7 on sheet by high-speed cache data bus 12 on sheet independently, and central processing unit 1 is again by the data in data cache 7 on system data bus 10 access sheets.

No matter be von Neumann structure or Harvard structure, on primary memory 3 and sheet, Cache 2 is all volatile memory, information dropout after power down, so system powers on each time or is waken up, os starting information all must import in primary memory 3 from external non-volatile memory 4, and then in importing tablet in Cache 2, then read by central processing unit 1.The information that central processing unit 1 is processed although power on is at every turn nearly all the same, but because Cache on sheet 2 and primary memory 3 are all volatibility, power at every turn and have to repeat os starting information is imported internal storages 3 and sheet in Cache 2 from external non-volatile memory 4, such transmitting procedure speed is very slow, and power consumption is very high, operating system can not start fast.Application programs, no matter whether be that user the most often uses, as long as not useful data or the instruction of this program in Cache 2 on primary memory 3 and sheet, during each this application program of system call, the instruction and data relevant with this program all need to be called in primary memory 3 from external non-volatile memory 4, is then written into Cache 2 on sheet.

In addition, user can frequent use a certain program within certain period, and the application program that we the most often use user is referred to as " hot application program ", and for example system powers on, and after os starting, the order that user calls each application program as shown in Figure 4.System is first called hot application program R, after handling, process respectively again application A and application program B, hot application program R is again by system call afterwards, and hot application program R is called and starts maximum application programs by user in the ensuing whole operating process that powers on.Suppose 2 finite capacities that can store of Cache on sheet, can only deposit one or two application information, concrete implementation is: after os starting, need to hot application program R be directed into primary memory 3 Cache 2 in importing tablet again from external non-volatile memory 4, then in external non-volatile memory 4, application A is directed into the primary memory 3 hot application program R of part in Cache 2 on Cache 2 replacement blade in importing tablet again, application program B is directed into afterwards to primary memory 3 part application A or the hot application program R of part in Cache 2 on Cache 2 replacement blade in importing tablet again from external non-volatile memory 4, call again afterwards hot application program R, note, although imported Cache 2 on sheet before hot application program R, but the application program having been loaded has subsequently been replaced, the Cache 2 on sheet so have to again again be directed into from primary memory 3.Along with the number of times importing constantly increases, power consumption also can be increasing.

From process above, no matter be the each electrifying startup of system or hot application program loading procedure, central processing unit 1 always needs os starting program or hot application program to be written into primary memory 3 from external non-volatile memory 4, Cache 2 in importing tablet again, exist speed slow, the shortcoming that power consumption is large, and along with system operation time and number of times increasing, be accompanied by the loss of electron device, system performance can decline gradually, if it is constant to maintain power consumption, system running speed can be more and more slower, if keep travelling speed constant, power consumption can be more and more higher.

Summary of the invention

The object of the invention is to, a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function is provided, solve above technical matters;

The present invention also aims to, a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function is provided, solve above technical matters.

Technical matters solved by the invention can realize by the following technical solutions:

The invention provides a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function, described SOC (system on a chip) (5) comprises Cache (2) on central processing unit (1), sheet, wherein,

Also comprise hybrid cache device (15) in a slice, described central processing unit (1) connects described mixing on chip Cache (15); Described mixing on chip Cache (15) comprises nonvolatile memory on sheet (13), and described mixing on chip Cache (15) also comprises described upper Cache (2);

Described SOC (system on a chip) also configures a system monitoring statistical module (14), and described system monitoring statistical module (14) obtains the thermal information of os starting information and/or application program, configures and is loaded in described upper nonvolatile memory (13).

Preferably, described system monitoring statistical module (14) comprises a counting module, a judge module, and the os starting information that described counting module loads when system is started at every turn is at first added up; Described judge module is set rule according to first and is chosen first stage application configuration to nonvolatile memory (13) described from described os starting information.

Preferably, described system monitoring statistical module (14) comprises a counting module, a judge module, described counting module is added up the loading frequency of each application program, and described judge module is set rule according to second and from the thermal information of application program, chosen thermal information A configuration to described upper nonvolatile memory (13).

Preferably, described system monitoring statistical module (14) upgrades the described content going up in nonvolatile memory (13) every a setting-up time interval.

Preferably, described upper Cache (2) comprises high-speed cache on the sheet that at least N level connects successively, and wherein, N is more than or equal to 1; Described at least one on sheet high-speed cache by described upper nonvolatile memory (13), partly or entirely replaced or described at least one on sheet high-speed cache in conjunction with nonvolatile memory (13) on sheet described in.

Preferably, described upper Cache (2) comprises on on-chip command Cache (6), sheet shared cache (8) on data cache (7), sheet, described mixing on chip Cache (15) comprises mixing on chip shared cache (18), and described mixing on chip shared cache (18) comprises on described upper shared cache (8) and sheet shares nonvolatile memory (19); Described mixing on chip shared cache (18) is connected with data cache (7) on described on-chip command Cache (6) and sheet respectively.

Preferably, described upper nonvolatile memory (13) comprises the described upper nonvolatile memory (19) of sharing; Described upper nonvolatile memory (13) also comprises on sheet non-volatile data memory (17) on non-volatile command memory (16), sheet; Described upper non-volatile command memory (16) replaces part or all of described on-chip command Cache (6) with described on-chip command Cache (6) combination or described upper non-volatile command memory (16); Described upper non-volatile data memory (17) replaces partly or entirely described upper data cache (7) with described upper data cache (7) combination or described upper non-volatile data memory (17).

Preferably, described on-chip command Cache (6) comprises the on-chip command high-speed cache that at least N level connects successively; Correspondingly, described upper data cache (7) comprises data cache on the sheet that at least N level connects successively; Wherein, N is more than or equal to 1;

At least one described upper non-volatile command memory (16) in conjunction with or replace a described on-chip command high-speed cache (6-1, and/or 6-2.。。And/or 6-N); At least in a slice non-volatile data memory (17) in conjunction with or replace one described upper data cache (7-1, and/or 7-2.。。And/or 7-N).

Preferably, described upper nonvolatile memory adopts phase transition storage, and the storage unit of described phase transition storage adopts the structure based on a diode and a phase change resistor or adopts the structure based on two diodes and two phase change resistors.

The present invention also provides a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function, wherein, is applied to above-mentioned a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function; Comprise,

Os starting step, os starting information is divided into first stage program and subordinate phase program, and concrete steps are as follows:

Step s11, system monitoring statistical module (14) obtains the step of os starting information;

Step s12 chooses first stage program according to the first setting rule from os starting information, by described first stage application configuration to the step in the middle of nonvolatile memory (13) on sheet;

Step s13, central processing unit (1) starts the step of described first stage program;

Step s14, central processing unit (1) is carried out the step of subordinate phase program.

Preferably, also comprise thermal information invocation step, thermal information is divided into thermal information A and thermal information B, and concrete steps are as follows:

Step s21, system monitoring statistical module (14) obtains the step of the thermal information of application program;

Step s22, chooses thermal information A and described thermal information A is configured to the step in the middle of nonvolatile memory (13) on sheet according to the second setting rule;

Step s23, central processing unit (1) loads the step of described thermal information A;

Step s24, central processing unit (1) loads the step of thermal information B.

Preferably, before execution step s13, also comprise step s123, judge the whether externally middle step of upgrading of nonvolatile memory (4) of first stage program;

If first stage program is externally upgraded in nonvolatile memory (4), from external non-volatile memory (4), obtain os starting information in a conventional manner, complete operation system starts;

If first stage program is not externally upgraded in nonvolatile memory (4), enter step s13.

Preferably, in step s13, be also included in and start in described first stage program process, subordinate phase program is imported to the step of Cache (2) on primary memory (3) or sheet simultaneously.

Preferably, after step s13, before step s14, central processing unit (1) completes and starts after described first stage program, whether the step that judges Cache (2) on described subordinate phase program importing primary memory (3) or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s14.

Preferably, before execution step s23, also comprise step s223, judge the whether externally middle step of upgrading of nonvolatile memory (4) of thermal information A;

If thermal information A externally upgrades in nonvolatile memory (4), from external non-volatile memory (4), obtain thermal information in a conventional manner, complete application program and load;

If thermal information A does not externally upgrade in nonvolatile memory (4), enter step s23.

Preferably, in step s23, be also included in and start in described thermal information A process, thermal information B is imported to the step of Cache (2) on primary memory (3) or sheet simultaneously.

Preferably, after step s23, before step s24, central processing unit (1) completes and starts after described thermal information A, whether the step that judges Cache (2) on described thermal information B importing primary memory (3) or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s24.

Preferably, in step s11, comprise step s111, after system electrifying startup, central processing unit (1) decision operation system enable position, as having os starting information in nonvolatile memory on chankings (13), enters step s123; If no, from external non-volatile memory (4), obtain os starting information in a conventional manner, complete operation system starts.

Preferably, in step s21, comprise step s211, after system electrifying startup, before processing described thermal information, central processing unit (1) judgement thermal information loading position, as having thermal information in nonvolatile memory on chankings (13), enters step s223; If no, from external non-volatile memory (4), obtain thermal information in a conventional manner, complete application program and load.

Preferably, described first sets rule is: the system that described system monitoring statistical module (14) records a setting-up time repeats load module after electrifying startup, described load module is arranged in described external non-volatile memory (4), the invoked wherein part that starts most of described load module is written in nonvolatile memory on sheet (13) as first stage program, and using the remainder of described load module as described subordinate phase program.

Preferably, described second sets rule is: described system monitoring statistical module (14) records frequency and the thermal information that each application program of a setting-up time is loaded, described thermal information is arranged in described external non-volatile memory (4), a wherein part for described load module is written in nonvolatile memory on sheet (13) as thermal information A, and using the remainder of described load module as described thermal information B.

Preferably, be more than or equal to T2/N the interval time (T1) that repeats power-on and power-off when system, and wherein, T2 is system service time, and unit is minute; When N is the erasable number of times minute of described upper nonvolatile memory (13), described system monitoring statistical module (14) just can upgrade the content in described upper nonvolatile memory (13);

Preferably, in carrying out described os starting step or described thermal information invocation step, before described central processing unit reads described information in upper nonvolatile memory (13), first judge the last time that content in described upper nonvolatile memory (13) is upgraded, if the last time interval of upgrading of distance has surpassed the data hold time of described upper nonvolatile memory (13), described central processing unit (1) is abandoned reading information in nonvolatile memory from described (13), and read from described external non-volatile memory (4), and make described information in upper nonvolatile memory (13) invalid, if the time interval is less than nonvolatile memory on sheet (13) data hold time, central processing unit (1) reading information in nonvolatile memory (13) on sheet just.

Beneficial effect: owing to adopting above technical scheme, the present invention adopted reading speed soon, the upper nonvolatile memory of extremely low electricity leakage power dissipation and highdensity, Substitute For Partial or in conjunction with original upper Cache, and in system, configured the use habit that system monitoring statistical module carrys out recording user, can on the high performance basis of keeping system, save operating system and power on and the hot application program launching time, and greatly reduce the power consumption that data read to central processing unit from external non-volatile memory importing internal storage; Along with this low power-consumption intelligent system is longer service time, the different use habit of each different user can by this system intelligence learn, thereby make the system running speed can be more and more faster, user experiences and also becomes better and better.

Accompanying drawing explanation

Fig. 1 is the system architecture diagram of the von Neumann structure of traditional computer;

Fig. 2 is the pyramid structure schematic diagram of storer in computer architecture;

Fig. 3 is the system architecture diagram of the Harvard structure of traditional computer;

Fig. 4 is that after os starting, user calls each application program exemplary plot;

Fig. 5 is computing machine system on chip structure exemplary plot of the present invention;

Fig. 6 is the 1D1R memory cell structure schematic diagram of phase transition storage;

Fig. 7 is the 2D2R memory cell structure schematic diagram of phase transition storage;

Fig. 8 is the upper cache structure schematic diagram of multistage in von Neumann structure;

Fig. 9 is the upper cache structure schematic diagram of multistage in Harvard structure;

Figure 10 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the first von Neumann structural drawing of Cache 2;

Figure 11 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the second von Neumann structural drawing of Cache 2;

Figure 12 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the third von Neumann structural drawing of Cache 2;

Figure 13 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the 4th kind of von Neumann structural drawing of Cache 2;

Figure 14 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the first Harvard structure figure of Cache 2;

Figure 15 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the second Harvard structure figure of Cache 2;

Figure 16 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the third Harvard structure figure of Cache 2;

Figure 17 is that on sheet, nonvolatile memory 13 replaces part or in conjunction with the 4th kind of Harvard structure figure of Cache 2;

Figure 18 is the os starting schematic diagram that self study of the present invention starts low-power consumption computing machine SOC (system on a chip) fast;

Figure 19 is that operating system the first of the present invention starts process flow diagram fast;

Figure 20 is that operating system the second of the present invention starts process flow diagram fast;

Figure 21 is the third quick process flow diagram that starts of operating system of the present invention;

Figure 22 is the hot application call thermal information schematic diagram that self study of the present invention starts low-power consumption computing machine SOC (system on a chip) fast;

Figure 23 is that system of the present invention is carried out hot application program schematic diagram.

Embodiment

Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, the every other embodiment that those of ordinary skills obtain under the prerequisite of not making creative work, belongs to the scope of protection of the invention.

It should be noted that, in the situation that not conflicting, embodiment and the feature in embodiment in the present invention can combine mutually.

Below in conjunction with the drawings and specific embodiments, the invention will be further described, but not as limiting to the invention.

A kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function provided by the invention, as shown in Figure 5, SOC (system on a chip) 5 comprises Cache 2 on central processing unit 1, sheet, also comprises hybrid cache device 15 in a slice, hybrid cache device 15 on central processing unit 1 brace; Mixing on chip Cache 15 comprises nonvolatile memory 13 on sheet, and mixing on chip Cache 15 also comprises Cache 2 on sheet; Primary memory 3 outside mixing on chip Cache 15 braces, primary memory 3 connects external non-volatile memory 4; SOC (system on a chip) is configuration-system monitoring statistical module 14 also, and system monitoring statistical module 14 available hardware, software or operating system nucleus are realized; System monitoring statistical module 14 obtains the thermal information of os starting information and/or application program, and configuration is loaded on sheet in nonvolatile memory 13.

On sheet, nonvolatile memory 13 replaces Cache 2 on the former this film of part, or forms above-mentioned mixing on chip Cache 15 in conjunction with Cache on former this film 2.

System monitoring statistical module 14 comprises a counting module, a judge module, and the os starting information that counting module loads when system is started at every turn is at first added up; Judge module is set rule according to first and is chosen first stage application configuration to nonvolatile memory 13 sheet from os starting information.

Judge module is set rule according to second and from the thermal information of application program, is chosen thermal information A and configure to nonvolatile memory 13 on sheet.System monitoring statistical module 14 every a setting-up time interval to sheet on content in nonvolatile memory 13 upgrade.

The present invention is in the process of system electrifying startup, and system monitoring statistical module 14 mainly contains following functions: monitor the log-on message loading when every subsystem starts; Register system starts the log-on message of invoked operating system most while starting; According to the system configuration of setting with process the principle of optimality, judge that a part of system log-on message deposits on sheet in nonvolatile memory 13 as first stage program;

Within a period of time, after system electrifying startup, upgrade and edit and deposit in the middle of nonvolatile memory on sheet 13 operation system information of calling when system starts.

Application programs, system monitoring statistical module 14 is the loading frequency of each application program of monitoring in real time; Record each and be loaded the most normal invoked information in application program, be referred to as " thermal information ", it may be a string data, may be also one section of power function; Judge which part thermal information should put into nonvolatile memory 13 on sheet, which part thermal information should be replaced out in nonvolatile memory 13 from sheet, and which part thermal information should continue to leave on sheet in nonvolatile memory 13; Within a period of time, when electricity is closed under system, upgrade and edit and deposit the thermal information content in nonvolatile memory 13 on sheet.

On above-mentioned sheet, nonvolatile memory 13 is that the non-volatile on-chip memory of large capacity that can be comprised of any material forms, such as ferroelectric memory (FeRAM), magnetoresistive memory (MRAM), variable resistance type storer (ReRAM), phase transition storage (PCRAM) and flash memory etc., the feature of these storeies is that density is large, static leakage current is little, low in energy consumption.Take phase transition storage as example, its basic unit of storage can be 1D1R, as shown in Figure 6, at bit line (BL, Bit line) and word line (WL, Word line) between, access a phase change resistor R1 and a switching diode D1, thereby it is advantageous that less storage unit reaches higher integrated level.Another kind of basic unit of storage can be 2D2R, as shown in Figure 7, adopts two switching diode D1, D2 and two phase change resistor R1, R2, and the memory cell area of 1D1R is approximately 4F ²(unit that F is memory cell size, Femto, femto), the memory cell area of 2D2R is about 10F ², rear a kind of storage unit take that to sacrifice area be cost, thereby it is advantageous that less drive current reaches reading speed faster.But compare Cache on general sheet and there is 120F ²memory cell area, the advantage of phase transition storage is fairly obvious.Therefore of the present invention upper nonvolatile memory 13 preferably adopts phase transition storage; And reading speed is required to high storage unit, can adopt the memory cell structure of 2D2R; Storage density is required to high storage unit, can adopt the memory cell structure of 1D1R.

In order to make the outer primary memory 3 of central processing unit 1 access sheet reach better performance, on sheet, Cache 2 can be divided into multistage.

Concerning von Neumann structure, on sheet, Cache 2 can be divided into N level, and on sheet, Cache 2 comprises high-speed cache on the sheet that at least N level connects successively, and wherein, N is more than or equal to 1; At least in a slice, high-speed cache is substituted or in conjunction with nonvolatile memory 13 on sheet described in.As shown in Figure 8, be the sheet upper level high-speed cache 2-1 connecting successively, second level cache 2-2 on sheet ..., N level high-speed cache 2-N on sheet.From central processing unit 1 more close to, to the reading speed of high-speed cache, require higher; From central processing unit 1 more away from, the capacity of high-speed cache is increasing.On sheet, nonvolatile memory 13 can replace high-speed cache on part or a combination A-class picture.It is example that the nonvolatile memory 13 of take on sheet adopts phase transition storages, if replace rudimentary upper high-speed cache, such as sheet upper level high-speed cache 2-1, reading speed is required high, can adopt the memory cell structure of 2D2R; If replace senior upper high-speed cache, for example N level high-speed cache 2-N on sheet, high to storage density requirement, can adopt the cellular construction of 1D1R.

Concerning Harvard structure, on on-chip command Cache 6 on sheet in Cache 2 and sheet, data cache 7 also can be divided into N level, and N is more than or equal to 1, as shown in Figure 9, be respectively the sheet upper level instruction cache 6-1 connecting successively, secondary instruction cache 6-2 on sheet ..., N level instruction cache 6-N on sheet, and the sheet upper level data cache 7-1 connecting successively, secondary data high-speed cache 7-2 on sheet ..., N DBMS high-speed cache 7-N on sheet.Similarly, from central processing unit 1 more close to, to the reading speed of high-speed cache, require higher; From central processing unit 1 more away from, the capacity of high-speed cache is also increasing.On sheet, nonvolatile memory 13 can replace shared cache 8 on part or bonding pad, or on sheet, nonvolatile memory 13 also can be divided on sheet on non-volatile command memory 16 and sheet non-volatile data memory 17 to replace part or in conjunction with arbitrary grade of on-chip command high-speed cache or appoint data cache on A-class picture.Still take phase transition storage as example, if high-speed cache on replacing rudimentary is such as sheet upper level instruction cache 6-1 or sheet upper level data cache 7-1, high to reading speed requirement, can adopt the memory cell structure of 2D2R; If high-speed cache on replacing senior is such as N DBMS high-speed cache 7-N on N level instruction cache 6-N or sheet on sheet, high to storage density requirement, can adopt the memory cell structure of 1D1R.

With Cache on Cache and third-grade film on two-stage sheet, introduce for example respectively below.

If system is the von Neumann structure of high-speed cache on two-stage sheet: a kind of specific embodiment, if nonvolatile memory 13 can be read and reach the reading speed of sheet upper level high-speed cache under hypervelocity on sheet, can be replaced part or in conjunction with high-speed cache on original A-class picture; If nonvolatile memory 13 reading speeds are relatively slow but reach the reading speed of second level cache on sheet on sheet, can be replaced part or in conjunction with high-speed cache on original secondary sheet, it replaces structure as shown in figure 10.Wherein, on sheet, Cache 2 comprises second level cache 2-2 on sheet upper level high-speed cache 2-1 and sheet, and on sheet, nonvolatile memory 13 comprises on sheet nonvolatile memory 13-2 on nonvolatile memory 13-1 and sheet.Similarly, take phase transition storage as example, on sheet, nonvolatile memory 13-1 can take the memory cell structure of 2D2R, can under hypervelocity, be read, and on sheet, nonvolatile memory 13-2 can take the memory cell structure of 1D1R, can reach higher storage density.

If nonvolatile memory 13 does not reach the requirement being read under hypervelocity on sheet, can replace part or go up second level cache 2-2 in conjunction with original.As shown in figure 11, wherein Cache 2 comprises second level cache 2-2 on sheet upper level high-speed cache 2-1 and sheet on sheet.Take phase transition storage as example, if high to reading speed requirement, nonvolatile memory 13 can adopt 2D2R memory cell structure; If high to storage density requirement, can adopt 1D1R memory cell structure.

If system is the von Neumann structure of high-speed cache on third-grade film: a kind of specific embodiment, if nonvolatile memory 13 can be read and reach the reading speed of sheet upper level high-speed cache under hypervelocity on sheet, can be replaced part or in conjunction with high-speed cache on original A-class picture; If nonvolatile memory 13 reading speeds are relatively slow but reach the reading speed of second level cache on sheet on sheet, can be replaced part or in conjunction with high-speed cache on original secondary sheet; If nonvolatile memory 13 reading speeds do not reach the reading speed of second level cache on sheet but reach three grades of high-speed caches on sheet and read speed on sheet, can be replaced part or in conjunction with high-speed cache on original third-grade film, its structure as shown in figure 12.Wherein, on sheet, Cache 2 comprises sheet upper level high-speed cache 2-1.Three grades of high-speed cache 2-3 on second level cache 2-2 and sheet on sheet, on sheet, nonvolatile memory 13 comprises nonvolatile memory 13-1 on sheet, nonvolatile memory 13-3 on nonvolatile memory 13-2 and sheet on sheet.Take phase transition storage as example, and on sheet, nonvolatile memory 13-1 can take the memory cell structure of 2D2R; On sheet, nonvolatile memory 13-2 can take the memory cell structure of 1D1R or 2D2R, and on sheet, nonvolatile memory 13-3 can take the memory cell structure of 1D1R.

If nonvolatile memory 13 does not reach the requirement being read under hypervelocity on sheet, can replace or in conjunction with original upper three grades of high-speed cache 2-3, as shown in figure 13, wherein Cache 2 comprises on sheet upper level high-speed cache 2-1, sheet three grades of high-speed cache 2-3 on second level cache 2-2 and sheet on sheet.Take phase transition storage as example, if high to reading speed requirement, it can adopt 2D2R memory cell structure; If high to storage density requirement, can adopt 1D1R memory cell structure.

If system is the Harvard structure of high-speed cache on two-stage sheet, as shown in figure 14, on sheet, nonvolatile memory 13 also can be divided on sheet non-volatile data memory 17 on non-volatile command memory 16 and sheet, on sheet, non-volatile command memory 16 can be read and reach the reading speed of on-chip command Cache 6 under hypervelocity, can be replaced part or in conjunction with original on-chip command Cache 6; If non-volatile data memory 17 has also reached the reading speed of data cache 7 on sheet on sheet, can be replaced part or in conjunction with original upper data cache 7, on sheet, nonvolatile memory 13 also can replace part or form a new mixing on chip shared cache 18 in conjunction with former upper shared cache 8.Wherein, on sheet, Cache 2 comprises on on-chip command Cache 6 and sheet shared cache 8 on data cache 7 and sheet, and on sheet, nonvolatile memory 13 comprises on sheet on non-volatile command memory 16 and sheet on non-volatile data memory 17 and sheet and shares nonvolatile memory 19.Take phase transition storage as example, on sheet, non-volatile command memory 16 can be taked the memory cell structure of 2D2R, can under hypervelocity, be read, on sheet, non-volatile data memory 17 can take the memory cell structure of 2D2R to reach reading speed faster, also can take the memory cell structure of 1D1R to reach higher storage density.On sheet, sharing nonvolatile memory 19 can take the memory cell structure of 1D1R to reach higher storage density.

If on non-volatile command memory 16 or sheet, non-volatile data memory 17 does not reach the requirement being read under hypervelocity on sheet, can only have shared nonvolatile memory 19 on sheet to replace part or go up shared cache 8 in conjunction with former, as shown in figure 15, wherein Cache 2 comprises on on-chip command Cache 6 and sheet shared cache 8 on data cache 7 and sheet on sheet.Take phase transition storage as example, if high to reading speed requirement, on sheet, share nonvolatile memory 19 and can adopt 2D2R memory cell structure; If high to storage density requirement, can adopt 1D1R memory cell structure.

If system is the Harvard structure of high-speed cache on third-grade film, if non-volatile one-level command memory 16-1 can be read and reach the reading speed of sheet upper level command cache 6-1 under hypervelocity on sheet, can be replaced part or in conjunction with original upper level command cache 6-1; If non-volatile level data memory 17-1 has also reached the reading speed of sheet upper level data cache 7-1 on sheet, can be replaced part or in conjunction with original upper level data cache 7-1.If non-volatile secondary command memory 16-2 reading speed is slow but reach the reading speed of secondary command cache 6-2 on sheet on sheet, can be replaced part or be gone up secondary command cache 6-2 in conjunction with original; If non-volatile secondary data storer 17-2 does not reach the reading speed of sheet upper level data cache 7-1 on sheet, can be replaced part or be gone up secondary data Cache 7-2 in conjunction with original.On sheet, share nonvolatile memory 19 and also can replace part or form shared cache 18 on a new mixing tab in conjunction with former upper shared cache 8, structure as shown in figure 16.Wherein, on sheet, Cache 2 comprises sheet upper level command cache 6-1, secondary command cache 6-2 on sheet, sheet upper level data cache 7-1, shared cache 8 on secondary data Cache 7-2 and sheet on sheet.On sheet, nonvolatile memory 13 also comprises non-volatile one-level command memory 16-1 on sheet, non-volatile secondary command memory 16-2 on sheet, non-volatile level data memory 17-1 on sheet, non-volatile secondary data storer 17-2 on sheet, and on sheet, share nonvolatile memory 19.Similarly, take phase transition storage as example, on sheet, non-volatile one-level command memory 16-1 can take non-volatile level data memory 17-1 on the memory cell structure of 2D2R and sheet can take the memory cell structure of 2D2R to reach reading speed faster, and on sheet, on non-volatile secondary command memory 16-2 and sheet, non-volatile secondary data storer 17-2 can take the memory cell structure of 1D1R to reach higher storage density.On sheet, sharing nonvolatile memory 19 can take the memory cell structure of 1D1R to reach higher storage density.

If on non-volatile one-level command memory 16-1 or sheet, non-volatile level data memory 17-1 does not reach the requirement being read under hypervelocity on sheet, can only replace part or in conjunction with shared cache on secondary data high-speed cache and sheet on original upper secondary instruction cache and sheet, as shown in figure 17, wherein, on sheet, Cache 2 comprises sheet upper level command cache 6-1, secondary command cache 6-2 on sheet, sheet upper level data cache 7-1, shared cache 8 on secondary data Cache 7-2 and sheet on sheet.On sheet, nonvolatile memory 13 also comprises non-volatile command memory 16 on sheet, and on sheet, non-volatile data memory 17, and shares nonvolatile memory 19 on sheet.Take phase transition storage as example, if high to reading speed requirement, on sheet, on non-volatile command memory 16 and sheet, non-volatile data memory 17 can adopt 2D2R memory cell structure; If being required to share nonvolatile memory 19 on high sheet, storage density can adopt 1D1R memory cell structure.

In above embodiment, leaving the information in nonvolatile memory 13 on sheet in can be by 14 configuration of system monitoring statistical module, and from central processing unit 1 more close to, its reading speed is also faster, also can save more data or instruction large capacity nonvolatile memory 4 from sheet to be imported to primary memorys 3 time and the power consumption of Cache 2 in importing tablet again; If from central processing unit 1 more away from, its density can become greatly, thus storage more information with accelerate system electrifying startup speed and thermal information loading velocity and save more data or instruction large capacity nonvolatile memory 4 from sheet import primary memorys 3 again in importing tablet 2 wasted works of Cache consume.

No matter von Neumann structure or Harvard structure, os starting mechanism of the present invention is all the same, as shown in figure 18.

Step s11, system monitoring statistical module 14 obtains the step of os starting information;

Step s12 chooses first stage program according to the first setting rule from os starting information, by first stage application configuration to the step in the middle of nonvolatile memory on sheet 13;

Step s13, central processing unit 1 starts the step of first stage program;

Step s14, central processing unit 1 is carried out the step of subordinate phase program.

Also comprise thermal information invocation step, thermal information is divided into thermal information A and thermal information B, and concrete steps are as follows:

Step s21, system monitoring statistical module 14 obtains the step of the thermal information of application program;

Step s22, chooses thermal information A and thermal information A is configured to the step in the middle of nonvolatile memory on sheet 13 according to the second setting rule;

Step s23, central processing unit 1 loads the step of thermal information A;

Step s24, central processing unit 1 loads the step of thermal information B.

Preferably, before execution step s13, also comprise step s123, judge the whether externally step of renewal in nonvolatile memory 4 of first stage program;

If first stage program is externally upgraded in nonvolatile memory 4, from external non-volatile memory 4, obtain in a conventional manner os starting information, complete operation system starts;

If first stage program is not externally upgraded in nonvolatile memory 4, enter step s13.

Preferably, in step s13, be also included in and start in first stage program process, subordinate phase program is imported to the step of Cache 2 on primary memory 3 or sheet simultaneously.

Preferably, after step s13, before step s14, central processing unit 1 completes and starts after first stage program, judges whether the step of Cache 2 on subordinate phase program importing primary memory 3 or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s14.

Preferably, before execution step s23, also comprise step 223, judge the whether externally step of renewal in nonvolatile memory 4 of thermal information A;

If thermal information A externally upgrades in nonvolatile memory 4, from external non-volatile memory 4, obtain thermal information in a conventional manner, complete application program and load;

If thermal information A does not externally upgrade in nonvolatile memory 4, enter step s23.

Preferably, in step s23, be also included in and start in thermal information A process, thermal information B is imported to the step of Cache 2 on primary memory 3 or sheet simultaneously.

Preferably, after step s23, before step s24, central processing unit 1 completes and starts after thermal information A, judges whether the step of Cache 2 on thermal information B importing primary memory 3 or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s24.

Preferably, in step s11, comprise step s111, after system electrifying startup, central processing unit 1 decision operation system enable position, as there being os starting information in nonvolatile memory on chankings 13, enters step s123; If no, from external non-volatile memory 4, obtain in a conventional manner os starting information, complete operation system starts;

Preferably, in step s21, comprise step s211, after system electrifying startup, before processing thermal information, central processing unit 1 judgement thermal information loading position, as having thermal information in nonvolatile memory on chankings 13, enters step s223; From external non-volatile memory 4, obtain thermal information in a conventional manner, complete application program and load;

Preferably, first sets rule is: load module after the system repetition electrifying startup of system monitoring statistical module 14 record one setting-up times, load module is arranged in external non-volatile memory 4, the invoked wherein part that starts most of load module is written on sheet in nonvolatile memory 13 as first stage program, and using the remainder of load module as subordinate phase program.

Preferably, second sets rule is: frequency and thermal information that each application program of system monitoring statistical module 14 record one setting-up times is loaded, thermal information is arranged in external non-volatile memory 4, a wherein part for load module is written on sheet in nonvolatile memory 13 as thermal information A, and using the remainder of load module as thermal information B.

Preferably, system monitoring statistical module 14 every a setting-up time interval to sheet on content in nonvolatile memory 13 upgrade.

After os starting completes, system monitoring statistical module 14 will play a role, in the system through after a while, repeat after electrifying startup, interval can be configured by system monitoring statistical module 14 during this period of time, it can select system to start and to start invoked load module most and be written on sheet in nonvolatile memory 13, this part start-up routine is referred to as first stage program, and the remainder of the operating system of calling when system starts is referred to as subordinate phase program.Due to 13 limited storage space of nonvolatile memory on sheet, system monitoring statistical module 14 can be adjusted the size of first stage program and subordinate phase program as the case may be.When system starts again, the first decision operation system enable position of central processing unit 1 meeting, because the start-up routine starting has most been deposited in nonvolatile memory Unit 13 on sheet, central processing unit 1 is directly carried out the first stage program that starts the operating system from sheet in nonvolatile memory 13.Before starting, central processing unit 1 will judge, if system powers on, invoked operating system first stage program is externally updated in nonvolatile memory 4 and the system monitoring statistical module 14 corresponding first stage program in nonvolatile memory 13 that do not upgrade in time on sheet, central processing unit still starts in a usual manner so, system monitoring statistical module, after study after a while, can be updated on sheet corresponding operating system first stage program in nonvolatile memory 13.If operating system first stage program is not externally upgraded in nonvolatile memory 4, central processing unit 1 is directly carried out and is started the operating system the first stage in nonvolatile memory 13 from sheet so, operating system subordinate phase when simultaneously system is started imports primary memory 3 by external non-volatile memory 4, as Cache 2 on nonvolatile memory on chankings 13 and sheet has independently bus, can also continue subordinate phase primary memory 3 importing tablets in Cache 2.After the operating system first stage starts, whether central processing unit decision operation system subordinate phase imports complete, if still busy, wait for until subordinate phase imports complete, if import completely, central processing unit 1 jumps on primary memory 3 or sheet and in Cache 2, continues executive operating system subordinate phase, until os starting completes.From above-mentioned start-up course, system directly starts in nonvolatile memory 13 from sheet, and os starting subordinate phase is imported to primary memory 3 by external non-volatile memory 4 simultaneously, or and then Cache 2 in importing tablet, compare conventional Starting mode, system toggle speed improves greatly, and power consumption also reduces greatly.

Now give an actual example one as follows.For the sake of simplicity, nonvolatile memory 13 shared bus interfaces on Cache 2 and sheet on sheet, suppose that operating system can be divided into 5 modules according to starting sequencing, i.e. module 1 ', module 2 ', module 3 ', module 4 ', module 5 '.The space size that on sheet, nonvolatile memory 13 can storage system program is limited, and concrete space size can be configured by system monitoring statistical module 14.In a period of time interval, 14 pairs of operating system modules of system monitoring statistical module carry out statistical study, and this period of time interval can configure in system monitoring statistical module 14.Table 1 is the example form of system monitoring statistical module 14 records.

Table 1

First, system monitoring statistical module 14 can consider module 1 ' to deposit on sheet in nonvolatile memory 13, and obviously V_1 is less than the space size of nonvolatile memory 13 on sheet.Central processing unit 1 from sheet in nonvolatile memory 13 read module 1 ' need time N_1, all the other modules import primary memory 3 by external non-volatile memory 4, if N_1 time long enough, all the other all modules can be imported simultaneously, required time is (T_2+T_3+T_4+T_5), if (T_2+T_3+T_4+T_5) be greater than N_1, the two subtracts each other and is the stand-by period, is denoted as Tw.If N_1 is greater than (T_2+T_3+T_4+T_5), i.e. needed wait time not.If (T_2+T_3+T_4+T_5) much larger than N_1, cause waits for too long, system monitoring statistical module 14 can comprehensive various situations draw optimum solution, make stand-by period and system optimization start-up time, such as drawing in read module 1 ', system monitoring statistical module 14 can make stand-by period and system reach optimum start-up time module 2 ' and module 3 ' importing primary memory 3, system Starting mode as shown in figure 19, has been ignored the stand-by period in figure.System powers on and directly from sheet, in nonvolatile memory 13, starts module 1 ', module 2 ' and module 3 ' are imported primary memory 3 from external non-volatile memory 4 simultaneously, after module 1 ' loaded, whether judge module 2 ' and module 3 ' loaded, if loaded, stand-by period Tw=0, central processing unit 1 directly jumps to primary memory 3 and continues to start all the other modules, until system startup is complete, otherwise central processing unit 1 needs to wait for that module 2 ' and module 3 ' loaded jump to primary memory 3 again, and the stand-by period is T_2+T_3-N_1.The process of read module 4 ' and module 5 ' is identical with usual manner.Compare conventional Starting mode, system has been saved from external non-volatile memory 4 module 1 ' start-up time, 2 ', 3 ' imports mistiming the stand-by period of deducting of time of primary memory 3 and central processing unit nonvolatile memory 13 and execution module 1 ' from primary memory 3 from sheet, i.e. (T_1+T_2+T_3)+(C_1-N_1)-Tw.On sheet, nonvolatile memory 13 is as a part for mixing on chip Cache, and its reading speed will be far longer than the reading speed of primary memory, and this part time also can not ignore.System starts power consumption has saved module 1 ' has been imported to the required power consumption P_1 of primary memory 3 from external non-volatile memory 4, and central processing unit 1 nonvolatile memory 13 read modules 1 ' and from the poor PM_1-PN_1 of power consumption of primary memory 3 read modules 1 ' from sheet.In nonvolatile memory 13, the required power consumption of read module will be much smaller than the required power consumption of read module from primary memory 3 from sheet for central processing unit 1, this is because the advantage of nonvolatile memory 13 self is exactly low-power consumption on sheet, and primary memory 3 primary structures are DRAM, need to regularly refresh and could keep data, this needs a large amount of power consumptions, and the module in reading primary memory 3 also will be by Cache 2 in this module importing tablet, and this also can cause extra power consumption.

If the program size sum of module 1 ' and module 2 ' is still less than on sheet the storage space of call operation system when nonvolatile memory 13 storage systems start, system monitoring statistical module 14 can consider module 2 ' also to deposit on sheet in nonvolatile memory 13 so.Central processing unit 1 from sheet in nonvolatile memory 13 read module 1 ' and module 2 ' need time N_1+N_2, all the other modules import primary memory 3 by external non-volatile memory 4, if N_1+N_2 time long enough, all the other all modules can be imported simultaneously, required time is (T_3+T_4+T_5), if (T_3+T_4+T_5) be greater than N_1+N_2, the two subtracts each other and is stand-by period Tw.If N_1+N_2 is greater than (T_3+T_4+T_5), i.e. needed wait time not.If (T_3+T_4+T_5) much larger than N_1+N_2, cause waits for too long, system monitoring statistical module 14 can comprehensive various situations draw optimum solution, make stand-by period and system optimization start-up time, such as drawing in read module 1 ' and module 2 ', system monitoring statistical module 14 can make stand-by period and system reach optimum start-up time module 3 ' and module 4 ' importing primary memory 3, system Starting mode as shown in figure 20, has been ignored the stand-by period in figure.System powers on and directly from sheet, in nonvolatile memory 13, starts module 1 ' and module 2 ', simultaneously by module 3 ', 4 ' imports primary memory 3 from external non-volatile memory 4, after module 2 ' imports, whether judge module 3 ' and module 4 ' import complete, if import complete; Tw=0, central processing unit 1 directly jumps to primary memory 3 and continues to start all the other modules, until system startup is complete, otherwise central processing unit 1 needs to wait for that module 3 ' and module 4 ' import complete primary memory 3, the Tw=T_3+T_4-N_1-N_2 of jumping to again.The process of read module 5 ' is identical with usual manner, and central processing unit 1 first imports primary memory 3 from external non-volatile memory 4 by module 5 ' and in Cache, reads importing tablet.Compare conventional Starting mode, system has been saved from external non-volatile memory 4 module 1 ' start-up time, 2 ', 3 ', 4 ' import the time of primary memory 3 and from sheet mistiming stand-by period of deducting of nonvolatile memory 13 and execution module 1 ' from primary memory 3 and 2 ', i.e. (T_1+T_2+T_3+T_4)+(C_1+C_2-N_1-N_2)-Tw.System starts power consumption has saved central processing unit 1, from external non-volatile memory 4, module 1 ' and module 2 ' has been imported to the required power consumption P_1+P_2 of primary memory 3, and central processing unit 1 nonvolatile memory 13 read modules 1 ' and module 2 ' and from the poor PM_1+PM_2-PN_1-PN_2 of power consumption of primary memory read module 1 ' and module 2 ' from sheet.

If central processing unit 1 time that in nonvolatile memory 13, the time of execution module 1 ' and module 2 ' import primary memorys from external non-volatile memory 4 from sheet is suitable, and the program size summation of module 1 ' and module 3 ' is also less than the remaining free space capacity of nonvolatile memory 13 on sheet, so module 1 ' and module 3 ' being deposited on sheet is simultaneously also a kind of mode in the middle of nonvolatile memory.So system starting process as shown in figure 21, has been ignored the stand-by period in figure.System starts, direct load-on module 1 ' in nonvolatile memory 13 from sheet, and module 2 ' imports primary memorys 3 by external non-volatile memory 4 simultaneously.Module 1 ' is finished, complete if module 2 ' has imported, stand-by period Tw1=0, and central processing unit 1 directly jumps to primary memory 3 load-on modules 2 ', otherwise it is complete just need to wait for that module 2 ' imports, Tw1=T_2-N_1.Module 2 ' is finished and jumps on sheet read module 3 ' in nonvolatile memory 13 again, in the time of read module 3 ', module 4 ' and module 5 ' are imported to primary memorys 3 by external non-volatile memory 4, prerequisite is that module 4 ' and module 5 ' are suitable with the time N_3 of central processing unit 1 read module 3 ' by external non-volatile memory 4 importing primary memory 3 required time T_4+T_5, makes stand-by period Tw2 optimum.Module 3 ' reads complete, complete if module 4 ' and module 5 ' have imported, Tw2=0, and central processing unit 1 directly jumps to primary memory 3 execution modules 4 ', otherwise it is complete just need to wait for that module 4 ' and module 5 ' import, Tw2=T_4+T_5-N_3.Execute module 4 ' execution module 5 ' again, until system startup is complete.Compare conventional Starting mode, system has been saved from external non-volatile memory 4 module 1 ' start-up time, 2 ', 3 ', 4 ', 5 ' import the time of primary memory 3 and from sheet nonvolatile memory 13 deduct again the stand-by period, i.e. (T_1+T_2+T_3+T_4+T_5)+(C_1+C_3-N_1-N_3)-Tw1-Tw2 with the mistiming of execution module from primary memory 31 ' and module 3 '.System starts power consumption has saved central processing unit 1, from external non-volatile memory 4, module 1 ' and module 3 ' has been imported to the required power consumption P_1+P_3 of primary memory 3, and central processing unit 1 nonvolatile memory 13 read modules 1 ' and module 3 ' and from the poor PM_1+PM_3-PN_1-PN_3 of power consumption of primary memory 3 read modules 1 ' and module 3 ' from sheet.

In like manner, all the other possible storage modes are no longer described.In all possible storage modes, system monitoring statistical module 14 can be drawn and is being no more than under the prerequisite of nonvolatile memory 13 storage spaces on sheet by analysis, the modules that Optimizing Configuration System calls while starting, make the system wait time, system starts T.T., the indices optimizations such as the power consumption consuming in system starting process.Such as system monitoring statistical module 14 show that by analysis it is optimum solution in nonvolatile memory 13 that module 1 ' and module 2 ' are deposited on sheet.

In the present invention, os starting mode is compared with routine operation system Starting mode, and toggle speed is quicker, starts power consumption lower, and more conventional Starting mode has obvious advantage in speed and power consumption.

The self-study mechanism of system the use habit that meets user are also mainly manifested in system loads application program.In hot application program, the most frequent invoked program part is referred to as " thermal information ".The system monitoring statistic unit statistics accessed frequency of each program in a period of time, records the thermal information in each program, and is stored on sheet in nonvolatile memory 13.After a period of time, the start-up course of application program will be accelerated, the spatial content that can store application program as nonvolatile memory on chankings 13 is enough large, certain thermal information in hot application program all can be stored in so on sheet in nonvolatile memory 13, when carrying out hot application program and call thermal information, user can directly from sheet, in nonvolatile memory 13, call, need not from external non-volatile memory 4, import again primary memory 3 again in importing tablet in Cache 2, greatly accelerate speed, reduced power consumption.If nonvolatile memory 13 limited storage space on sheet, can not deposit certain thermal information completely, this just need to be divided into thermal information thermal information A and thermal information B, thermal information A starts invoked part most in thermal information, suppose in nonvolatile memory 13, can only deposit thermal information A on sheet, system monitoring statistical module 14 can be adjusted the size of thermal information A and thermal information B as the case may be.The process of hot application call thermal information as shown in figure 22.System call thermal information can first judge executing location, if stored thermal information A on sheet in nonvolatile memory 13, before calling thermal information A, central processing unit 1 will judge, the system monitoring statistical module 14 corresponding information in nonvolatile memory 13 that do not upgrade in time on sheet if thermal information A is externally updated in nonvolatile memory 4, central processing unit still calls thermal information in a usual manner so, system monitoring statistical module 14, after study after a while, can be updated on sheet corresponding information in nonvolatile memory 13.If thermal information A does not externally upgrade in nonvolatile memory 4, central processing unit 1 is directly carried out thermal information A from sheet in nonvolatile memory 13 so, thermal information B is written into primary memory 3 from external non-volatile memory 4 simultaneously.As nonvolatile memory 13 on Cache on chankings 2 and sheet has bus separately, also can be again by Cache 2 in thermal information B importing tablet.Whether unloading is complete after thermal information A is finished, can to judge thermal information B, if jump on primary memory 3 or sheet, carries out thermal information B until program loaded in Cache 2; If need, do not wait for that thermal information B unloading is complete.The present invention can reduce the allocating time of thermal information in hot application program greatly, reduces the power consumption that thermal information is constantly imported into Cache 2 on sheet.

Now give an actual example two as follows.As shown in table 2 is the example form that system monitoring statistical module 14 real time record application programs are loaded situation.Suppose that on sheet, nonvolatile memory 13 storage spaces are enough large, can all deposit the thermal information in certain application program.The "as if" statistics cycle is one week, and this timing statistics can be configured in system monitoring statistical module 14.The application program that user may load is from application A, and application program B is to application program N, and each application program comprises several program blocks, program block 1, and program block 2 is to program block n.The frequency record that each application program is loaded is F_A, F_B ..., F_N, each program block size in application program N is recorded as L_N_1, L_N_2 ..., L_N_n, in application program N, the invoked number of times of each program block is recorded as T_N_1, T_N_2 ..., T_N_n.

Table 2

Under system before electricity, system can be carried out specific computing to the program block of all application programs of record, such as calculating the weight of each program block in each application program according to formula (a*F_N+b*L_N_n+c*T_N_n), a wherein, b and c are the weight coefficients of each parameter, can in system monitoring statistical module 14, be configured by system.After 14 computings of system monitoring statistical module, result of calculation is analyzed, judge which application program is the most often loaded, judge that the invoked weight of which program block is maximum, which then determine unloading to nonvolatile memory 13 on sheet, which is stored in the information in nonvolatile memory 13 on sheet should wipe, and which is stored in the information in nonvolatile memory 13 on sheet and should continues to preserve.For example, on sheet, nonvolatile memory 13 can be deposited two program blocks, has deposited A1 program block.A period of time statistical monitoring, according to formula (a*F_N+b*L_N_n+c*T_N_n), process the program block in each application program, and be arranged as from big to small A2 according to weight, B2, A1, B1 ..., system monitoring statistical module 14 can be wiped program block A1 from sheet in nonvolatile memory 13, then write-in program piece A2 and B2.Again for example, concerning some hot application programs, its implementation is program block A, program block B, program block A, program block B, program block C, program block A, program block D and program block B, system monitoring statistical module 14 trace routine piece A and program block B within a period of time are thermal information, are stored on sheet in nonvolatile memory 13.The process that system is carried out this hot application program as shown in figure 23.Central processing unit 1 is executing block A and program block B in nonvolatile memory 13 from sheet directly, carries out until hot application program loaded in importing tablet in only need to importing primary memory 3 from external non-volatile memory 4 when executing block C and program block D in high-speed memory again.If there is no nonvolatile memory 13 on sheet, execute program block C again during executing block A, although program block A imports Cache 2 on primary memory 3 and sheet by external non-volatile memory 4 before, therefore but the program block A on primary memory 3 and sheet in Cache 2 may be replaced by program block B or program block C, have to again to import primary memorys 3 by external non-volatile memory 4 and in Cache 2, carry out again in importing tablet again.On sheet, nonvolatile memory 13 can obviously reduce the number of times that repeats importing, thereby greatly reduces power consumption.Visible minimizing in whole hot application program implementation imports Cache 2 required times and power consumption on primary memory 3 and sheet from external non-volatile memory 4, thereby accelerates the toggle speed of hot application program, reduces power consumption.System monitoring statistical module 14 available hardware, application program or operating system nucleus are realized.Accordingly, in the application program that system is the most frequently accessed user according to user's use habit, the most normal invoked hot program is stored to nonvolatile memory 13 on sheet, when next time is called central processing unit 1 can be directly from sheet nonvolatile memory 13 read, reduce from external non-volatile memory 4 and import primary memorys 3 power consumption of Cache 2 importing tablet again.

System monitoring statistical module in the present invention has the ability of self study, without user, participates in directly, is a kind of very intelligent system.

Be no matter that certain program block in a certain module of os starting information or hot application program is stored on sheet in nonvolatile memory 13, system monitoring statistical module 14 all will carry out some configurations to this part program.For example program A and program B are two adjacent modules, and program A is deposited to nonvolatile memory 13 on sheet, in executive routine A, program B need to be imported in primary memory 3 from external non-volatile memory 4.As follows to the configuration of program A so: before program A starts, to increase decision instruction, the enable position of determining program A; When program A finishes, increase some customizing messages, such as whether trace routine B imports completely, if do not have, central processing unit 1 enters waiting status, if import completely, central processing unit 1 jumps to executive routine B in primary memory 3.Only have these programs are configured, central processing unit 1 could carry out in order when system starts or while loading thermal information.

In the process that powers on or shut down in system, system is carried out intelligent learning renewal just as human brain.System monitoring statistical module 14 generates Statistical Analysis Reports, judges which program is that program that access frequency is the highest should deposit on sheet in nonvolatile memory 13.If these programs have been stored on sheet in nonvolatile memory 13, they should remain unchanged; If these programs are not therein, we should importing tablet in nonvolatile memory 13.Simultaneously some leave the program in nonvolatile memory 13 on sheet in and should be wiped free of or be substituted.Along with the time that user uses is longer, the program that user the most often uses can directly start in nonvolatile memory 13 from sheet, and speed is more and more faster, and power consumption is more and more lower, more and more meets user's use habit.

Although nonvolatile memory 13 has the advantages such as low leakage power consumption, high density on sheet, but it is being restricted aspect permanance (endurance) and data retentivity (retention), that is to say on the one hand to the number of times writing in nonvolatile memory 13 on sheet limited, take phase transition storage as example, and this order of magnitude is greatly about 10 ⁶inferior; The time that data on the opposing party's dough sheet in nonvolatile memory 13 can be preserved is also limited, take phase transition storage as example, and this time is generally at 7-10.In data retentivity problem, can solve like this: when central processing unit 1 reads on sheet the information in nonvolatile memory 13, the last running time that writes this information of first judgement, if the time interval has surpassed nonvolatile memory 13 data hold times on sheet, central processing unit 1 abandons in nonvolatile memory 13, reading this information from sheet, but read from external non-volatile memory 4, and make on sheet in nonvolatile memory 13 this information invalid.If the time interval is less than nonvolatile memory 13 data hold times on sheet, central processing unit 1 just reads this information on sheet in nonvolatile memory 13 so.

In endurance issues, can solve like this: the phase transition storage of take is considered a kind of extreme case as example, system per minute will be restarted once in power-on and power-off, if system starts each time, close all and can in phase transition storage, write primary information, 10 years domestic demands can reach 10*365*24*60=5.256*10 to the number of times writing in phase transition storage ⁶inferior, this has obviously surpassed the limit of phase transition storage.For addressing this problem, the present invention can be in the process setting condition of system intelligence study, and be more than or equal to T2/N the interval time (T1) that repeats power-on and power-off when system, and wherein, T2 is system service time, and unit is minute; When N is the erasable number of times minute of described upper nonvolatile memory 13, system monitoring statistical module 14 just can upgrade the content in nonvolatile memory on sheet 13; For example, if system repeated priming loads, be less than 5 minutes effective time, system monitoring statistical module 14 will can not carry out intelligent learning to this startup situation.Only have system repeated priming to load and be greater than 5 minutes effective time, monitoring statistic unit just can carry out statistical study, and system is just carried out intelligent learning.In 10 years, to the number of times writing in phase transition storage, can reach 10*365*24*60/5=1*10 at most ⁶inferior, this is the scope that can accept.

System powers at every turn and can realize quick startup, also can accelerate the opening speed of the real interested application program of user, greatly improves the experience sense that different user is used distinct program.Without user, participate in realizing intelligent learning, along with system is more and more longer service time, it is more and more faster, more and more efficient that system can be worked.

System monitoring statistical module 14 available hardware of the present invention, or software is realized as operating system nucleus etc.

The foregoing is only preferred embodiment of the present invention; not thereby limit embodiments of the present invention and protection domain; to those skilled in the art; should recognize that being equal to that all utilizations instructions of the present invention and diagramatic content done replace and the resulting scheme of apparent variation, all should be included in protection scope of the present invention.

Claims

1. a quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function, described SOC (system on a chip) (5) comprises Cache (2) on central processing unit (1), sheet, it is characterized in that,

Described SOC (system on a chip) also configures a system monitoring statistical module (14), and described system monitoring statistical module (14) obtains the thermal information of os starting information and/or application program, configures and is loaded in described upper nonvolatile memory (13); Preferably, described system monitoring statistical module (14) upgrades the described content going up in nonvolatile memory (13) every a setting-up time interval;

Preferably, described upper nonvolatile memory adopts phase transition storage, and the storage unit of described phase transition storage adopts the structure based on a diode and a phase change resistor or adopts the structure based on two diodes and two phase change resistors;

Preferably, described system monitoring statistical module (14) comprises a counting module, a judge module, and the os starting information that described counting module loads when system is started at every turn is at first added up; Described judge module is set rule according to first and is chosen first stage application configuration to nonvolatile memory (13) described from described os starting information; And/or described counting module is added up the loading frequency of each application program, described judge module is set rule according to second and from the thermal information of application program, is chosen thermal information A configuration to described upper nonvolatile memory (13).

2. a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function according to claim 1, is characterized in that, described upper Cache (2) comprises high-speed cache on the sheet that at least N level connects successively, and wherein, N is more than or equal to 1; Described at least one on sheet high-speed cache by described upper nonvolatile memory (13), replaced or described at least one on sheet high-speed cache in conjunction with nonvolatile memory (13) on sheet described in.

3. a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function according to claim 1, it is characterized in that, described upper Cache (2) comprises on on-chip command Cache (6), sheet shared cache (8) on data cache (7), sheet; Described mixing on chip Cache (15) comprises mixing on chip shared cache (18), and described mixing on chip shared cache (18) comprises on described upper shared cache (8) and sheet shares nonvolatile memory (19); Described mixing on chip shared cache (18) is connected with data cache (7) on described on-chip command Cache (6) and sheet respectively.

4. a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function according to claim 3, is characterized in that, described upper nonvolatile memory (13) comprises the described upper nonvolatile memory (19) of sharing; Described upper nonvolatile memory (13) also comprises on sheet non-volatile data memory (17) on non-volatile command memory (16), sheet; Described upper non-volatile command memory (16) replaces described on-chip command Cache (6) with described on-chip command Cache (6) combination or described upper non-volatile command memory (16); Described upper non-volatile data memory (17) replaces described upper data cache (7) with described upper data cache (7) combination or described upper non-volatile data memory (17);

Preferably, described on-chip command Cache (6) comprises the on-chip command high-speed cache that at least N level connects successively; Correspondingly, described upper data cache (7) comprises data cache on the sheet that at least N level connects successively; Wherein, N is more than or equal to 1; Go up non-volatile command memory (16) combination or replace a described on-chip command high-speed cache at least one described; Go up non-volatile data memory (17) combination or replace one described upper data cache at least one described.

5. a method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function, is characterized in that, is applied to a kind of quick startup low-power consumption computing machine SOC (system on a chip) with self-learning function claimed in claim 1; Comprise,

Step s14, central processing unit (1) is carried out the step of subordinate phase program;

Step s24, central processing unit (1) loads the step of thermal information B;

Preferably, described system monitoring statistical module (14) upgrades the described content going up in nonvolatile memory (13) every a setting-up time interval;

Preferably, after step s13, before step s14, central processing unit (1) completes and starts after described first stage program, whether the step that judges Cache (2) on described subordinate phase program importing primary memory (3) or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s14;

Preferably, in step s13, be also included in and start in described first stage program process, subordinate phase program is imported to the step of Cache (2) on primary memory (3) or sheet simultaneously;

Preferably, in step s23, be also included in and start in described thermal information A process, thermal information B is imported to the step of Cache (2) on primary memory (3) or sheet simultaneously;

6. a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function according to claim 5, it is characterized in that, before execution step s13, also comprise step s123, judge the whether externally middle step of upgrading of nonvolatile memory (4) of first stage program;

If first stage program is not externally upgraded in nonvolatile memory (4), enter step s13;

7. a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function according to claim 5, it is characterized in that, before execution step s23, also comprise step s223, judge the whether externally middle step of upgrading of nonvolatile memory (4) of thermal information A;

If thermal information A does not externally upgrade in nonvolatile memory (4), enter step s23;

8. a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function according to claim 5, it is characterized in that, after step s23, before step s24, central processing unit (1) completes and starts after described thermal information A, whether the step that judges Cache (2) on described thermal information B importing primary memory (3) or sheet is finished, if be not finished, continues to wait for; If be finished, enter step s24.

9. a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function according to claim 5, it is characterized in that, described first sets rule is: the system that described system monitoring statistical module (14) records a setting-up time repeats load module after electrifying startup, described load module is arranged in external non-volatile memory (4), the invoked wherein part that starts most of described load module is written in nonvolatile memory on sheet (13) as first stage program, and using the remainder of described load module as described subordinate phase program.

10. a kind of method of work with the quick startup low-power consumption computing machine SOC (system on a chip) of self-learning function according to claim 5, it is characterized in that, described second sets rule is: described system monitoring statistical module (14) records frequency and the thermal information that each application program of a setting-up time is loaded, described thermal information is arranged in external non-volatile memory (4), a wherein part for described load module is written in nonvolatile memory on sheet (13) as thermal information A, and using the remainder of described load module as described thermal information B.