CN103592827A - Method used for removing photoresist layer after high-dosage ion implantation - Google Patents
Method used for removing photoresist layer after high-dosage ion implantation Download PDFInfo
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- CN103592827A CN103592827A CN201210292492.7A CN201210292492A CN103592827A CN 103592827 A CN103592827 A CN 103592827A CN 201210292492 A CN201210292492 A CN 201210292492A CN 103592827 A CN103592827 A CN 103592827A
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Abstract
The invention discloses a method used for removing a photoresist layer after high-dosage ion implantation. The method comprises following steps: a protection layer, a mask layer and the photoresist layer are formed on a semiconductor substrate successively; patterning of the photoresist layer is realized so as to determine an ion implantation zone, and realize exposure of a part of the mask layer; the exposed part of the mask layer is removed via wet method; ion implantation on the semiconductor substrate is performed; the mask layer between the protection layer and the protection layer is further removed via wet method so as to realize exposure of the interior zone of the protection layer; and the protection layer is removed via wet method. The method is capable of removing the protection layer completely via the interior zone after high-dosage ion implantation in a wet etching step; and compared with existing technology, an ashing step in an oxygen-containing atmosphere is avoided; so that no damages on wafers are caused.
Description
Technical field
The present invention relates to semiconductor fabrication process, relate in particular to a kind of method of removing the photoresist layer after high dose ion is injected.
Background technology
At present, integrated circuit from each chip of the sixties only tens devices develop on each present chip and can comprise approximately 1,000,000,000 devices, integrated circuit why can develop rapidly, very crucial effect has been played in the support of photoetching technique.Because it has directly determined the physical size of single semiconductor devices, so the level of photoetching technique has become one of most important factor determining semiconductor devices integrated level.
The basic technology of photoetching technique generally includes gluing, exposure and the large step of development three.The object of coating technique be wafer surface set up thin and even, do not have a defective photoresist layer.Exposure is by exposure lamp or other radiating light sources, the figure on photomask to be transferred on photoresist layer.After exposure, device or circuitous pattern are recorded on photoresist layer with the form of exposure and unexposed area.The pattern of post-develop mask is just fixed on photoresist layer.
After photoetching process, can photoresist layer be that mask carries out etching technics or ion implantation technology.
After wet etching, dry etching or Implantation, the photoresist of wafer surface all needs to remove.
Photoresist layer be one deck organic matter layer its through being usually used in the manufacture of integrated circuit, it can with an organic solvent, remove such as acetone, 1-METHYLPYRROLIDONE (NMP) etc.But after the ion implantation technology step of high dose, it is difficult to remove by above method.
In prior art, also there is the trial that the photoresist layer after the Implantation step at high dose is removed.For example use the method for oxygen-containing gas ashing photoresist layer and wet etching erosion.The chemical solvent that wherein wet etching erosion is used comprises the potpourri (Sulfuric-peroxide mixture(SPM) of sulfuric acid and hydrogen peroxide) or NMP.But the surface of wafer can be subject to the infringement of oxygen-containing gas when removing photoresist by this method, in addition because LDD region is very close to the surface of wafer, so such infringement need to be avoided.
Also there is the trial of the photoresist after the Implantation that uses the SPM solution with high volume ratio to remove high dose.But the method is grown, is needed very high temperature of reaction and produce little effect the removal of photoresist layer is consuming time.So need a kind of method that photoresist after high dose ion is injected thoroughly can be removed.
Summary of the invention
In view of above problem, the invention provides a kind of method of removing the photoresist layer after high dose ion is injected, comprise step: a) in Semiconductor substrate, form successively protective seam, mask layer and photoresist layer; B) described in patterning photoresist layer to define mask layer described in Implantation region expose portion; C) wet method is removed the mask layer of described exposure; D) described substrate is carried out to Implantation; E) mask layer of further wet method removal between protective seam and described photoresist layer is to expose the interior zone of described photoresist layer; F) wet method is removed described photoresist layer.
Further, it is characterized in that using nitride to form described protective seam,
Further, the protective seam that it is characterized in that described formation has thickness 10-20 dust.
Further, it is characterized in that using oxide to form described mask layer,
Further, the method that it is characterized in that described formation mask layer is LTCVD,
Further, the mask layer that it is characterized in that described formation has thickness 200-300 dust.
Further, it is characterized in that using DHF execution step c) and step e) in the wet method removal of mask layer.
Further, it is characterized in that step c) the middle 100:1DHF of use.
Further, it is characterized in that step e) the middle 300:1DHF of use, the reaction time is 40 seconds.
Further, it is characterized in that using SPM execution step f) in the wet method of photoresist layer remove, temperature of reaction is 125 degrees Celsius.
Further, characterized by further comprising at step f) afterwards, wet method is removed described mask layer and described protective seam.
Further, it is characterized in that using H3PO4 execution step f) the wet method removal of mask layer afterwards, temperature of reaction is 160 degrees Celsius.
Further, it is characterized in that using DHF to carry out described step f) the wet method removal of protective seam afterwards.
Further, it is characterized in that described wet method is removed carries out in same wet process board.
The present invention can be in a wet etch step be subject to photoresist that high dose ion injects by its interior zone thoroughly remove, owing to having omitted in prior art the step of ashing in oxygen-containing atmosphere, so can not cause damage to wafer.
Thereby the present invention also has advantages of a plurality of steps that can carry out described wet etching erosion and wet method removal under lower temperature conditions and in a wet process board, carries out minimizing carrying wafers number of times.
Accompanying drawing explanation
Fig. 1-4th, the device profile map of each processing step of the present invention.
Embodiment
In the following description, a large amount of concrete details have been provided to more thorough understanding of the invention is provided.Yet, it will be apparent to one skilled in the art that the present invention can be implemented without one or more these details.In other example, for fear of obscuring with the present invention, for technical characterictics more well known in the art, be not described.
In order thoroughly to understand the present invention, will detailed step be proposed in following description, so that how explanation the present invention effectively removes photoresist layer after high dose ion injection and not hurtful to wafer surface.Obviously, execution of the present invention is not limited to the specific details that the technician of semiconductor applications has the knack of.Preferred embodiments of the present invention is described in detail as follows, yet except these are described in detail, the present invention can also have other embodiments.
Should be understood that, when using in this manual term " to comprise " and/or when " comprising ", it indicates and has described feature, integral body, step, operation, element and/or assembly, but do not get rid of, do not exist or add one or more other features, integral body, step, operation, element, assembly and/or their combination next, in connection with accompanying drawing, more intactly describing the present invention
With reference to Fig. 1.Semiconductor substrate 200 is provided, described substrate can be at least one in following mentioned material: stacked SiGe (S-SiGeOI) and germanium on insulator SiClx (SiGeOI) etc. on stacked silicon (SSOI), insulator on silicon, silicon-on-insulator (SOI), insulator, in described substrate, can there is doped region and/or isolation structure, described isolation structure be shallow trench isolation from (STI) structure or selective oxidation silicon (LOCOS) isolation structure etc., in figure, omit.Then on this substrate, form successively protective seam 201 and the mask layer 202 with stack architecture.Wherein can be by comprising chemical vapour deposition technique (CVD); as low temperature chemical vapor deposition (LTCVD), low-pressure chemical vapor deposition (LPCVD), fast thermal chemical vapor deposition (LTCVD), plasma activated chemical vapour deposition (PECVD); also can use such as the general similarity method such as sputter and physical vapour deposition (PVD) (PVD) and form this protective seam 201 with SiN; the preferred low temperature chemical vapor deposition (LTCVD) that uses forms, and it can have the thickness of 10-20 dust.Can be by comprising chemical vapour deposition technique (CVD), as low temperature chemical vapor deposition (LTCVD), low-pressure chemical vapor deposition (LPCVD), fast thermal chemical vapor deposition (LTCVD), plasma activated chemical vapour deposition (PECVD), also can use such as the general similarity method such as sputter and physical vapour deposition (PVD) (PVD) and form this mask layer 202 with SiO2, the preferred low temperature chemical vapor deposition (LTCVD) that uses forms, and it can have the thickness of 200-300 dust.
Then at the upper formation photoresist layer 203 of mask layer.Can also comprise the step that forms antireflecting coating (ARC), can also first form bottom antireflective coating (BARC) (not shown) on hard mask layer 202, can form BARC layer with TiN or SiN, and then form photoresist layer on this BARC layer; Or first form photoresist layer 203 on hard mask layer 202, then on this photoresist layer, form the step of top anti-reflection coating (TARC) (not shown).The method forming can be the method for spin coating.
The step that can also aim at, the Semiconductor substrate then this to photoresist is placed in exposure sources and exposes with the step of patterning photoresist layer and the step of baking etc., and exposes a part of mask layer 202.
Referring to Fig. 2.Execution dilution HF(DHF) step of removing, this step can remove the mask layer of exposed SiO2 make its part to recess between photoresist layer and protective seam 201.Can be to remove with 100:1DHF, the time of processing can be set to 20-50 second.
Then carry out the step of Implantation.Can be the Implantation that forms raceway groove, bag shape injection region, lightly-doped source drain electrode and source drain etc.The ion injecting rests on the position near photoresist layer surface, makes it have very hard surface, referring to the appropriate section of the photoresist layer 203 shown in Fig. 2.
Referring to Fig. 3.Wafer is carried out to DHF again and remove technique further to remove the part mask layer 202 between protective seam and photoresist layer.Select in one embodiment 300:1DHF, the reaction time is 40 seconds, further with the mask layer of the speed etching SiO2 of 103 A/min of clocks make its further recessed (pull back) between photoresist layer and protective seam 201, expose inner photoresist layer.The ion injecting due to great majority rests on the position near photoresist layer surface, make the surface of photoresist layer there is very hard character, but the interior zone of photoresist layer, in above embodiment, by removing the interior zone of the photoresist layer that the mask layer of SiO2 exposes, still there is softer character, referring to the appropriate section of the photoresist layer 203 shown in Fig. 3.
With reference to Fig. 4.Remove the step of photoresist layer.In the present invention, to the wafer of processing through above-mentioned steps carry out hot sulfuric acid with or potpourri (SPM) the removal technique of hydrogen peroxide, the temperature of its reaction is about 125 degrees Celsius.Can easily by thering is the photoresist inside of more soft matter, photoresist layer be removed.
Then can also comprise the step of residual mask layer 202 and protective seam 201 removals.
In one embodiment of the invention, again carry out the mask layer that DHF technique removes remaining SiO2.
Then use H3PO4 to remove the protective seam of SiN, the temperature of reaction of this step is about 160 degrees Celsius.
The method of removal photoresist layer of the present invention is full wet method (all-wet), does not need the plasma treatment process such as ashing.Especially, the method for removal photoresist layer of the present invention can be carried out in same wet process board, and the step of above-mentioned removal mask layer, protective seam and photoresist layer can be carried out in same wet process board, thereby reduces the number of times to carrying wafers.
Therefore, according to the method for removal photoresist of the present invention, the photoresist that can reduce wafer surface is residual, and then effectively improves the performance of semiconductor devices.
The present invention is illustrated by above-mentioned embodiment, but should be understood that, above-mentioned embodiment is the object for giving an example and illustrating just, but not is intended to the present invention to be limited within the scope of described embodiment.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-mentioned embodiment, according to instruction of the present invention, can also make more kinds of variants and modifications, these variants and modifications all drop in the present invention's scope required for protection.Protection scope of the present invention is defined by the appended claims and equivalent scope thereof.
Claims (14)
1. a method of removing the photoresist layer after high dose ion is injected, comprises step:
A) in Semiconductor substrate, form successively protective seam, mask layer and photoresist layer;
B) described in patterning photoresist layer to define mask layer described in Implantation region expose portion;
C) wet method is removed the mask layer of described exposure;
D) described substrate is carried out to Implantation;
E) mask layer of further wet method removal between protective seam and described photoresist layer is to expose the interior zone of described photoresist layer;
F) wet method is removed described photoresist layer.
2. method according to claim 1, is characterized in that using nitride to form described protective seam.
3. method according to claim 1, is characterized in that the protective seam of described formation has thickness 10-20 dust.
4. method according to claim 1, is characterized in that using oxide to form described mask layer.
5. method according to claim 1, the method that it is characterized in that described formation mask layer is LTCVD.
6. method according to claim 1, is characterized in that the mask layer of described formation has thickness 200-300 dust.
7. method according to claim 1, is characterized in that using DHF execution step c) and step e) in the wet method removal of mask layer.
8. method according to claim 4, is characterized in that step c) the middle 100:1DHF that uses.
9. method according to claim 4, is characterized in that step e) the middle 300:1DHF that uses, the reaction time is 40 seconds.
10. method according to claim 1, is characterized in that using SPM execution step f) in the wet method of photoresist layer remove, temperature of reaction is 125 degrees Celsius.
11. methods according to claim 1, characterized by further comprising at step f) afterwards, wet method is removed described mask layer and described protective seam.
12. methods according to claim 11, is characterized in that using H3PO4 execution step f) the wet method removal of mask layer afterwards, temperature of reaction is 160 degrees Celsius.
13. methods according to claim 11, is characterized in that using DHF to carry out described step f) the wet method removal of protective seam afterwards.
14. according to the method described in claim 1 or 11, it is characterized in that described wet method is removed to carry out in same wet process board.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108305831A (en) * | 2018-02-09 | 2018-07-20 | 武汉新芯集成电路制造有限公司 | The minimizing technology of photoresist after a kind of injection of energetic ion |
Citations (5)
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| US6024887A (en) * | 1997-06-03 | 2000-02-15 | Taiwan Semiconductor Manufacturing Company | Plasma method for stripping ion implanted photoresist layers |
| CN101211125A (en) * | 2006-12-25 | 2008-07-02 | 中芯国际集成电路制造(上海)有限公司 | Photoresist removeing method |
| CN101308335A (en) * | 2007-05-15 | 2008-11-19 | 联华电子股份有限公司 | Method for removing photoresist layer and manufacture method of semiconductor element using the method |
| WO2011080023A2 (en) * | 2009-12-21 | 2011-07-07 | International Business Machines Corporation | Spin-on formulation and method for stripping an ion implanted photoresist |
| CN102376552A (en) * | 2010-08-24 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Method for preventing grid electrode from damage in ion implantation process |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6024887A (en) * | 1997-06-03 | 2000-02-15 | Taiwan Semiconductor Manufacturing Company | Plasma method for stripping ion implanted photoresist layers |
| CN101211125A (en) * | 2006-12-25 | 2008-07-02 | 中芯国际集成电路制造(上海)有限公司 | Photoresist removeing method |
| CN101308335A (en) * | 2007-05-15 | 2008-11-19 | 联华电子股份有限公司 | Method for removing photoresist layer and manufacture method of semiconductor element using the method |
| WO2011080023A2 (en) * | 2009-12-21 | 2011-07-07 | International Business Machines Corporation | Spin-on formulation and method for stripping an ion implanted photoresist |
| CN102376552A (en) * | 2010-08-24 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Method for preventing grid electrode from damage in ion implantation process |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108305831A (en) * | 2018-02-09 | 2018-07-20 | 武汉新芯集成电路制造有限公司 | The minimizing technology of photoresist after a kind of injection of energetic ion |
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