CN103579255A - Storage unit and forming method thereof - Google Patents
Storage unit and forming method thereof Download PDFInfo
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- CN103579255A CN103579255A CN201310503602.4A CN201310503602A CN103579255A CN 103579255 A CN103579255 A CN 103579255A CN 201310503602 A CN201310503602 A CN 201310503602A CN 103579255 A CN103579255 A CN 103579255A
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- assembled monolayer
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Abstract
The invention discloses a storage unit and a forming method thereof. The storage unit comprises a substrate, a self-assembling monomolecular layer and a graphene film. The self-assembling monomolecular layer is located on the substrate, the side, close to the substrate, of the self-assembling monomolecular layer comprises a silica group, the side, away from the substrate, of the self-assembling monomolecular layer comprises an amino group, and the graphene film is located on the self-assembling monomolecular layer. The storage unit has the advantages of being high in transparency, flexible and bendable.
Description
Technical field
The invention belongs to memory device field, be specifically related to a kind of memory cell and forming method thereof.
Background technology
Existing nonvolatile memory, as flash memory, is forming the floating boom of storing electronics on the semiconductor of the unidirectional conduction of electric current between source electrode and drain electrode, and data are 0 or 1 to depend in floating boom, whether to store electronics.This type of memory, based on silicon, is difficult to realize the new demand of transparence, flexibility.
Summary of the invention
The present invention is intended at least solve one of technical problem existing in prior art.For this reason, one object of the present invention is to propose a kind of memory cell.Another object of the present invention is to propose a kind of formation method of memory cell.
To achieve these goals, the memory cell of the embodiment of first aspect according to the present invention, comprising: substrate; Self assembled monolayer, described self assembled monolayer is positioned on described substrate, and a side of the contiguous described substrate of described self assembled monolayer contains siloxy, and described self assembled monolayer contains amino away from a side of described substrate; And graphene film, described graphene film is positioned on described self assembled monolayer.
According to the memory cell of the embodiment of the present invention, have advantages of that transparency is high, flexible.
In addition, according to the memory cell of the embodiment of the present invention, also there is following additional technical feature:
In one embodiment of the invention, described substrate is alundum (Al2O3), silicon dioxide or hafnium oxide.
In one embodiment of the invention, described self assembled monolayer is that the self assembly of 3-aminopropyl triethoxysilane obtains unimolecule stratiform structure.
In one embodiment of the invention, described self assembled monolayer thickness is 1-2nm.
In one embodiment of the invention, described graphene film is single-layer graphene film.
To achieve these goals, according to the present invention, the formation method of the memory cell of the embodiment of second aspect, comprises the following steps: substrate is provided; On described substrate, form self assembled monolayer, a side of the contiguous described substrate of described self assembled monolayer contains siloxy, and described self assembled monolayer contains amino away from a side of described substrate; With on described self assembled monolayer, form graphene film.
According to the formation method of the memory cell of the embodiment of the present invention, the memory cell preparing has advantages of that transparency is high, flexible.
In addition, according to the memory cell of the embodiment of the present invention, also there is following additional technical feature:
In one embodiment of the invention, described substrate is alundum (Al2O3), silicon dioxide or hafnium oxide.
In one embodiment of the invention, described self assembled monolayer is that the self assembly of 3-aminopropyl triethoxysilane obtains unimolecule stratiform structure.
In one embodiment of the invention, described self assembled monolayer thickness is 1-2nm.
In one embodiment of the invention, described graphene film is single-layer graphene film.
Additional aspect of the present invention and advantage in the following description part provide, and part will become obviously from the following description, or recognize by practice of the present invention.
Accompanying drawing explanation
Above-mentioned and/or additional aspect of the present invention and advantage accompanying drawing below combination obviously and is easily understood becoming the description of embodiment, wherein:
Fig. 1 is according to the structural representation of the memory device of the embodiment of the present invention; And
Fig. 2 is according to the flow chart of the formation method of the memory device of the embodiment of the present invention.
Embodiment
Describe embodiments of the invention below in detail, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has the element of identical or similar functions from start to finish.Below by the embodiment being described with reference to the drawings, be exemplary, be intended to for explaining the present invention, and can not be interpreted as limitation of the present invention.
As shown in Figure 1, according to the memory cell of the embodiment of the present invention, can comprise: substrate 10, self assembled monolayer 20 and graphene film 30.Wherein, self assembled monolayer 20 is positioned on substrate 10.One side of self assembled monolayer 20 adjacent substrate 10 contains siloxy, and self assembled monolayer 20 contains amino away from a side of substrate 10.Graphene film 30 is positioned on self assembled monolayer 20.
According to the memory cell of the embodiment of the present invention, due to the characteristic of self assembled monolayer 20 two ends functional groups, can be respectively and substrate 10 and graphene film 30 bonding well.Self assembled monolayer 20 has charge-trapping point.Under the effect of gate bias, electric charge moves between graphene film 30 and the charge-trapping point of self assembled monolayer 20, and the electricity that changes Graphene raceway groove is led.Based on this principle, can carry out Infostorage Record.The memory cell of this embodiment has advantages of that transparency is high, flexible.
In one embodiment of the invention, substrate 10 can be alundum (Al2O3), silicon dioxide or hafnium oxide.It should be noted that, substrate 10 can also be other oxygen containing substrate.
In one embodiment of the invention, self assembled monolayer 20 is 3-aminopropyl triethoxysilane (APTES, NH
2(CH
2)
3si (OEt)
3) the unimolecule stratiform structure that forms of self assembly.It should be noted that, self assembled monolayer 20 can also be the carbon chain lengths amino silane that is other numerical value, and the one end that only requires molecule monomer is siloxy, and the other end is amino.
In one embodiment of the invention, the thickness of self assembled monolayer 20 is 1-2nm.The thickness range of self assembled monolayer 20 is relevant, relevant with the carbon chain lengths of amino silane with the size of the material molecule of formation self assembled monolayer 20.The carbochain of amino silane is longer, and the thickness of self assembled monolayer 20 is thicker.
In one embodiment of the invention, graphene film 30 is single-layer graphene film.Graphene film 30 thickness are approximately 0.3-0.4nm.
As shown in Figure 2, according to the formation method of the memory cell of the embodiment of the present invention, can comprise the following steps:
S1., substrate is provided.
S2. on substrate, form self assembled monolayer, a side of self assembled monolayer adjacent substrate contains siloxy, and self assembled monolayer contains amino away from a side of substrate.
S3. on self assembled monolayer, form graphene film.
According to the memory cell of the embodiment of the present invention, due to the characteristic of self assembled monolayer two ends functional group, can be respectively and substrate and graphene film bonding well.Self assembled monolayer has charge-trapping point.Under the effect of gate bias, electric charge moves between graphene film and the charge-trapping point of self assembled monolayer, and the electricity that changes Graphene raceway groove is led.Based on this principle, can carry out Infostorage Record.The memory cell that the formation method of the memory cell of this embodiment forms has advantages of that transparency is high, flexible.
In one embodiment of the invention, substrate can be alundum (Al2O3), silicon dioxide or hafnium oxide.It should be noted that, substrate can also be other oxygen containing substrate.
In one embodiment of the invention, self assembled monolayer is 3-aminopropyl triethoxysilane (APTES, NH
2(CH
2)
3si (OEt)
3) the unimolecule stratiform structure that forms of self assembly.It should be noted that, self assembled monolayer can also be the carbon chain lengths amino silane that is other numerical value, and the one end that only requires molecule monomer is siloxy, and the other end is amino.
In one embodiment of the invention, the thickness of self assembled monolayer is 1-2nm.The thickness range of self assembled monolayer is relevant, relevant with the carbon chain lengths of amino silane with the size of the material molecule of formation self assembled monolayer.The carbochain of amino silane is longer, and the thickness of self assembled monolayer is thicker.
In one embodiment of the invention, graphene film is single-layer graphene film.The thickness of single-layer graphene film is approximately 0.3-0.4nm.
For those skilled in the art are understood better, the present invention is described in detail to lift a specific embodiment below again.
A., Silicon Wafer is provided, cleans in advance dry grade for preliminary treatment, then oxidation, forms SiO on its surface
2as substrate.
B. after soaking 20min in the ethanolic solution of this substrate immersion APTES, take out, with high pure nitrogen, dry up, on substrate, formed the self assembled monolayer of APTES.
C. separately on platinum substrate by the chemical vapour deposition (CVD) mode single-layer graphene of growing, then by electrolysis, peel off Graphene and transfer on APTES self assembled monolayer.
By above-mentioned steps, can obtain the memory device of a SAM structure, it is carried out to a series of tests, result is as follows:
This memory device is carried out to the scanning of DC transfer characteristic, find back stagnant very greatly, this explanation is conducive to prepare memory.This memory device is carried out to pulse test, find that grid can obtain different device channel resistance (high resistant, low-resistance) under pulse excitation, proved that this memory device can work under pulse mode.Carried out 1000s attenuation test, the data holding ability of this memory device is desirable.Under conventional environment, carried out 100 tolerance tests, the erase function of this memory device keeps.In addition, or under vacuum environment, carried out 20 tolerance tests, the erase function of this memory device is still stable.
In description of the invention, it will be appreciated that, term " " center ", " longitudinally ", " laterally ", " length ", " width ", " thickness ", " on ", D score, " front ", " afterwards ", " left side ", " right side ", " vertically ", " level ", " top ", " end " " interior ", " outward ", " clockwise ", " counterclockwise ", " axially ", " radially ", orientation or the position relationship of indications such as " circumferentially " are based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, rather than device or the element of indication or hint indication must have specific orientation, with specific orientation structure and operation, therefore can not be interpreted as limitation of the present invention.
In the present invention, unless otherwise clearly defined and limited, the terms such as term " installation ", " being connected ", " connection ", " fixing " should be interpreted broadly, and for example, can be to be fixedly connected with, and can be also to removably connect, or be integral; Can be mechanical connection, can be to be also electrically connected to; Can be to be directly connected, also can indirectly be connected by intermediary, can be the connection of two element internals or the interaction relationship of two elements.For the ordinary skill in the art, can understand as the case may be above-mentioned term concrete meaning in the present invention.
In the present invention, unless otherwise clearly defined and limited, First Characteristic Second Characteristic " on " or D score can be that the first and second features directly contact, or the first and second features are by intermediary indirect contact.And, First Characteristic Second Characteristic " on ", " top " and " above " can be First Characteristic directly over Second Characteristic or oblique upper, or only represent that First Characteristic level height is higher than Second Characteristic.First Characteristic Second Characteristic " under ", " below " and " below " can be First Characteristic under Second Characteristic or tiltedly below, or only represent that First Characteristic level height is less than Second Characteristic.
In the description of this specification, the description of reference term " embodiment ", " some embodiment ", " example ", " concrete example " or " some examples " etc. means to be contained at least one embodiment of the present invention or example in conjunction with specific features, structure, material or the feature of this embodiment or example description.In this manual, to the schematic statement of above-mentioned term not must for be identical embodiment or example.And, the specific features of description, structure, material or feature can one or more embodiment in office or example in suitable mode combination.In addition, those skilled in the art can carry out combination and combination by the different embodiment that describe in this specification or example.
Although illustrated and described embodiments of the invention above, be understandable that, above-described embodiment is exemplary, can not be interpreted as limitation of the present invention, and those of ordinary skill in the art can change above-described embodiment within the scope of the invention, modification, replacement and modification.
Claims (10)
1. a memory cell, is characterized in that, comprising:
Substrate;
Self assembled monolayer, described self assembled monolayer is positioned on described substrate, and a side of the contiguous described substrate of described self assembled monolayer contains siloxy, and described self assembled monolayer contains amino away from a side of described substrate; With
Graphene film, described graphene film is positioned on described self assembled monolayer.
2. memory cell as claimed in claim 1, is characterized in that, described substrate is alundum (Al2O3), silicon dioxide or hafnium oxide.
3. memory cell as claimed in claim 1 or 2, is characterized in that, described self assembled monolayer is that the self assembly of 3-aminopropyl triethoxysilane obtains unimolecule stratiform structure.
4. the memory cell as described in claim 1-3, is characterized in that, described self assembled monolayer thickness is 1-2nm.
5. the memory cell as described in claim 1-4, is characterized in that, described graphene film is single-layer graphene film.
6. a formation method for memory cell, is characterized in that, comprises the following steps:
Substrate is provided;
On described substrate, form self assembled monolayer, a side of the contiguous described substrate of described self assembled monolayer contains siloxy, and described self assembled monolayer contains amino away from a side of described substrate; With
On described self assembled monolayer, form graphene film.
7. the formation method of memory cell as claimed in claim 6, is characterized in that, described substrate is alundum (Al2O3), silicon dioxide or hafnium oxide.
8. the formation method of the memory cell as described in claim 6 or 7, is characterized in that, described self assembled monolayer is that the self assembly of 3-aminopropyl triethoxysilane obtains unimolecule stratiform structure.
9. the formation method of the memory cell as described in claim 6-8, is characterized in that, described self assembled monolayer thickness is 1-2nm.
10. the formation method of the memory cell as described in claim 6-9, is characterized in that, described graphene film is single-layer graphene film.
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Cited By (3)
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| CN106816512A (en) * | 2017-03-03 | 2017-06-09 | 京东方科技集团股份有限公司 | A kind of diode displaying substrate and preparation method thereof, display |
| CN107406977A (en) * | 2015-02-26 | 2017-11-28 | 应用材料公司 | Use the method for the selective dielectric deposition of self-assembled monolayer |
| CN109003986A (en) * | 2018-08-07 | 2018-12-14 | 长江存储科技有限责任公司 | Memory construction and forming method thereof |
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| CN101512333A (en) * | 2006-08-28 | 2009-08-19 | 丰田自动车株式会社 | Electrochemically active organic thin film, method for producing the same, and device using the same |
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| CN107406977A (en) * | 2015-02-26 | 2017-11-28 | 应用材料公司 | Use the method for the selective dielectric deposition of self-assembled monolayer |
| CN106816512A (en) * | 2017-03-03 | 2017-06-09 | 京东方科技集团股份有限公司 | A kind of diode displaying substrate and preparation method thereof, display |
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Application publication date: 20140212 |