CN103560789B - SAR ADC circuit, electronic equipment and method - Google Patents
SAR ADC circuit, electronic equipment and method Download PDFInfo
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- CN103560789B CN103560789B CN201310516210.1A CN201310516210A CN103560789B CN 103560789 B CN103560789 B CN 103560789B CN 201310516210 A CN201310516210 A CN 201310516210A CN 103560789 B CN103560789 B CN 103560789B
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Abstract
The invention discloses an SAR ADC circuit, electronic equipment and a method. The SAR ADC circuit comprises a charge redistribution DAC module, a comparator and a common-mode voltage output module, wherein the common-mode voltage output module outputs a first common-mode voltage to the positive end of the comparator and outputs a second common-mode voltage to the negative end of the comparator. The SAR ADC circuit further comprises a rectifying DAC module. The rectifying DAC module is connected between the common-mode voltage output module and the positive end/the negative end of the comparator, and is used for carrying out digital-to-analog conversion processing on the voltage output by the common-mode voltage output module to adjust the intensity of the first common-mode voltage or the intensity of the second common-mode voltage, thus to rectify the offset of the SAR ADC circuit. According to the SAR ADC circuit, the electronic equipment and the method, digital-to-analog conversion processing is carried out on the first common-mode voltage or the second common-mode voltage to adjust the intensity of the first common-mode voltage or the intensity of the second common-mode voltage, the offset of the SAR ADC circuit can be rectified effectively and accurately, and the SAR ADC circuit, the electronic equipment and the method are quite practical.
Description
Technical field
The present invention relates to Analog-digital Converter technical field, particularly relate to a kind of SAR adc circuit, electronics
Apparatus and method for.
Background technology
In recent years, along with the fast development of Digital Signal Processing, filtering, frequency conversion, modulating/demodulating
Digital field is all had been enter into Deng information handling task.Right in order to use powerful Digital Signal Processing
Analogue signal in real world processes, and makees for playing bridge between analogue signal and digital signal
Analog-digital converter in TV, mobile device and other consumption electronic products, all obtained the widest
General application.
Proximity register type analog-digital converter (Successive Approximation Register continuously
Analog to Digital Converter, is called for short SAR ADC) it is medium commonly using to high resolution application
Analog digital conversion structure, its use a series of stages analog voltage is converted into digital bit, the most each rank
One analog voltage and a reference voltage are compared, to produce a digital bit by section.But,
As the imbalance of comparator itself in SAR ADC, SAR ADC chip internal with PCB version level
The multiple situations such as the irrational factors do not mated, switch of imbalance and electric capacity all can cause SAR ADC
Imbalance, thus cause a range of signal-under-test effectively cannot be measured by ADC, because of
This, need a kind of technical scheme to the problem solving SAR ADC imbalance.
Summary of the invention
Present invention is primarily targeted at provide a kind of can efficiently and accurately correction imbalance SAR ADC
Circuit, electronic equipment and method.
In order to achieve the above object, the present invention proposes a kind of SAR adc circuit, redistributes including electric charge
DAC module, comparator and common-mode voltage output module, described common-mode voltage output module output first is altogether
Mode voltage, to described comparator anode and output the second common-mode voltage extremely described comparator negative terminal, also includes:
Correction DAC module, is connected to described common-mode voltage output module and described comparator anode or described
Between comparator negative terminal, for the voltage of described common-mode voltage output module output is carried out at digital-to-analogue conversion
Reason regulates described first common-mode voltage or the size of described second common-mode voltage, to correct SAR ADC electricity
The imbalance on road.
Preferably, described electric charge redistribution DAC module includes some first electric capacity, each first electric capacity
One, one end three-terminal switch selects to be connected with earth terminal, input voltage or the first reference voltage, Mei Yi
The other end of one electric capacity is connected with the anode of described comparator.
Preferably, described correction DAC module is connected to described common-mode voltage output module and described comparator
Between anode, described correction DAC module includes some second electric capacity, one end one of each second electric capacity
Individual three-terminal switch selects to be connected, often with earth terminal, described common-mode voltage output module or the second reference voltage
The other end of one second electric capacity is connected with the anode of described comparator.
Preferably, described correction DAC module is additionally operable to:
When described input voltage is 0, the low and high level state exporting described comparator detects,
And according to the low and high level state of detection, the three-terminal switch in described correction DAC module is configured, adjust
The size of whole described first common-mode voltage, until the low and high level state upset of described comparator output.
Preferably, described correction DAC module is connected to described common-mode voltage output module and described comparator
Between negative terminal, described correction DAC module includes some second electric capacity, one end one of each second electric capacity
Individual three-terminal switch selects to be connected, often with earth terminal, described common-mode voltage output module or the second reference voltage
The other end of one second electric capacity is connected with the anode of described comparator.
Preferably, described correction DAC module is additionally operable to:
When described input voltage is 0, the low and high level state exporting described comparator detects,
And according to the low and high level state of detection, the three-terminal switch in described correction DAC module is configured, adjust
The size of whole described second common-mode voltage, until the low and high level state upset of described comparator output.
Preferably, the negative terminal of described comparator is through one the 3rd capacity earth.
The present invention also proposes a kind of electronic equipment, including SAR adc circuit as above.
The present invention proposes again a kind of offset correction method of SAR adc circuit, including:
Correct DAC module to the first common-mode voltage of input to comparator anode or to input to comparator negative terminal
The second common-mode voltage carry out digital-to-analogue conversion process, to adjust described first common-mode voltage or described second altogether
The size of mode voltage, the imbalance of correction SAR adc circuit.
Preferably, when described input voltage is 0, the low and high level state exporting described comparator is entered
Row detection, and according to the low and high level state of detection, the three-terminal switch in described correction DAC module is carried out
Configuration, adjusts described first common-mode voltage or the size of described second common-mode voltage, until described comparator
The low and high level state upset of output.
A kind of SAR adc circuit, electronic equipment and the method that the present invention proposes, when input voltage is 0,
The low and high level state of comparator output is detected, and according to the low and high level state detected to correction
Three-terminal switch in DAC module configures, to adjust the big of the first common-mode voltage or the second common-mode voltage
Little, until the low and high level state upset of described comparator output.So that described first common-mode voltage with
The difference of described second common-mode voltage offsets the imbalance of SAR adc circuit, due to by described first altogether
Mode voltage or described second common-mode voltage carry out digital-to-analogue conversion process and regulate described first common-mode voltage or institute
State the size of the second common-mode voltage, accordingly, it is capable to the imbalance of correction SAR adc circuit efficiently and accurately,
The most practical.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of present pre-ferred embodiments SAR adc circuit.
In order to make technical scheme clearer, clear, make the most in detail below in conjunction with accompanying drawing
State.
Detailed description of the invention
Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not used to limit
Determine the present invention.
It is the circuit diagram of present pre-ferred embodiments SAR adc circuit with reference to Fig. 1, Fig. 1.
Present pre-ferred embodiments proposes a kind of SAR adc circuit, including electric charge redistribution DAC module 1,
Comparator 2 and common-mode voltage output module 3, electric charge redistribution DAC module 1 includes some first electric capacity,
One, one end of each first electric capacity three-terminal switch K1 may select and earth terminal VREFN, input voltage vin
Or the first reference voltage VREFPConnecting, the other end of each first electric capacity connects with the anode of described comparator 2
Connect.Wherein, some first electric capacity are binary weights relation, the capacitance of some first electric capacity from little to
It is followed successively by greatly C, C, 2C, 4C, 8C ... 2N*C, wherein, comprises the compensation electric capacity that a capacity is C.
Described common-mode voltage output module 3 export the first common-mode voltage V3 to described comparator 2 anode and
Export the second common-mode voltage V4 to export to described comparator 2 negative terminal, described common-mode voltage output module 3
The initial value of the first common-mode voltage V3 and the second common-mode voltage V4 is equal and is the work of described comparator 2
Make the half of power supply.The negative terminal of described comparator is also through one the 3rd electric capacity Cp ground connection.
Described SAR adc circuit also includes: correction DAC module 4, is connected to the output of described common-mode voltage
Between module 3 and described comparator 2 anode or described comparator 2 negative terminal, including some second electric capacity,
When correcting DAC module 4 and described first common-mode voltage V3 being carried out digital-to-analogue conversion process, described correction
DAC module 4 is connected between described common-mode voltage output module 3 and described comparator 2 anode, each
One, one end of second electric capacity three-terminal switch K2 selects and earth terminal VREFN, described common-mode voltage output
Module 3 or the second reference voltage VREFP' connect, the other end of each second electric capacity and described comparator 2
Anode connect；When correcting DAC module 4 and described second common-mode voltage V4 being carried out digital-to-analogue conversion process,
One, one end of each second electric capacity three-terminal switch K2 selects and earth terminal VREFN, described common-mode voltage
Output module 3 or the second reference voltage VREFP' connect, the other end of each second electric capacity compares with described
The anode of device 2 connects.Wherein, some second electric capacity are binary weights relation, some second electric capacity
Capacitance is followed successively by C, 2C, 4C, 8C from small to large ... 2M*C.Correction DAC module 4 is for institute
State common-mode voltage output module 3 output voltage carry out digital-to-analogue conversion process regulate described first common mode electricity
The size of pressure V3 or described second common-mode voltage V4, to correct the imbalance of SAR adc circuit.
The operation principle of present pre-ferred embodiments SAR adc circuit is described in detail below:
In the SAR adc circuit of the present embodiment, in electric charge redistribution DAC module 1 to input voltage vin
After sampling, when comparing first, by input voltage vin and 1/2VREFPCompare, according to comparing knot
Three-terminal switch K1 is configured by fruit, repeatedly compares.The positive terminal voltage of comparator 2
V+=1/2VREFP-Vin+V3, the negative terminal voltage V-=V4 of comparator 2, the then positive and negative end electricity of comparator 2
Pressure reduction △ U=(V+)-(V-)=1/2VREFP-Vin+V3-V4, as △ U > 0, then comparator 2
Outfan output high level state, when △ U < when 0, then the outfan output low level shape of comparator 2
State.
If the SAR adc circuit of the present embodiment not being carried out offset correction, then due to V3=V4, then △
U=1/2VREFP-Vin。
If there is positive imbalance δ in SAR adc circuit, then when input voltage is Vin, due to positive imbalance
δ, at the anode of comparator 2, the input voltage value recorded is (Vin+ δ), then △ U=0-(Vin+ δ)
+ V3-V4=-Vin-δ, when input voltage vin is 0, then △ U=-δ < 0, the then output of comparator 2
End output low level state, the imbalance to SAR adc circuit is corrected, by correction DAC module 4
The low and high level state of comparator 2 output is detected, when outfan comparator 2 being detected exports
During low level state, then the three-terminal switch K2 in described correction DAC module 4 is configured, specifically
Ground, exports to the electricity correcting DAC module 4 common-mode voltage output module 3 according to the principle of Approach by inchmeal
Pressure size is adjusted, then after adjusting, the first common-mode voltage V3 and the second common-mode voltage V4 is the most equal,
Then △ U=-δ+V3-V4, correction DAC module 4 adjusts the first common-mode voltage V3 or the second common-mode voltage
When the size of V4 is to (V3-V4)=δ, then △ U=-δ+V3-V4=0, i.e. balance out SAR ADC
Imbalance δ positive present in circuit, and as △ U=-δ+V3-V4=0, the outfan of comparator 2 is defeated
The low and high level state gone out can overturn, then correction DAC module 4 can be according to the comparator of detection in real time
The low and high level state of the outfan output of 2 continues or stops the first common-mode voltage V3 or the second common mode
The size of voltage V4 is adjusted, and the low and high level state exported when the outfan of comparator 2 overturns
When being i.e. high level state by low level state upset, then understand correction DAC module 4 modulated to (V3-
V4)=δ, now the most positive present in SAR adc circuit imbalance δ correct.
If there is negative imbalance δ in SAR adc circuit, then when input voltage is Vin, due to negative imbalance
δ, at the anode of comparator 2, the input voltage value recorded is (Vin-δ), then △ U=0-(Vin-δ)
+ V3-V4=-Vin+ δ, when input voltage vin is 0, then △ U=+ δ > 0, then comparator 2 is defeated
Going out end output high level state, the imbalance to SAR adc circuit is corrected, by correction DAC module
The low and high level state of 4 pairs of comparator 2 outputs detects, when outfan comparator 2 being detected exports
During high level state, then the three-terminal switch K2 in described correction DAC module 4 is configured, specifically
Ground, exports to the electricity correcting DAC module 4 common-mode voltage output module 3 according to the principle of Approach by inchmeal
Pressure size is adjusted, then after adjusting, the first common-mode voltage V3 and the second common-mode voltage V4 is the most equal,
Then △ U=+ δ+(V3-V4), correction DAC module 4 adjusts the first common-mode voltage V3 or the second common mode
When the size of voltage V4 is to (V3-V4)=-δ, then △ U=+ δ+V3-V4=0, i.e. balance out SAR
Imbalance δ negative present in adc circuit, and as △ U=+ δ+V3-V4=0, comparator 2 defeated
The low and high level state going out end output can overturn, then correction DAC module 4 can be according to detection in real time
The low and high level state of the outfan output of comparator 2 continues or stops the first common-mode voltage V3 or the
The size of two common-mode voltage V4 is adjusted, and the low and high level state exported when the outfan of comparator 2 is sent out
When raw upset is i.e. low level state by high level state upset, then understand correction DAC module 4 modulated extremely
(V3-V4)=-δ, now the most negative present in SAR adc circuit imbalance δ correct.
In the present embodiment, correction DAC module 4 is to the first common-mode voltage V3 or the second common-mode voltage V4
Size when being adjusted, can only the first common-mode voltage V3 be adjusted or only to the second common-mode voltage
V4 is adjusted, it is possible to be adjusted the first common-mode voltage V3 and the second common-mode voltage V4 simultaneously,
As long as (V3-V4) coincidence correction necessary requirement after can guarantee that adjustment, in the present embodiment, only with
It is adjusted the second common-mode voltage V4, with signal, certainly, the most not limiting other situations.
In the present embodiment, to the first common-mode voltage V3 or the second common-mode voltage V4 in correction DAC module 4
Digital-to-analogue conversion Adjustment precision determine the maximum of residual offset after offset correction, if to the first common mode
The digital-to-analogue conversion Adjustment precision of voltage V3 or the second common-mode voltage V4 is less than the precision of SAR adc circuit
1LSB, then ensure that the residual offset voltage after SAR adc circuit offset correction is less than 1LSB.
The low and high level state of comparator 2 output, when input voltage vin is 0, is carried out by the present embodiment
Detection, and according to the low and high level state of detection, the three-terminal switch K2 in correction DAC module 4 is carried out
Configuration, to adjust the first common-mode voltage V3 or the size of the second common-mode voltage V4, until described comparator
The low and high level state upset of 2 outputs.So that described first common-mode voltage V3 and described second common mode electricity
The difference of pressure V4 offsets the imbalance of SAR adc circuit, due to by described first common-mode voltage V3
Or described second common-mode voltage V4 carries out digital-to-analogue conversion and processes and regulate described first common-mode voltage V3 or institute
State the size of the second common-mode voltage V4, accordingly, it is capable to the mistake of correction SAR adc circuit efficiently and accurately
Adjust, the most practical.
The present invention also proposes a kind of electronic equipment, and this electronic equipment includes above-mentioned SAR adc circuit, its work
Make principle as it has been described above, do not repeat them here.Owing to have employed above-mentioned SAR adc circuit, can be at SAR
Being corrected at any time, due to by the first common-mode voltage or second during positive and negative imbalance occurs in adc circuit
Common-mode voltage carries out digital-to-analogue conversion and processes and regulate described first common-mode voltage or described second common-mode voltage
Size, accordingly, it is capable to the imbalance of correction SAR adc circuit efficiently and accurately, the most practical, make this electricity
The measurement result of subset is more accurate.
The present invention proposes again a kind of offset correction method of SAR adc circuit, by correction DAC module pair
The first common-mode voltage or input to the second common-mode voltage of comparator negative terminal that input to comparator anode are carried out
Digital-to-analogue conversion processes, to adjust described first common-mode voltage or the size of described second common-mode voltage, and correction
The imbalance of SAR adc circuit.When input voltage is 0, the low and high level state of comparator output is entered
Row detection, and according to the low and high level state of detection, the three-terminal switch in correction DAC module is configured,
To adjust the first common-mode voltage or the size of the second common-mode voltage, until the height electricity of described comparator output
Level state overturns.So that the difference of described first common-mode voltage and described second common-mode voltage offsets SAR
The imbalance of adc circuit, due to by described first common-mode voltage or described second common-mode voltage number
Mould conversion process regulates described first common-mode voltage or the size of described second common-mode voltage, accordingly, it is capable to
The imbalance of correction SAR adc circuit efficiently and accurately, the most practical.
Above-mentioned SAR adc circuit, electronic equipment and method, when input voltage is 0, defeated to comparator
The low and high level state gone out detects, and according to the low and high level state detected in correction DAC module
Three-terminal switch configure, to adjust the first common-mode voltage or the size of the second common-mode voltage, until institute
State the low and high level state upset of comparator output.So that described first common-mode voltage is with described second altogether
The difference of mode voltage offsets the imbalance of SAR adc circuit, due to by described first common-mode voltage or institute
State the second common-mode voltage carry out digital-to-analogue conversion process regulate described first common-mode voltage or described second common mode
The size of voltage, accordingly, it is capable to the imbalance of correction SAR adc circuit efficiently and accurately, the most practical.
The foregoing is only the preferred embodiments of the present invention, not thereby limit the scope of the claims of the present invention,
Every equivalent structure utilizing description of the invention and accompanying drawing content to be made or flow process conversion, or directly or
Connect and be used in other relevant technical field, be the most in like manner included in the scope of patent protection of the present invention.
Claims (8)
1. a SAR adc circuit, including electric charge redistribution DAC module, comparator and common-mode voltage
Output module, described common-mode voltage output module export the first common-mode voltage to described comparator anode and
Export the second common-mode voltage to described comparator negative terminal, it is characterised in that also include:
Correction DAC module, is connected to described common-mode voltage output module and described comparator anode or described
Between comparator negative terminal, for the voltage of described common-mode voltage output module output is carried out at digital-to-analogue conversion
Reason regulates described first common-mode voltage or the size of described second common-mode voltage, to correct SAR ADC electricity
The imbalance on road；
Described electric charge redistribution DAC module includes some first electric capacity, one end one of each first electric capacity
Individual three-terminal switch selects to be connected with earth terminal, input voltage or the first reference voltage, each first electric capacity
The other end is connected with the anode of described comparator.
SAR adc circuit the most according to claim 1, it is characterised in that described correction DAC
Module is connected between described common-mode voltage output module and described comparator anode, described correction DAC mould
Block includes some second electric capacity, one, one end of each second electric capacity three-terminal switch select with earth terminal,
Described common-mode voltage output module or the second reference voltage connect, and the other end of each second electric capacity is with described
The anode of comparator connects.
SAR adc circuit the most according to claim 2, it is characterised in that described correction DAC
Module is additionally operable to:
When described input voltage is 0, the low and high level state exporting described comparator detects,
And according to the low and high level state of detection, the three-terminal switch in described correction DAC module is configured, adjust
The size of whole described first common-mode voltage, until the low and high level state upset of described comparator output.
SAR adc circuit the most according to claim 1, it is characterised in that described correction DAC
Module is connected between described common-mode voltage output module and described comparator negative terminal, described correction DAC mould
Block includes some second electric capacity, one, one end of each second electric capacity three-terminal switch select with earth terminal,
Described common-mode voltage output module or the second reference voltage connect, and the other end of each second electric capacity is with described
The anode of comparator connects.
SAR adc circuit the most according to claim 4, it is characterised in that described correction DAC
Module is additionally operable to:
When described input voltage is 0, the low and high level state exporting described comparator detects,
And according to the low and high level state of detection, the three-terminal switch in described correction DAC module is configured, adjust
The size of whole described second common-mode voltage, until the low and high level state upset of described comparator output.
6. according to the SAR adc circuit described in claim 2 or 4, it is characterised in that described comparison
The negative terminal of device is through one the 3rd capacity earth.
7. an electronic equipment, it is characterised in that include the SAR according to any one of claim 1-6
Adc circuit.
8. the offset correction method of a SAR adc circuit, it is characterised in that including:
Correct DAC module to the first common-mode voltage of input to comparator anode or to input to comparator negative terminal
The second common-mode voltage carry out digital-to-analogue conversion process, to adjust described first common-mode voltage or described second altogether
The size of mode voltage, the imbalance of correction SAR adc circuit；
When input voltage is 0, the low and high level state exporting described comparator detects, and root
According to the low and high level state of detection, the three-terminal switch in described correction DAC module is configured, adjust institute
State the first common-mode voltage or the size of described second common-mode voltage, until the height electricity of described comparator output
Level state overturns.
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| CN104485960A (en) * | 2015-01-06 | 2015-04-01 | 吴江圣博瑞信息科技有限公司 | Three-level switching method and circuit for successive approximation type analog-digital converter |
| CN107346975B (en) * | 2017-06-23 | 2021-01-22 | 西安微电子技术研究所 | SAR type ADC's high accuracy calibrating device |
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| CN101977058A (en) * | 2010-10-28 | 2011-02-16 | 电子科技大学 | Sequential approximation analog to digital converter with digital correction and processing method thereof |
| CN102111156A (en) * | 2011-02-18 | 2011-06-29 | 深圳市锐能微科技有限公司 | Successive approximation register analog-to-digital conversion circuit for realizing minimal dynamic range |
| CN203554418U (en) * | 2013-10-28 | 2014-04-16 | 深圳市芯海科技有限公司 | SAR ADC (Successive Approximation Register Analog to Digital Converter) circuit and electronic equipment |
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| KR101309837B1 (en) * | 2010-03-16 | 2013-09-23 | 한국전자통신연구원 | Successive approximation register analog-digital converter and method for operating the same |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101977058A (en) * | 2010-10-28 | 2011-02-16 | 电子科技大学 | Sequential approximation analog to digital converter with digital correction and processing method thereof |
| CN102111156A (en) * | 2011-02-18 | 2011-06-29 | 深圳市锐能微科技有限公司 | Successive approximation register analog-to-digital conversion circuit for realizing minimal dynamic range |
| CN203554418U (en) * | 2013-10-28 | 2014-04-16 | 深圳市芯海科技有限公司 | SAR ADC (Successive Approximation Register Analog to Digital Converter) circuit and electronic equipment |
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Address after: 518000, A building, block 9, garden city digital garden, 1079 Nanhai Road, Guangdong, Shenzhen, Nanshan District Patentee after: Chipsea Technology (Shenzhen) Co., Ltd. Address before: 518000 Guangdong city of Shenzhen province Nanshan District Nanhai Road No. 1079 Garden City digital building block A No. 901A Patentee before: Xinhai Science and Technology Co., Ltd., Shenzhen City |