CN103543056A - Method for positioning failure bits in preparation process of transmission electron microscope sample - Google Patents
Method for positioning failure bits in preparation process of transmission electron microscope sample Download PDFInfo
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- CN103543056A CN103543056A CN201310526550.2A CN201310526550A CN103543056A CN 103543056 A CN103543056 A CN 103543056A CN 201310526550 A CN201310526550 A CN 201310526550A CN 103543056 A CN103543056 A CN 103543056A
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- 238000000034 method Methods 0.000 title claims abstract description 25
- 238000002360 preparation method Methods 0.000 title abstract description 4
- 230000005540 biological transmission Effects 0.000 title abstract description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims abstract description 30
- 238000010884 ion-beam technique Methods 0.000 claims abstract description 21
- 229910052751 metal Inorganic materials 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 21
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 15
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 15
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 15
- 239000010937 tungsten Substances 0.000 claims abstract description 15
- 238000010894 electron beam technology Methods 0.000 claims abstract description 5
- 230000008569 process Effects 0.000 claims description 9
- 241000272525 Anas platyrhynchos Species 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 3
- 230000001681 protective effect Effects 0.000 claims description 3
- 238000010408 sweeping Methods 0.000 claims description 3
- 239000002244 precipitate Substances 0.000 claims 1
- 230000006378 damage Effects 0.000 abstract description 3
- 238000000151 deposition Methods 0.000 abstract description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract 2
- 238000005553 drilling Methods 0.000 abstract 2
- 229910052742 iron Inorganic materials 0.000 abstract 1
- 239000003550 marker Substances 0.000 abstract 1
- 238000007747 plating Methods 0.000 abstract 1
- 239000011241 protective layer Substances 0.000 abstract 1
- 239000002699 waste material Substances 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
The invention relates to a method for positioning failure bits in a preparation process of a transmission electron microscope sample. The method comprises the following steps: 1, grinding the sample to the position of a first metal line; 2, putting the grinded sample into a focused ion beam machine, drilling a small hole in a line column of a target metal line as a marker under the ion beam, wherein the target metal line is a column address; 3, converting the machine to be the electron beam mode, continuously scanning the surface of the sample with small current under high-pressure electron beam, counting out a row address, depositing platinum near a target tungsten column of the row address; 4, transferring the machine under the iron beam, drilling near the platinum in order to expose the target tungsten column; and 5, determining a bit address at a crossed part of the column address and the row address, and plating a platinum protective layer at the bit address by ion beam. With the adoption of the method, the time spent on counting address is greatly shortened, the positioning of the address of the failure bits become convenient and fast, a large amount of time and machine resource are saved, and the man-made destruction to a chip body is avoided.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of failure ratio certain bits method of preparing in perspective electron microscopic sample process.
Background technology
In general, integrated circuit lost efficacy unavoidably in development, production and use procedure, along with people's improving constantly product quality and reliability requirement, it is more and more important that failure analysis work also seems, by chip failure, analyze, can help integrated circuit (IC) design personnel to find not mating of defect in design, technological parameter or design and operate in the problem such as improper.For the analysis case of single bit fails, Product Failure Analysis slip-stick artist often needs this bit from chip, to cut out and be put into and in transmission electron microscope, goes to observe its whether textural anomaly.When using focused ion beam to prepare sample for use in transmitted electron microscope, how from a chip that comprises millions of same bits, quickly and accurately target to be found most important so.Conventional way be first in the metal wire mileage of repetition in column to target column, then the little current ion beam of enlargement ratio continues to sweep near dig up target column metal wire to expose the tungsten post connection of lower floor, thereby draws bit row address.The time of digging swept by metal wire and multiplying power all needs very strictly to control, too smallly can not expose tungsten post or overlong time and waste resource, excessively easily lower floor's tungsten post is dug up to the scanning that will again replace, this step often causes the complexity of sample preparation to raise and waste of time.
Summary of the invention
Technical matters to be solved by this invention is to provide a kind of failure ratio certain bits method of preparing in perspective electron microscopic sample process, than prior art, has saved the time, has reduced the damaged condition to sample.
The technical scheme that the present invention solves the problems of the technologies described above is as follows: a kind of failure ratio certain bits method of preparing in perspective electron microscopic sample process, comprises the following steps:
Step 1, is ground to sample the position of first layer metal line;
Step 2, is positioned over the sample after ground in focused ion beam board, under ion beam, digging duck eye in the alignment of metal target line, serves as a mark, and described metal target line is column address;
Step 3, converts board to electron beam pattern, continues little current scanning sample surfaces under high-pressure electronic bundle, and number goes out row address, and near the target tungsten post of row address the small platinum of receiving electrode;
Step 4, then board is recalled to ion beam, near platinum, sweep and dig, target tungsten post is exposed;
Step 5, determines bit addresses at the infall of column address and row address, with ion beam, at bit addresses place, plates platinum protective seam.
On the basis of technique scheme, the present invention can also do following improvement.
Further, the time of described step 3 deposition platinum is 10 seconds.
Further, in described step 4, sweeping the time of digging is 25 seconds to 30 seconds.
The invention has the beneficial effects as follows: shorten greatly the number address time, the searching of the bit addresses that makes to lose efficacy becomes convenient and swift, has saved in a large number time and board resource, has avoided the artificial destruction to chip itself simultaneously.
Accompanying drawing explanation
Fig. 1 is a kind of method flow diagram of preparing the failure ratio certain bits method in perspective electron microscopic sample process of the present invention.
Embodiment
Below in conjunction with accompanying drawing, principle of the present invention and feature are described, example, only for explaining the present invention, is not intended to limit scope of the present invention.
As shown in Figure 1, a kind of failure ratio certain bits method of having an X-rayed electron microscopic sample of the present invention, comprises the following steps:
Step 1, is ground to sample the position of first layer metal line;
Step 2, is positioned over the sample after ground in focused ion beam board, under ion beam, digging duck eye in the alignment of metal target line, serves as a mark, and described metal target line is column address;
Step 3, converts board to electron beam pattern, continues little current scanning sample surfaces under high-pressure electronic bundle, and number goes out row address, and near the target tungsten post of row address the small platinum of receiving electrode;
Step 4, then board is recalled to ion beam, near platinum, sweep and dig, target tungsten post is exposed;
Step 5, determines bit addresses at the infall of column address and row address, with ion beam, at bit addresses place, plates platinum protective seam.
Described step 3 is carried out in the situation that image is amplified to more than 200,000 times, and the time of described step 3 deposition platinum is 10 seconds, and in described step 4, sweeping the time of digging is 25 seconds to 30 seconds.First chip front side is ground to first layer metal circuit (in order to guarantee the primitiveness of address bit, the certain maintenance of metallic circuit on its top is complete); Put into focused ion beam and carry out two-beam and align, first under ion beam in the metal wire mileage of repetition in column to metal target line, this is the column address at bit place, then near the metal wire of row aims at the mark, image is amplified to 200,000 times of above and lasting little current ion beam scannings again, metal wire can be swept the tungsten post articulamentum of diging up to expose lower floor by ion beam like this, and the place that can draw bit row address according to tungsten post number is exactly desired bit addresses in the point of crossing of row and column.All in flow processs, sweep that to dig metal wire one step very crucial, because sweep time and multiplying power all need appropriate control, too smallly can not expose tungsten post or overlong time and waste resource, excessively easily lower floor's tungsten post is dug up to the scanning that will again replace, this just causes the complexity of sample preparation to raise and waste of time.
Innovation of the present invention is to shorten greatly the number address time, and step 3 and 4 All Times are general only needs 2 minutes, and with respect to old technology it can 95% the destructiveness of minimizing to sample.The searching of bit addresses of making to lose efficacy becomes convenient and swift, has saved in a large number time and board resource, has avoided the artificial destruction to chip itself simultaneously.
The foregoing is only preferred embodiment of the present invention, in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection scope of the present invention.
Claims (3)
1. prepare the failure ratio certain bits method in perspective electron microscopic sample process, it is characterized in that, comprise the following steps:
Step 1, is ground to sample the position of first layer metal line;
Step 2, is positioned over the sample after ground in focused ion beam board, under ion beam, digging duck eye in the alignment of metal target line, serves as a mark, and described metal target line is column address;
Step 3, converts board to electron beam pattern, continues little current scanning sample surfaces under high-pressure electronic bundle, and number goes out row address, and precipitates platinum near the target tungsten post of row address;
Step 4, then board is recalled to ion beam, near platinum, sweep and dig, target tungsten post is exposed;
Step 5, determines bit addresses at the infall of column address and row address, with ion beam, at bit addresses place, plates platinum protective seam.
2. a kind of failure ratio certain bits method of preparing in perspective electron microscopic sample process according to claim 1, is characterized in that, the time of described step 3 deposition platinum is 10 seconds.
3. a kind of failure ratio certain bits method of preparing in perspective electron microscopic sample process according to claim 1, is characterized in that, in described step 4, sweeping the time of digging is 25 seconds to 30 seconds.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105136539A (en) * | 2015-08-26 | 2015-12-09 | 上海华力微电子有限公司 | Method for preparing TEM chip sample |
| CN105136545A (en) * | 2015-10-19 | 2015-12-09 | 上海华力微电子有限公司 | Marking method for TEM chip sample |
| CN105352768A (en) * | 2015-09-27 | 2016-02-24 | 上海华力微电子有限公司 | TEM sample positioning method |
| CN114236364A (en) * | 2022-02-24 | 2022-03-25 | 上海聚跃检测技术有限公司 | Failure analysis method and system for integrated circuit chip |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1727872A (en) * | 2004-07-29 | 2006-02-01 | 上海华虹Nec电子有限公司 | Method of using ion beam to analyze defective workmanship of metal silicides |
| JP3768197B2 (en) * | 2003-02-28 | 2006-04-19 | 株式会社東芝 | Preparation method of transmission electron microscope specimen |
| JP2010230518A (en) * | 2009-03-27 | 2010-10-14 | Toppan Printing Co Ltd | Thin sample preparing method |
| CN101988909A (en) * | 2009-08-06 | 2011-03-23 | 中芯国际集成电路制造(上海)有限公司 | Failure analysis method of low k dielectric material |
| CN102005400A (en) * | 2009-08-28 | 2011-04-06 | 中芯国际集成电路制造(上海)有限公司 | Failure detection method and failure detection device |
| CN102044461A (en) * | 2009-10-20 | 2011-05-04 | 中芯国际集成电路制造(上海)有限公司 | Detection method used for failure analysis of semiconductor device |
| CN102254844A (en) * | 2010-05-21 | 2011-11-23 | 武汉新芯集成电路制造有限公司 | Memory chip bit line failure analysis method |
| CN102384867A (en) * | 2010-09-02 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing failure analysis sample |
| CN102426119A (en) * | 2011-08-25 | 2012-04-25 | 上海华碧检测技术有限公司 | Preparation method of structure section sample of small-sized wafer sample for observation |
| CN102445480A (en) * | 2011-09-23 | 2012-05-09 | 东南大学 | Method for preparing nano-gap electrodes on surface of nano-pore and in nano-pore |
| CN103267661A (en) * | 2013-04-28 | 2013-08-28 | 上海华力微电子有限公司 | Positioning method for SEM/TEM sample |
-
2013
- 2013-10-30 CN CN201310526550.2A patent/CN103543056B/en active Active
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3768197B2 (en) * | 2003-02-28 | 2006-04-19 | 株式会社東芝 | Preparation method of transmission electron microscope specimen |
| CN1727872A (en) * | 2004-07-29 | 2006-02-01 | 上海华虹Nec电子有限公司 | Method of using ion beam to analyze defective workmanship of metal silicides |
| JP2010230518A (en) * | 2009-03-27 | 2010-10-14 | Toppan Printing Co Ltd | Thin sample preparing method |
| CN101988909A (en) * | 2009-08-06 | 2011-03-23 | 中芯国际集成电路制造(上海)有限公司 | Failure analysis method of low k dielectric material |
| CN102005400A (en) * | 2009-08-28 | 2011-04-06 | 中芯国际集成电路制造(上海)有限公司 | Failure detection method and failure detection device |
| CN102044461A (en) * | 2009-10-20 | 2011-05-04 | 中芯国际集成电路制造(上海)有限公司 | Detection method used for failure analysis of semiconductor device |
| CN102254844A (en) * | 2010-05-21 | 2011-11-23 | 武汉新芯集成电路制造有限公司 | Memory chip bit line failure analysis method |
| CN102384867A (en) * | 2010-09-02 | 2012-03-21 | 中芯国际集成电路制造(上海)有限公司 | Method for preparing failure analysis sample |
| CN102426119A (en) * | 2011-08-25 | 2012-04-25 | 上海华碧检测技术有限公司 | Preparation method of structure section sample of small-sized wafer sample for observation |
| CN102445480A (en) * | 2011-09-23 | 2012-05-09 | 东南大学 | Method for preparing nano-gap electrodes on surface of nano-pore and in nano-pore |
| CN103267661A (en) * | 2013-04-28 | 2013-08-28 | 上海华力微电子有限公司 | Positioning method for SEM/TEM sample |
Non-Patent Citations (3)
| Title |
|---|
| KENNETH HARRIS等: "在线检测与分析快速发现不可见的电学缺陷", 《工艺与制造》, 31 December 2007 (2007-12-31), pages 42 - 44 * |
| 刘立建: "聚焦离子束（FIB）技术及其在微电子领域的应用", 《综述》, vol. 26, no. 2, 28 February 2001 (2001-02-28), pages 19 - 26 * |
| 陈强等: "DB-FIB电子束辅助沉积Pt法在FA中的应用实例", 《电子科技》, vol. 21, no. 3, 31 December 2008 (2008-12-31), pages 26 - 29 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105136539A (en) * | 2015-08-26 | 2015-12-09 | 上海华力微电子有限公司 | Method for preparing TEM chip sample |
| CN105352768A (en) * | 2015-09-27 | 2016-02-24 | 上海华力微电子有限公司 | TEM sample positioning method |
| CN105136545A (en) * | 2015-10-19 | 2015-12-09 | 上海华力微电子有限公司 | Marking method for TEM chip sample |
| CN105136545B (en) * | 2015-10-19 | 2019-01-04 | 上海华力微电子有限公司 | A kind of labeling method of TEM chip sample |
| CN114236364A (en) * | 2022-02-24 | 2022-03-25 | 上海聚跃检测技术有限公司 | Failure analysis method and system for integrated circuit chip |
| CN114236364B (en) * | 2022-02-24 | 2022-05-31 | 上海聚跃检测技术有限公司 | Failure analysis method and system for integrated circuit chip |
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| CN103543056B (en) | 2015-10-07 |
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Address after: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee after: Wuhan Xinxin Integrated Circuit Co.,Ltd. Country or region after: China Address before: 430205 No.18, Gaoxin 4th Road, Donghu Development Zone, Wuhan City, Hubei Province Patentee before: Wuhan Xinxin Semiconductor Manufacturing Co.,Ltd. Country or region before: China |