CN103532196B - The voltage sampling circuit of rechargeable battery - Google Patents
The voltage sampling circuit of rechargeable battery Download PDFInfo
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- CN103532196B CN103532196B CN201310505167.9A CN201310505167A CN103532196B CN 103532196 B CN103532196 B CN 103532196B CN 201310505167 A CN201310505167 A CN 201310505167A CN 103532196 B CN103532196 B CN 103532196B
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Abstract
A kind of voltage sampling circuit of rechargeable battery, comprise current sampling unit, the first impedance unit, the second impedance unit and the 3rd impedance unit, wherein, described current sampling unit is suitable for sampling to obtain offset current to the charging current of described rechargeable battery; One end of described first impedance unit is suitable for inputting cell voltage, and the other end of described first impedance unit connects one end of described second impedance unit; The other end of described second impedance unit connects one end of described 3rd impedance unit and is suitable for exporting the sampled voltage relevant to described offset current; The other end ground connection of described 3rd impedance unit.The voltage sampling circuit of the rechargeable battery that technical solution of the present invention provides, can shorten the charging interval of rechargeable battery and can not affect constant voltage charge precision.
Description
Technical field
The present invention relates to battery charging control technology field, particularly a kind of voltage sampling circuit of rechargeable battery.
Background technology
Rechargeable battery is the limited chargeable battery of charging times, has the advantage such as economy and environmental protection.The principal element affecting rechargeable battery cycle life is charging modes and the charge efficiency of rechargeable battery.Therefore, while portable type electronic product develops to higher level integrated level, how for rechargeable battery provides the charging scheme of highly effective and safe more and more to receive the concern of designer.For the charge characteristic of rechargeable battery, usually adopt constant current-constant voltage mode charging.
Fig. 1 is the waveform schematic diagram of cell voltage and the charging current adopting constant current-constant voltage mode to charge to rechargeable battery.With reference to figure 1, horizontal axis representing time, the longitudinal axis represents voltage/current, and imaginary curve L11 represents cell voltage, and solid-line curve L12 represents charging current.During 0 ~ t1 moment, charging current remains unchanged, and cell voltage constantly raises, and adopts constant current mode to charge the battery; After the t1 moment, charging current reduces gradually, and cell voltage remains unchanged, and adopts constant voltage mode to charge the battery.
In the whole process of charging to battery, need to sample to cell voltage, to determine when charging modes is switching to constant voltage charge pattern by constant current charging mode.Fig. 2 is the voltage sampling circuit of existing a kind of rechargeable battery.With reference to figure 2, the voltage sampling circuit of described rechargeable battery comprises the first impedance component R11 and the second impedance component R12 of series connection.One end that described first impedance component R11 is connected with the second impedance component R12 is as the output of sampled voltage Vs, the other end of described first impedance component R11 connects the anode of rechargeable battery, namely cell voltage Vbat is inputted, the other end ground connection of described second impedance component R12.
Described sampled voltage Vs error originated from input amplifier compares with the reference voltage of the described error amplifier of input, determines whether to switch to constant voltage charge pattern by constant current charging mode according to comparative result.Particularly, when constant current charging mode, described sampled voltage Vs follows described cell voltage Vbat and constantly raises, when the magnitude of voltage of described cell voltage Vbat is elevated to the constant voltage value preset, described sampled voltage Vs is increased to equal with described reference voltage, and charging modes switches to constant voltage charge pattern by constant current charging mode.
But find in actual charging process, the charging interval of rechargeable battery is longer.
Summary of the invention
The problem that what the present invention solved is charging interval of rechargeable battery is longer.
For solving the problem, the invention provides a kind of voltage sampling circuit of rechargeable battery, comprise current sampling unit, the first impedance unit, the second impedance unit and the 3rd impedance unit, wherein, described current sampling unit is suitable for sampling to obtain offset current to the charging current of described rechargeable battery; One end of described first impedance unit is suitable for inputting cell voltage, and the other end of described first impedance unit connects one end of described second impedance unit; The other end of described second impedance unit connects one end of described 3rd impedance unit and is suitable for exporting the sampled voltage relevant to described offset current; The other end ground connection of described 3rd impedance unit.
Optionally, described first impedance unit, the second impedance unit and the 3rd impedance unit are resistive element.
Optionally, the resistance value of described first impedance unit, the second impedance unit and the 3rd impedance unit is relevant to the current value of the internal resistance value of described rechargeable battery, the current value of described charging current and described offset current.
Optionally, the resistance value of described first impedance unit, the second impedance unit and the 3rd impedance unit is according to I
s× r2 × (r1+r2+r3) ÷ (r1+r2)≤r0 × I
cdetermine, wherein, I
sfor the current value of described offset current, I
cfor the current value of described charging current, r0 is the internal resistance value of described rechargeable battery, and r1 is the resistance value of described first impedance unit, and r2 is the resistance value of described second impedance unit, and r3 is the resistance value of described 3rd impedance unit.
Optionally, described current sampling unit comprises the first resistance, the second resistance, the 3rd resistance, the first current mirroring circuit, the first current source, the second current source, the first metal-oxide-semiconductor and the second current mirroring circuit, wherein,
One end of described first resistance connects one end of described second resistance and is suitable for inputting described charging current, and the other end of described first resistance connects one end of described 3rd resistance and described rechargeable battery;
Described first current mirroring circuit comprises first input end, the second input, the first output and the second output, described first input end connects the other end of described second resistance and the first electrode of described first metal-oxide-semiconductor, described second input connects the other end of described 3rd resistance, described first output is by described first current source ground connection, and described second output connects the grid of described first metal-oxide-semiconductor and passes through described second current source ground connection;
Described second current mirroring circuit comprises the 3rd input, four-input terminal, the 3rd output and the 4th output, described 3rd input connects the second electrode of described first metal-oxide-semiconductor, described four-input terminal connects the other end of described first impedance unit, described 3rd output and the 4th output head grounding.
Optionally, the resistance value of described second resistance and described 3rd resistance is equal.
Optionally, the electric current that provides of described first current source and described second current source is equal.
Optionally, described first metal-oxide-semiconductor is PMOS; First electrode of described first metal-oxide-semiconductor is the source electrode of PMOS, and the second electrode of described first metal-oxide-semiconductor is the drain electrode of PMOS.
Optionally, described first current mirroring circuit comprises the second connected metal-oxide-semiconductor of grid and the 3rd metal-oxide-semiconductor; First electrode of described second metal-oxide-semiconductor as described first input end, the grid of the second metal-oxide-semiconductor described in the second Electrode connection of described second metal-oxide-semiconductor as described first output; First electrode of described 3rd metal-oxide-semiconductor is as described second input, and the second electrode of described 3rd metal-oxide-semiconductor is as described second output.
Optionally, described second current mirroring circuit comprises the 4th connected metal-oxide-semiconductor of grid and the 5th metal-oxide-semiconductor; The grid of the 4th metal-oxide-semiconductor described in the first Electrode connection of described 4th metal-oxide-semiconductor as described 3rd input, the second electrode of described 4th metal-oxide-semiconductor is as described 3rd output; First electrode of described 5th metal-oxide-semiconductor is as described four-input terminal, and the second electrode of described 5th metal-oxide-semiconductor is as described 4th output.
Compared with prior art, technical scheme of the present invention has the following advantages:
Sample to obtain offset current by the charging current of current sampling unit to rechargeable battery, and described offset current is acted on by the first impedance unit, the second impedance unit and the 3rd impedance unit bleeder circuit in series, compensate the pressure drop because the internal resistance of cell and printed circuit board traces resistance cause.Owing to having carried out voltage compensation, when battery core voltage is identical, the sampled voltage that the voltage sampling circuit of rechargeable battery provided by the invention obtains described battery voltage sampling is lower than the sampled voltage of prior art, therefore, compared with prior art, rechargeable battery enters the time retardation of constant voltage charge pattern, and the charging interval shortens.
Further, the voltage sampling circuit of rechargeable battery provided by the invention adopts described first impedance unit, the second impedance unit and the 3rd impedance unit to carry out dividing potential drop, need the resistance value compensated can be regulated by the resistance value changing described first impedance unit, therefore, the circuit obtaining described offset current is easy to realize.
Further, described offset current is obtained charge current sample by described current sampling unit, can follow the change of described charging current in real time.After entering constant voltage charge pattern, described offset current is followed described charging current and is constantly reduced, and at the end of charging, described offset current is zero, and bucking voltage is zero, therefore, can not affect constant voltage charge precision.
In possibility, described current sampling unit comprises the first metal-oxide-semiconductor, described first metal-oxide-semiconductor has feedback effect, ensures that the voltage of the first input end of the first current mirroring circuit in described sampling unit and the second input is equal, makes the offset current of acquisition more accurate.
Accompanying drawing explanation
Fig. 1 is the waveform schematic diagram of cell voltage and the charging current adopting constant current-constant voltage mode to charge to rechargeable battery;
Fig. 2 is the structural representation of the voltage sampling circuit of existing a kind of rechargeable battery;
Fig. 3 is the structural representation of the voltage sampling circuit of the rechargeable battery of the embodiment of the present invention;
Fig. 4 is the waveform schematic diagram carrying out emulating the charging current obtained to the voltage sampling circuit of rechargeable battery provided by the invention;
Fig. 5 is the waveform schematic diagram carrying out emulating the battery core voltage obtained to the voltage sampling circuit of rechargeable battery provided by the invention;
Fig. 6 is the waveform schematic diagram carrying out emulating the cell voltage obtained to the voltage sampling circuit of rechargeable battery provided by the invention;
Fig. 7 is the circuit diagram of the current sampling unit of the embodiment of the present invention.
Embodiment
With reference to figure 2, because the anode of the internal resistance of cell and rechargeable battery is to the existence of the printed circuit board traces resistance between described first impedance component R11, charging current flows through the internal resistance of cell and printed circuit board traces resistance can cause pressure drop, therefore, the positive terminal voltage of described cell voltage Vbat and rechargeable battery is unequal, but higher than the positive terminal voltage of rechargeable battery, the positive terminal voltage of described rechargeable battery is battery core voltage.
According to electric resistance partial pressure principle, the magnitude of voltage U of described cell voltage
bAT=U
bC+ Δ U=U
s× (r11+r12) ÷ r11, wherein, U
bCfor the magnitude of voltage of described battery core voltage, Δ U is the magnitude of voltage of the described pressure drop caused by the internal resistance of cell and printed circuit board traces resistance, U
sfor the magnitude of voltage of described sampled voltage Vs, r11 is the resistance value of described first impedance component R11, and r12 is the resistance value of described second impedance component R12.
Based on above-mentioned analysis, when described cell voltage Vbat is increased to the constant voltage value of setting, the magnitude of voltage U of described battery core voltage
bCbut lower than described constant voltage value, described sampled voltage Vs has been increased to equal with the reference voltage set, causes rechargeable battery to enter constant voltage charge pattern in advance.Charging interval of rechargeable battery, under normal circumstances, the time scale of constant current mode and constant voltage mode was 1:2, and namely the time of low current charge is longer mainly by the Time dependent of constant current mode and constant voltage mode.Therefore, after rechargeable battery enters constant voltage charge pattern in advance, charging current reduces, and the time of constant voltage charge pattern accounts for the ratio in whole charging interval and increases, and the whole charging interval is longer.
Technical solution of the present invention provides a kind of voltage sampling circuit of rechargeable battery, by compensating the pressure drop because rechargeable battery internal resistance and printed circuit board traces resistance cause, postponing the time that rechargeable battery enters constant voltage charge pattern, the charging interval is shortened.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
Fig. 3 is the structural representation of the voltage sampling circuit of the rechargeable battery of the embodiment of the present invention.With reference to figure 3, the voltage sampling circuit of described rechargeable battery comprises current sampling unit 30, first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33.
Described current sampling unit 30 is suitable for sampling to obtain offset current I0 to the charging current of described rechargeable battery.The pressure drop caused due to the internal resistance of cell and printed circuit board traces resistance becomes positive correlation to change with described charging current, namely described charging current is larger, the pressure drop that the internal resistance of cell and printed circuit board traces resistance cause is also larger, therefore, balancing battery internal resistance is relevant to described charging current with the pressure drop that printed circuit board traces resistance causes.
Namely described offset current I0 is the sample rate current of sampling to described charging current, the change of described charging current can be followed with the current ratio of a setting, such as, the current ratio setting described offset current I0 and described charging current is 1:100000, when described charging current is 1A, described offset current I0 is 10 μ A; When described charging current is 0.9A, described offset current I0 is 10 μ A.
Described offset current I0 acts on by described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33 bleeder circuit in series, concerning described bleeder circuit, described offset current I0 is negative current, and namely described offset current I0 is flowed out by described bleeder circuit.Particularly, one end of described first impedance unit R31 is suitable for input cell voltage Vbat, namely one end of described first impedance unit R31 connects the anode of rechargeable battery, and the other end of described first impedance unit R31 connects one end of described second impedance unit R32 and exports described offset current I0; The other end of described second impedance unit R32 connects one end of described 3rd impedance unit R33 and is suitable for exporting the sampled voltage Vs relevant to described offset current I0; The other end ground connection of described 3rd impedance unit R33.
Described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33 can be resistive element, also can be to comprise Various Components to combine the circuit presenting impedance operator.
Below the operation principle of the voltage sampling circuit of the rechargeable battery of the present embodiment is described.
According to Ohm's law and electric resistance partial pressure principle, the magnitude of voltage U of described cell voltage Vbat
bAT=U
s× (r1+r2+r3) ÷ r3+I
s× r1 × (r1+r2+r3) ÷ (r2+r3), wherein, U
sfor the magnitude of voltage of described sampled voltage Vs, r1 is the resistance value of described first impedance unit R31, and r2 is the resistance value of described second impedance unit R32, and r3 is the resistance value of described 3rd impedance unit R33, I
sfor the current value of described offset current I0.
Due to U
s× (r1+r2+r3) ÷ r3 is the magnitude of voltage of described battery core voltage, therefore, and I
s× r1 × (r1+r2+r3) ÷ (r2+r3) is the magnitude of voltage of the bucking voltage to the pressure drop that the internal resistance of cell and printed circuit board traces resistance cause.After adding described bucking voltage, the sample circuit of described rechargeable battery is sampled to described cell voltage Vbat, compared with prior art, when described battery core voltage is identical, and the magnitude of voltage U of described sampled voltage Vs
slower than prior art, rechargeable battery enters the time retardation of constant voltage charge pattern.
Described bucking voltage can set according to the actual requirements, can be changed the magnitude of voltage of described bucking voltage by the resistance value adjusting described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33.The resistance value of described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33 is relevant to the current value of the internal resistance value of described rechargeable battery, the current value of described charging current and described offset current I0.
Particularly, in order to prevent rechargeable battery overcharge, namely prevent described battery core voltage overshoot, the magnitude of voltage I of described bucking voltage
s× r1 × (r1+r2+r3) ÷ (r2+r3) can not higher than the product of the current value of the internal resistance value of rechargeable battery and described charging current, and namely the resistance value of described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33 is according to I
s× r2 × (r1+r2+r3) ÷ (r1+r2)≤r0 × I
cdetermine, wherein, I
cfor the current value of described charging current, r0 is the internal resistance value of described rechargeable battery.
For verifying the effect of the voltage sampling circuit of described rechargeable battery, the charging system of inventor to the voltage sampling circuit comprising rechargeable battery provided by the invention emulates.The constant voltage value arranged when charging modes is converted to constant voltage charge pattern by constant current charging mode is 4.2V, adopts the charging current of 1.5A to be the battery charging of 150m Ω to the internal resistance of cell when constant current charging mode.Fig. 4 is the waveform schematic diagram of the charging current that emulation obtains, and Fig. 5 is the waveform schematic diagram of the battery core voltage that emulation obtains, and Fig. 6 is the waveform schematic diagram of the cell voltage that emulation obtains.
With reference to figure 4 to Fig. 6, adopt the voltage sampling circuit of rechargeable battery of the present invention, by compensating the pressure drop caused due to rechargeable battery internal resistance and printed circuit board traces resistance, after charging 1ms, cell voltage reaches the constant voltage value 4.2V of setting, charging current is still 1.5A, and rechargeable battery is in constant current charging mode; After charging 2.17ms, it is 4.14V that cell voltage is increased to battery core voltage corresponding to 4.35V(), rechargeable battery just enters constant voltage charge pattern.
Voltage sampling circuit according to the rechargeable battery of the prior art shown in Fig. 2 is sampled to cell voltage, and when cell voltage reaches 4.2V, rechargeable battery just enters constant voltage charge pattern, and now corresponding battery core voltage is 4.2V-1.5A × 150m Ω=3.975V.
The voltage sampling circuit of rechargeable battery provided by the invention, voltage compensation is carried out to the pressure drop caused due to the internal resistance of cell and printed circuit board traces resistance, when battery core voltage is identical, described sampled voltage Vs is lower than prior art, therefore, compared with prior art, rechargeable battery enters the time retardation of constant voltage charge pattern, and the charging interval shortens.
Further, described offset current I0 is obtained by described current sampling unit 30 pairs of charge current sample, can follow the change of described charging current in real time.After entering constant voltage charge pattern, described offset current I0 follows described charging current and constantly reduces.At the end of charging, described offset current I0 is zero.According to U
bAT=U
s× (r1+r2+r3) ÷ r3+I
s× r1 × (r1+r2+r3) ÷ (r2+r3), at the end of charging, described bucking voltage is zero, can not affect the final magnitude of voltage of described battery core voltage, namely can not affect constant voltage charge precision.
Referring to figs. 2 and 3, compared with prior art, described offset current is not only added the bleeder circuit of prior art by the voltage sampling circuit of the rechargeable battery that technical solution of the present invention provides, and also improves the bleeder circuit of prior art.
If do not improve the bleeder circuit of prior art, adopt the first impedance component R11 shown in Fig. 2 and the second impedance component R12 in parallel, described offset current I0 is exported by the link of described first impedance component R11 and the second impedance component R12, the magnitude of voltage U of so described cell voltage Vbat
bAT=U
s× (r11+r12) ÷ r12+I
s× r11 × (r11+r12) ÷ r12, wherein, U
sfor the magnitude of voltage of described sampled voltage Vs, r11 is the resistance value of described first impedance component R11, and r12 is the resistance value of described second impedance component R12, I
sfor the current value of described offset current I0.
Because the magnitude of voltage of described cell voltage Vbat and sampled voltage Vs all presets, therefore, the ratio-dependent of the resistance value r11 of described first impedance component R11 and the resistance value r12 of described second impedance component R12.In order to meet the low-power consumption of cell voltage, the resistance value r11 of described first impedance component R11 and the resistance value r12 of described second impedance component R12 is generally megohm level, need resistance value r11 × (r11+r12) ÷ r12 compensated very large, the current value I of described offset current I0
sjust must be very little, cannot realize when designing.
The voltage sampling circuit of the charging current that the embodiment of the present invention provides, described first impedance unit R31, the second impedance unit R32 and the 3rd impedance unit R33 is adopted to carry out dividing potential drop, need resistance value r1 × (r1+r2+r3) ÷ (r2+r3) compensated can be regulated by the resistance value r1 changing described first impedance unit R11, therefore, the circuit obtaining described offset current I0 is easy to realize.
Fig. 7 is the circuit diagram of a kind of current sampling unit that the present embodiment provides.With reference to figure 7, described current sampling unit comprises the first resistance R41, the second resistance R42, the 3rd resistance R43, the first current mirroring circuit 41, first current source I42, the second current source I43, the first metal-oxide-semiconductor M41 and the second current mirroring circuit 42.
One end of described first resistance R41 connects one end of described second resistance R42 and is suitable for inputting described charging current, the other end of described first resistance R41 connects one end of described 3rd resistance R43 and described rechargeable battery, and the resistance value of described second resistance R42 and described 3rd resistance R43 is equal.For convenience of describing, described charging current I41 represents, described rechargeable battery BAT represents, described charging current I41 charges to described rechargeable battery BAT through described first resistance R41.
Described first current mirroring circuit 41 comprises first input end N1, the second input N2, the first output N3 and the second output N4.Described first input end N1 connects the other end of described second resistance R42 and first electrode of described first metal-oxide-semiconductor M41, described second input N2 connects the other end of described 3rd resistance R43, described first output N3 is by described first current source I42 ground connection, and described second output N4 connects the grid of described first metal-oxide-semiconductor M41 and passes through described second current source I43 ground connection.
Described first current mirroring circuit 41 can have multiple implementation, and such as, described first current mirroring circuit 41 can for the current mirroring circuit be made up of triode, and the current mirroring circuit that also can form for metal-oxide-semiconductor, the present invention is not construed as limiting this.
In the present embodiment, described first current mirroring circuit 41 comprises grid the second connected metal-oxide-semiconductor M42 and the 3rd metal-oxide-semiconductor M43.First electrode of described second metal-oxide-semiconductor M42 as described first input end N1, the grid of the second metal-oxide-semiconductor M42 described in second Electrode connection of described second metal-oxide-semiconductor M42 as described first output N3.First electrode of described 3rd metal-oxide-semiconductor M43 is as described second input N2, and second electrode of described 3rd metal-oxide-semiconductor M43 is as described second output N4.
Described second current mirroring circuit 42 comprises the 3rd input N5, four-input terminal N6, the 3rd output N7 and the 4th output N8.Described 3rd input N5 connects second electrode of described first metal-oxide-semiconductor M41, and described four-input terminal N6 is suitable for exporting described offset current I0, described 3rd output N7 and the 4th output N8 ground connection.
Because the current potential of described four-input terminal N6 is higher than the current potential of described 4th output N8, therefore, for the circuit structure be connected with described current sampling unit, described offset current I0 is negative current, namely described offset current I0 flows into described second current mirroring circuit 42 by the circuit structure be connected with described current sampling unit, as shown in Figure 3, described offset current I0 flows into described second current mirroring circuit 42 by the link of described first impedance unit R31 and described second impedance unit R32.
Similar with described first current mirroring circuit 41, described second current mirroring circuit 42 is also the current mirroring circuit be made up of metal-oxide-semiconductor.Particularly, described second current mirroring circuit 42 comprises grid the 4th connected metal-oxide-semiconductor M44 and the 5th metal-oxide-semiconductor M45.The grid of the 4th metal-oxide-semiconductor M44 described in first Electrode connection of described 4th metal-oxide-semiconductor M44 as described 3rd input N5, second electrode of described 4th metal-oxide-semiconductor M44 is as described 3rd output N7.First electrode of described 5th metal-oxide-semiconductor M45 is as described four-input terminal N6, and second electrode of described 5th metal-oxide-semiconductor M45 is as described 4th output N8.
In the present embodiment, described first metal-oxide-semiconductor M41, the second metal-oxide-semiconductor M42 and the 3rd metal-oxide-semiconductor M43 are PMOS, and the first electrode of each transistor is the source electrode of PMOS, and the second electrode of each transistor is the drain electrode of PMOS; Described 4th metal-oxide-semiconductor M44 and the 5th metal-oxide-semiconductor M45 is NMOS tube, and the first electrode of each transistor is the drain electrode of NMOS tube, and the second electrode of each transistor is the source electrode of NMOS tube.Certainly, the present invention does not limit this, and those skilled in the art can also do other distortion to transistor according to actual needs.
Below the operation principle of described current sampling unit is described.
The current sampling unit that the present embodiment provides, the electric current that described first current source I42 and the second current source I43 provides is equal, and meanwhile, by the feedback effect of described first metal-oxide-semiconductor M41, the current potential of described first input end N1 and the second input N2 is equal.If without described first metal-oxide-semiconductor M41, directly be connected with described first input end N1 by described 3rd input N5, due to the channel-length modulation of metal-oxide-semiconductor, the current potential of described first input end N1 and the second input N2 is unequal, and the described offset current I0 precision that sampling obtains is lower.
For convenience of describing, assuming that the current potential of described first resistance R41 and described second resistance R42 link is v1, the current potential of described first resistance R41 and described 3rd resistance R43 link is v2, the resistance value of described first resistance R41 is r41, the resistance value of described second resistance R42 and described 3rd resistance R43 is r42, and the current potential of described first input end N1 and described second input N2 is v3.According to Ohm's law, flow through current value i42=(v1-v3) the ÷ r42 of the electric current of described second resistance R42, flow through current value i43=(v2-v3) the ÷ r42 of the electric current of described 3rd resistance R43.
Continue with reference to figure 7, the electric current flowing through described second resistance R42 is divided into two branch roads: a road flows into first electrode of described first metal-oxide-semiconductor M41, and another road flows into described first input end N1.The electric current provided due to described first current source I42 and the second current source I43 is equal, and the electric current flowing into described first input end N1 is equal, namely equal with the electric current flowing through described 3rd resistance R43 with the electric current flowing into described second input N2.
According to current node law, flow into current value i44=i42-i43=(v1-v3) ÷ r42-(v2-v3) ÷ r42=(v1-v2) the ÷ r42 of the electric current of first electrode of described first metal-oxide-semiconductor M41.(v1-v2) be the voltage difference at described first resistance R41 two ends, therefore, i44=r41 × i41 ÷ r42, wherein, i41 is the current value of described charging current I41.After obtaining the electric current of the first electrode flowing into described first metal-oxide-semiconductor M41, the electric current of described second current mirroring circuit 42 to the first electrode flowing into described first metal-oxide-semiconductor M41 carries out mirror image, and the image current of output is described offset current I0.
The current value of described offset current I0 can be arranged according to actual needs, by regulating the mirroring ratios of the resistance value r42 of the resistance value r41 of described first resistance R41, the second resistance R42 and the 3rd resistance R43 and described second current mirroring circuit 42, the current ratio of described offset current I0 and described charging current I41 can be changed, to regulate described offset current I0.
In sum, the voltage sampling circuit of the rechargeable battery that technical solution of the present invention provides, carries out voltage compensation to the pressure drop caused due to the internal resistance of cell and printed circuit board traces resistance, shortens the charging interval of battery and can not affect constant voltage charge precision.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (9)
1. a voltage sampling circuit for rechargeable battery, is characterized in that, comprises current sampling unit, the first impedance unit, the second impedance unit and the 3rd impedance unit, wherein,
Described current sampling unit is suitable for sampling to obtain offset current to the charging current of described rechargeable battery;
One end of described first impedance unit is suitable for inputting cell voltage, and the other end of described first impedance unit connects one end of described second impedance unit;
The other end of described second impedance unit connects one end of described 3rd impedance unit and is suitable for exporting the sampled voltage relevant to described offset current;
The other end ground connection of described 3rd impedance unit;
Described current sampling unit comprises the first resistance, the second resistance, the 3rd resistance, the first current mirroring circuit, the first current source, the second current source, the first metal-oxide-semiconductor and the second current mirroring circuit, wherein,
One end of described first resistance connects one end of described second resistance and is suitable for inputting described charging current, and the other end of described first resistance connects one end of described 3rd resistance and described rechargeable battery;
Described first current mirroring circuit comprises first input end, the second input, the first output and the second output, described first input end connects the other end of described second resistance and the first electrode of described first metal-oxide-semiconductor, described second input connects the other end of described 3rd resistance, described first output is by described first current source ground connection, and described second output connects the grid of described first metal-oxide-semiconductor and passes through described second current source ground connection;
Described second current mirroring circuit comprises the 3rd input, four-input terminal, the 3rd output and the 4th output, described 3rd input connects the second electrode of described first metal-oxide-semiconductor, described four-input terminal connects the other end of described first impedance unit, described 3rd output and the 4th output head grounding.
2. the voltage sampling circuit of rechargeable battery as claimed in claim 1, it is characterized in that, described first impedance unit, the second impedance unit and the 3rd impedance unit are resistive element.
3. the voltage sampling circuit of rechargeable battery as claimed in claim 1, it is characterized in that, the resistance value of described first impedance unit, the second impedance unit and the 3rd impedance unit is relevant to the current value of the internal resistance value of described rechargeable battery, the current value of described charging current and described offset current.
4. the voltage sampling circuit of rechargeable battery as claimed in claim 3, it is characterized in that, the resistance value of described first impedance unit, the second impedance unit and the 3rd impedance unit is according to I
s× r1 × (r1+r2+r3) ÷ (r2+r3)≤r0 × I
cdetermine, wherein, I
sfor the current value of described offset current, I
cfor the current value of described charging current, r0 is the internal resistance value of described rechargeable battery, and r1 is the resistance value of described first impedance unit, and r2 is the resistance value of described second impedance unit, and r3 is the resistance value of described 3rd impedance unit.
5. the voltage sampling circuit of rechargeable battery as claimed in claim 1, it is characterized in that, the resistance value of described second resistance and described 3rd resistance is equal.
6. the voltage sampling circuit of rechargeable battery as claimed in claim 1, it is characterized in that, the electric current that described first current source and described second current source provide is equal.
7. the voltage sampling circuit of rechargeable battery as claimed in claim 1, it is characterized in that, described first metal-oxide-semiconductor is PMOS; First electrode of described first metal-oxide-semiconductor is the source electrode of PMOS, and the second electrode of described first metal-oxide-semiconductor is the drain electrode of PMOS.
8. the voltage sampling circuit of rechargeable battery as claimed in claim 1, is characterized in that, described first current mirroring circuit comprises the second connected metal-oxide-semiconductor of grid and the 3rd metal-oxide-semiconductor;
First electrode of described second metal-oxide-semiconductor as described first input end, the grid of the second metal-oxide-semiconductor described in the second Electrode connection of described second metal-oxide-semiconductor as described first output;
First electrode of described 3rd metal-oxide-semiconductor is as described second input, and the second electrode of described 3rd metal-oxide-semiconductor is as described second output.
9. the voltage sampling circuit of rechargeable battery as claimed in claim 1, is characterized in that, described second current mirroring circuit comprises the 4th connected metal-oxide-semiconductor of grid and the 5th metal-oxide-semiconductor;
The grid of the 4th metal-oxide-semiconductor described in the first Electrode connection of described 4th metal-oxide-semiconductor as described 3rd input, the second electrode of described 4th metal-oxide-semiconductor is as described 3rd output;
First electrode of described 5th metal-oxide-semiconductor is as described four-input terminal, and the second electrode of described 5th metal-oxide-semiconductor is as described 4th output.
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| CN103840639B (en) * | 2014-03-20 | 2016-08-17 | 绍兴光大芯业微电子有限公司 | Realize the circuit structure that line voltage detecting controls |
| CN105717967A (en) * | 2014-12-03 | 2016-06-29 | 中国电子科技集团公司第十八研究所 | Space power supply controller with static compensation current sampling circuit at power positive terminal |
| CN109120023A (en) * | 2017-06-26 | 2019-01-01 | 东莞新能德科技有限公司 | A kind of compensation method of charging voltage, device, battery and terminal device |
| CN108732411B (en) * | 2018-07-27 | 2023-10-27 | 上海艾为电子技术股份有限公司 | Self-adaptive sampling circuit and switch charging chip thereof |
| CN111463849B (en) * | 2020-03-25 | 2022-04-29 | 无锡艾为集成电路技术有限公司 | Charging method of charging circuit, charging chip and equipment |
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| CN201032688Y (en) * | 2006-11-01 | 2008-03-05 | 周海 | Positive and negative pulse charger |
| CN201918909U (en) * | 2011-01-04 | 2011-08-03 | 厦门绿洋电气有限公司 | Three-phase high-voltage power supply for electric precipitation |
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| CN201032688Y (en) * | 2006-11-01 | 2008-03-05 | 周海 | Positive and negative pulse charger |
| CN201918909U (en) * | 2011-01-04 | 2011-08-03 | 厦门绿洋电气有限公司 | Three-phase high-voltage power supply for electric precipitation |
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