CN103515940B - Transient voltage suppresser circuit with for diode element and manufacture method thereof wherein - Google Patents
Transient voltage suppresser circuit with for diode element and manufacture method thereof wherein Download PDFInfo
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- CN103515940B CN103515940B CN201210205997.5A CN201210205997A CN103515940B CN 103515940 B CN103515940 B CN 103515940B CN 201210205997 A CN201210205997 A CN 201210205997A CN 103515940 B CN103515940 B CN 103515940B
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Abstract
Does the present invention propose a kind of transient voltage suppresser (transient? voltage? suppressor, TVS) circuit with for diode element and manufacture method thereof wherein. Transient voltage suppresser circuit is in order to be coupled to protected circuit, and then the instantaneous voltage amplitude of restriction input protected circuit, and it comprises straining element and at least one diode element. Diode element is formed in substrate, comprising: wellblock, is formed under upper surface of base plate; Marker space, is formed under upper surface; Forward district of the first conductivity type, is formed at below the upper surface of marker space one side; The second reverse district of conductivity type, is formed at below the upper surface of marker space opposite side, and wherein forward district and reverse district are separated by marker space; And buried regions, being formed in the substrate of below, wellblock, it has the conductivity type identical with wellblock, and the impurity concentration of this buried regions is higher than the impurity concentration of this wellblock.
Description
Technical field
The present invention relates to a kind of transient voltage suppresser (transientvoltagesuppressor, TVS)Circuit with for diode element and manufacture method thereof wherein, refer to that especially one can bearThe TVS circuit of high forward current with for diode element and manufacture method thereof wherein.
Background technology
Figure 1A show typical transient voltage suppresser (transientvoltagesuppressor,TVS) circuit 1, in order to couple with at least one protected circuit 2, and then restriction is defeated from inputGo out the amplitude of the instantaneous voltage of pad 3, to protect protected circuit 2 to avoid being had high-tensionInstantaneous signal (as static) infringement. Generally speaking, TVS circuit 1 comprises straining element S1, usesWith the voltage amplitude good fortune of the above-mentioned instantaneous signal of clamp, and absorb its electric current. Due to this straining element S1Need to, at the very short high electric current of time internal consumption, therefore there is large-area PN junction, also because ofThis makes it have very high parasitic capacitance; Thus, when protected circuit 2 normal operatingsTime, be subject to the impact of this high parasitic capacitance, make its service speed slack-off, and limited elementRange of application.
Fig. 3 A and Fig. 3 B show the diode element 100 of prior art for TVS circuitCross-sectional schematic and impurity concentration simulation distribution figure. As shown in Figure 3A, prior art diodeElement 100 is formed in substrate 11, comprises N-type wellblock 13, field oxide region 12 and isolated district12a, P type be district 15 and the reverse district 16 of N-type forward. Fig. 3 B shows prior art diode elementIn 100, from the forward impurity concentration simulation distribution below the upper surface of 15 positions, district of P typeFigure.
Improve the slack-off method of aforementioned protected circuit 2 service speeds, as shown in Figure 1A,Between protected circuit 2 and straining element S1, insert at least one parasitic capacitance less twoUtmost point tube elements D1. Diode element D1 oppositely docks with the PN junction in straining element S1,The diode element D1 so that electric current is forward flowed through, and absorb high electric current by straining element S1; ThisKind method is utilized the mode of low capacitances in series high capacitance, to reduce capacitance, improves protected electricityThe service speed on road 2. Although this practice can be improved the too high problem of straining element S1 capacitance,But diode element D1 still must forward bear the high electric current of instantaneous signal from input and output pad 3,Therefore, if will keep its lower capacitance, the instantaneous signal electric current that TVS circuit 1 can bearValue will decline, range of application that so also can restricted T VS circuit 1.
In view of this, the present invention, for above-mentioned the deficiencies in the prior art, proposes a kind of TVS electricityRoad with for diode element and manufacture method thereof wherein, to improve, TVS circuit can bearCurrent value, and increase protection and the range of application of circuit.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art and defect, proposes a kind of instantaneous voltageSuppressor circuit with for diode element and manufacture method thereof wherein.
For reaching above-mentioned purpose, with regard to one of them viewpoint speech, the invention provides a kind of instantaneous voltageSuppressor circuit, in order to be coupled to a protected circuit, and then restriction one this protected electricity of inputThe amplitude of the instantaneous voltage on road, this transient voltage suppresser circuit comprises: a straining element, toolThere is a PN junction, in order to limit the amplitude of this instantaneous voltage; And at least one diode element,Be coupled between this protected circuit and this straining element, and oppositely dock with this PN junction; ItsIn, this diode element is formed in one first conductivity type substrate, and this substrate has a upper surface,This diode element comprises: one first conductivity type or the second conductivity type wellblock, be formed at table on thisIn this substrate under face; One marker space, is formed in this substrate under this upper surface, by overlookingFigure looks it, and this marker space is arranged in this wellblock; One first forward district of conductivity type, is formed at this pointThis upper surface below of septal area one side; The one second reverse district of conductivity type, is formed at this marker space anotherThis upper surface below of one side, and this forward district and this You Gai marker space, reverse district separate; AndOne buried regions, is formed in this substrate of this below, wellblock, and it has the conduction identical with this wellblockType, and the impurity concentration of this buried regions is higher than the impurity concentration of this wellblock.
With regard to another viewpoint, it is a kind of for transient voltage suppresser circuit that the present invention also providesDiode element, in order to this transient voltage suppresser circuit in comprise one there is PN junctionStraining element oppositely dock, this is used for the diode element shape of transient voltage suppresser circuitBe formed in one first conductivity type substrate, this substrate has a upper surface, and this diode element comprises:One first conductivity type or the second conductivity type wellblock, be formed in this substrate under this upper surface; OneMarker space, is formed in this substrate under this upper surface, looks it by top view, this separation positionIn this wellblock; One first forward district of conductivity type, is formed at table on this of this field oxide region one sideFace below; The one second reverse district of conductivity type, is formed at this upper surface of this field oxide region opposite sideBelow, and this forward district and this reverse district are separated by this field oxide region; And a buried regions, formIn this substrate of this below, wellblock, it has the conductivity type identical with this wellblock, and this buried regionsImpurity concentration higher than the impurity concentration of this wellblock.
Just another viewpoint is sayed again, and it is a kind of for transient voltage suppresser electricity that the present invention also providesDiode element manufacture method in road, this diode element in order to this transient voltage suppresserThe straining element with PN junction comprising in circuit oppositely docks, this manufacture method bagContain: one first conductivity type substrate is provided, and this substrate has a upper surface; Form one first conductionIn type or the second conductivity type wellblock this substrate under this upper surface, and form a buried regions in this wellIn this substrate of below, district, this buried regions has the conductivity type identical with this wellblock, and this buried regionsImpurity concentration is higher than the impurity concentration of this wellblock; Form a marker space this base under this upper surfaceIn plate, look it by top view, this marker space is arranged in this wellblock; Form one first conductivity type suitableTo this upper surface below of Yu Gai marker space, district one side; And the formation one second reverse district of conductivity typeIn this upper surface below of this marker space opposite side, and this forward district and this reverse district by this separationSeparate out.
In above-mentioned transient voltage suppresser circuit, this straining element can comprise a varistor element,The Zener diode of one Zener diode, two tandem dockings or a non-grid metal oxide halfConductor (metaloxidesemiconductor, MOS) element.
Wherein, in a kind of preferred embodiment, this marker space comprises a field oxide region or a pure matter halfConductor region.
Wherein, in a kind of preferred embodiment, this diode element is multiple, and be arranged in this press downElements on either side processed.
In a kind of preferred embodiment, it is looked by top view in this buried regions and this wellblock therein, fixedJustice is in same area.
Illustrate in detail below by specific embodiment, when being easier to understand object of the present invention, skillArt content, feature and effect of reaching thereof.
Brief description of the drawings
Figure 1A show typical transient voltage suppresser (transientvoltagesuppressor,TVS) circuit 1;
In Figure 1B-1D display application TVS circuit of the present invention, several embodiment of straining element;
In Fig. 2 display application TVS circuit of the present invention, the preferably side of arrangement of the one of diodeFormula;
Fig. 3 A-3B shows prior art analysing and observe for the diode element 100 of TVS circuitSchematic diagram and impurity concentration simulation distribution figure;
Fig. 4 A and 4B show first embodiment of the present invention;
Fig. 5 shows second embodiment of the present invention;
Fig. 6 shows the present invention the 3rd embodiment;
Fig. 7 shows the schematic top plan view of first embodiment diode element 200;
Fig. 8 shows the TVS circuit 100 of prior art and utilizes TVS circuit 200 of the present inventionThe characteristic curve of electric capacity to voltage;
Fig. 9 shows the TVS circuit 100 of prior art and utilizes TVS circuit 200 of the present inventionUnder the situation of electrostatic test, the characteristic curve of temperature to electric current.
Symbol description in figure
1TVS circuit
2 protected circuits
3 input and output pads
11,21,31,41 substrates
12,22,32 field oxide regions
12a, 22a, 32a completely cuts off district
13,23,33,43 wellblocks
24,34,44 buried regions
15,25,35,45 districts forward
16,26,36,46 reverse districts
42 pure matter semiconductor regions
100,200,300,400 diode elements
D1, Dn, Dp diode element
D2 Zener diode
Q1MOS element
Detailed description of the invention
Graphic in the present invention all belongs to signal, is mainly intended to represent between fabrication steps and each layerOrbution up and down, as for shape, thickness and width not according to scale.
Refer to Fig. 4 A and 4B, show first embodiment of the present invention, Fig. 4 A shows useDiode unit in transient voltage suppresser (transientvoltagesuppressor, TVS) circuitThe cross-sectional schematic of part 200. As shown in Figure 4 A, diode element 200 is formed at substrate 21In, it has upper surface 21a. Then form such as but not limited to N-type wellblock 23 in upper surfaceIn substrate 21 under 21a. In addition also form buried regions 24 in the substrate 21 of 23 belows, wellblock,Buried regions 24 has the conductivity type identical with wellblock 23, in the present embodiment, and namely N-type,And the N-type impurity concentration of buried regions 24 is higher than the N-type impurity concentration of wellblock 23. Buried regions 24 and wellThe formation order in district 23 can be exchanged. Then form field oxide region 22 and isolated district 22a in upper tableIn substrate 21 under face 21a, look it by top view (not shown), field oxide region 22 is positioned at wellblockIn 23; Wherein, field oxide region 22 is for example shallow trench isolation (shallowtrench with isolated district 22aIsolation, STI) oxidation of structure or region as shown in the figure (localoxidationofsilicon,LOCOS) structure. Then, form respectively forward upper in field oxide region 22 1 sides of district 25 of P type21a below, surface, with the reverse district 26 of N-type in the upper surface 21a of field oxide region 22 opposite sidesBelow, and forward district 25 is separated by field oxide region 22 with reverse district 26.
Next refer to Fig. 4 B, show in first embodiment Fig. 4 A dotted line arrow directionOn impurity concentration simulation distribution figure. As shown in Figure 4 B, the longitudinal axis represents impurity concentration, transverse axis generationTable is apart from the degree of depth of upper surface 21a; Can understand forward district of P type by impurities concentration distribution curve25, N-type wellblock 23, n type buried layer 24 and the impurity concentration of P type substrate 21 and the pass of the degree of depthSystem. Relatively prior art Fig. 3 B and the present embodiment Fig. 4 B, can find out the present embodiment with respect toPrior art shown in Fig. 3 A and 3B, comprises in addition buried regions 24 and is formed under wellblock 23.The advantage of this kind of arrangement comprises: in component specification, due to many impurity concentrationsHigh buried regions, can improve in TVS circuit, the instantaneous forward current that diode element can bear,Increase the range of application of TVS circuit; On processing procedure, wellblock 23 and buried regions 24, all can be in order toForm and shield by identical micro-photographing process step, only need to increase the implanted ions that forms buried regions 24Fabrication steps, therefore can increase manufacturing cost hardly.
In detail, when protected circuit is during in normal operating, voltage and the electric current of its operation signalRelatively little, therefore, the operation signal during for this normal operating, is to be mainly subject to two utmost pointsIn pipe 200, the P type lower capacitive effect that forward district 25YuNXing wellblock 23 produces,The electric capacity of the diode 100 of its electric capacity and prior art is suitable. On the other hand, when protected electricityWhen road receives the instantaneous signal (as static) of high voltage and electric current, this instantaneous signal can be subject to PThe higher capacitance impact that the type buried regions 24 that forward district 25 and N-type impurity concentration are higher produces,Therefore can bear higher forward current. Generally speaking, utilize TVS circuit of the present invention, inWhen protected circuit normal operating, its be subject to the capacitive effect of TVS circuit less or with existing skillArt is suitable, and makes the service speed of protected circuit very fast or suitable with prior art; But work as toolThere is the instantaneous signal (as static) of high instantaneous voltage and electric current, when input protected circuit, utilize thisThe TVS circuit of invention, can utilize it to have the characteristic that instantaneous electric capacity is higher, bears and consumesHigh electric current, instantaneous voltage and electric current that protected circuit can be born are higher, to strengthen itElectrostatic protection ability.
Fig. 5 shows second embodiment of the present invention, for applying in TVS circuit of the present inventionThe cross-sectional schematic of diode element 300. As shown in the figure, compared to first embodiment,In the present embodiment, diode element 300 is formed in substrate 31, comprise field oxide region 32 withIsolated district 32a, p type wells district 33, p type buried layer 34, P type be district 35, reverse with N-type forwardDistrict 36. The present embodiment is intended to explanation, and in diode of the present invention, wellblock and buried regions can be sameFor N-type (as first embodiment) or P type (as second embodiment), only should be noted that its conductionType is identical, and the impurity concentration of buried regions is higher than the impurity concentration of wellblock.
Fig. 6 shows the present invention the 3rd embodiment, for applying in TVS circuit of the present inventionThe cross-sectional schematic of diode element 400. As shown in the figure, compared to first embodiment,In the present embodiment, diode element 400 is formed in substrate 41, comprises pure matter semiconductor region42, N-type wellblock 43, n type buried layer 44, P type forward district 45, with the reverse district 46 of N-type. ThisEmbodiment is intended to explanation, in diode of the present invention, not only can utilize field oxide region to separate suitableTo district and reverse district, can also utilize pure matter semiconductor region to separate forward district and reverse district. So-calledPure matter semiconductor region refers to and substantially approaches the semi-conductive interval of pure matter (intrinsic), namely notThe semiconductor regions of doping or low-doped impurity.
Refer to Figure 1B-1D and Fig. 2, in display application TVS circuit of the present invention, suppressSeveral embodiment of element. As shown in Figure 1B-1D and Fig. 2, straining element for example but do not limitIn be varistor element V1 as shown in Figure 1B, Zener diode D2 as shown in Figure 1 C,The Zener diode D2 of two tandem dockings as shown in Fig. 1 D or non-grid as shown in Figure 2Metal-oxide semiconductor (MOS) (metaloxidesemiconductor, MOS) element Q1.
Please continue to refer to Fig. 2, in display application TVS circuit of the present invention, one is preferably pacifiedRow's mode, for: diode element Dp and Dn are multiple, and are arranged in straining element, at thisPlace is MOS element Q1 both sides, and wherein, diode element Dp is such as but not limited to comprising NThe wellblock of type and buried regions, and diode element Dn such as but not limited to the wellblock that comprises P type with buryLayer.
Refer to Fig. 7, show the schematic top plan view of first embodiment diode element 200. AsShown in figure, apply in TVS circuit of the present invention buried regions 24 and the wellblock of diode element 20023 look it by top view Fig. 7, are defined in same area, namely as shown in the figure, and for what overlapRegion, and can be defined by same micro-photographing process step, thus, can be hardlyIncrease the cost of manufacturing, strengthen the ability that TVS circuit bears instantaneous signal.
Refer to Fig. 8, show the TVS circuit 100 of prior art and utilize TVS of the present inventionThe characteristic curve of the electric capacity of circuit 200 to voltage, can find out that two curves almost overlap, thisRepresent that the size of its electric capacity is at above-mentioned two kinds of TVS circuit when protected circuit is during in normal operating100 with in 200, be identical, as previously mentioned, this also represents to apply, and the present invention increases reasonBuried regions, in normal operating, does not affect its electric capacity, does not just affect its service speed yet.
Then refer to Fig. 9, show the TVS circuit 100 of prior art and utilize of the present inventionTVS circuit 200 under the situation of electrostatic test, the characteristic curve of temperature to electric current, wherein,In certain temperature range, can find out that TVS circuit 100 and 200 bears instantaneous signal electricityThe size of stream, as shown in the figure, compared to prior art TVS circuit 100, utilizes of the present inventionTVS circuit 200 can bear higher electric current. That is to say, according to Fig. 8 and Fig. 9, canUnderstand, utilize the present invention, do not affecting under normal operational speeds, can bear higher instantaneousElectric current; On the other hand, also can say, utilize the present invention, bear identical transient current feelingsUnder condition, can promote the normal operational speeds of protected circuit.
Below for preferred embodiment, the present invention being described, is the above, only for making thisThose skilled in the art are easy to understand content of the present invention, are not used for limiting right model of the present inventionEnclose. Under same spirit of the present invention, those skilled in the art can think and various equivalence changes.For example, not affecting under the main characteristic of element, can add other fabrication steps or structure, asDeep-well district etc.; And for example, in the above-mentioned embodiment about diode element, manufacture diode elementMethod step can change, before wellblock and buried regions can be formed at field oxide region, also can shapeAfter being formed in field oxide region; And for example, wellblock can utilize identical shielding definition with buried regions, certainly alsoCan anyly shield, and form wellblock and buried regions with comprehensive impurity implanted prosthetics.Scope of the present invention should contain above-mentioned and other all equivalence variations.
Claims (12)
1. a transient voltage suppresser circuit, in order to be coupled to a protected circuit, and then the amplitude of the instantaneous voltage of restriction one this protected circuit of input, it is characterized in that, this transient voltage suppresser circuit comprises:
One straining element, has a PN junction, in order to limit the amplitude of this instantaneous voltage; And
At least one diode element, is coupled between this protected circuit and this straining element, and oppositely docks with this PN junction;
Wherein, this diode element is formed in a P type substrate, and this substrate has a upper surface, and this diode element comprises:
One N-type wellblock, is formed in this substrate under this upper surface;
One marker space, is formed in this substrate under this upper surface, is looked by top view, and this marker space is arranged in this wellblock;
One forward district of P type, is formed at below this upper surface of this marker space one side;
The one reverse district of N-type, is formed at this upper surface below of this marker space opposite side, and this forward district and this You Gai marker space, reverse district separate; And
One n type buried layer, be formed in this substrate of this below, wellblock, and the impurity concentration of this buried regions is higher than the impurity concentration of this wellblock.
2. transient voltage suppresser circuit as claimed in claim 1, wherein, this marker space comprises a field oxide region or a pure matter semiconductor region.
3. transient voltage suppresser circuit as claimed in claim 1, wherein, this straining element comprises one of following element: the Zener diode of a varistor element, a Zener diode, two tandem dockings or a non-grid metal oxide semiconductor device.
4. transient voltage suppresser circuit as claimed in claim 1, wherein, this diode element is multiple, and is arranged in this straining element both sides.
5. transient voltage suppresser circuit as claimed in claim 1, wherein, it is looked by top view in this buried regions and this wellblock, is defined in same area.
6. the diode element for transient voltage suppresser circuit, in order to oppositely to dock with the straining element with PN junction comprising in this transient voltage suppresser circuit, this diode element that is used for transient voltage suppresser circuit is formed in a P type substrate, this substrate has a upper surface, it is characterized in that, this diode element comprises:
One N-type wellblock, is formed in this substrate under this upper surface;
One marker space, is formed in this substrate under this upper surface, looks it by top view, and this marker space is arranged in this wellblock;
One forward district of P type, is formed at below this upper surface of this marker space one side;
The one reverse district of N-type, is formed at this upper surface below of this marker space opposite side, and this forward district and this reverse district are separated by a field oxide region; And
One n type buried layer, be formed in this substrate of this below, wellblock, and the impurity concentration of this buried regions is higher than the impurity concentration of this wellblock.
7. the diode element for transient voltage suppresser circuit as claimed in claim 6, wherein, this marker space comprises a field oxide region or a pure matter semiconductor region.
8. the diode element for transient voltage suppresser circuit as claimed in claim 6, wherein, this straining element comprises one of following element: the Zener diode of a varistor element, a Zener diode, two tandem dockings or a non-grid metal oxide semiconductor device.
9. the diode element for transient voltage suppresser circuit as claimed in claim 6, wherein, it is looked by top view in this buried regions and this wellblock, is defined in same area.
10. for the diode element manufacture method of transient voltage suppresser circuit, this diode element, in order to oppositely to dock with the straining element with PN junction comprising in this transient voltage suppresser circuit, is characterized in that, this manufacture method comprises:
One P type substrate is provided, and this substrate has a upper surface;
Form in this substrate under this upper surface of a N-type wellblock, and form a n type buried layer in this substrate of this below, wellblock, and the impurity concentration of this buried regions is higher than the impurity concentration of this wellblock;
Form in this substrate under this upper surface of a marker space, look it by top view, this marker space is arranged in this wellblock;
Form forward this upper surface below of district Yu Gai marker space one side of a P type; And
Form this upper surface below of the reverse district of a N-type Yu Gai marker space opposite side, and this forward district and this You Gai marker space, reverse district separate.
The 11. diode element manufacture methods for transient voltage suppresser circuit as claimed in claim 10, wherein, this marker space comprises a field oxide region or a pure matter semiconductor region.
The 12. diode element manufacture methods for transient voltage suppresser circuit as claimed in claim 10, wherein, it is looked by top view in this buried regions and this wellblock, is defined in same area.
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| CN201210205997.5A CN103515940B (en) | 2012-06-18 | 2012-06-18 | Transient voltage suppresser circuit with for diode element and manufacture method thereof wherein |
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| CN111740400B (en) * | 2020-06-22 | 2023-02-14 | 广东九联科技股份有限公司 | Circuit and method for reducing influence of ESD device on high-speed signal |
| CN113380787B (en) * | 2021-08-13 | 2022-02-25 | 上海维安半导体有限公司 | Bidirectional transient voltage suppression device and preparation method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101557103A (en) * | 2008-04-11 | 2009-10-14 | 上海韦尔半导体股份有限公司 | Transient voltage suppresser diode and manufacturing method thereof |
| CN101714759A (en) * | 2009-11-11 | 2010-05-26 | 上海长园维安微电子有限公司 | Low-capacitance bidirectional ESD protective device and preparation method thereof |
| CN102290419A (en) * | 2011-08-24 | 2011-12-21 | 浙江大学 | Transient voltage suppressor based on Zener diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7538997B2 (en) * | 2006-05-31 | 2009-05-26 | Alpha & Omega Semiconductor, Ltd. | Circuit configurations to reduce snapback of a transient voltage suppressor |
| US20090115018A1 (en) * | 2007-11-01 | 2009-05-07 | Alpha & Omega Semiconductor, Ltd | Transient voltage suppressor manufactured in silicon on oxide (SOI) layer |
| US8237193B2 (en) * | 2010-07-15 | 2012-08-07 | Amazing Microelectronic Corp. | Lateral transient voltage suppressor for low-voltage applications |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101557103A (en) * | 2008-04-11 | 2009-10-14 | 上海韦尔半导体股份有限公司 | Transient voltage suppresser diode and manufacturing method thereof |
| CN101714759A (en) * | 2009-11-11 | 2010-05-26 | 上海长园维安微电子有限公司 | Low-capacitance bidirectional ESD protective device and preparation method thereof |
| CN102290419A (en) * | 2011-08-24 | 2011-12-21 | 浙江大学 | Transient voltage suppressor based on Zener diode |
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