CN103514322A - Phase change memory unit SPICE model system considering heat accumulation effects and application of phase change memory unit SPICE model - Google Patents

Abstract

The invention discloses a phase change memory unit SPICE model system considering heat accumulation effects. The system comprises a unit resistor simulation module, a temperature calculation module, a crystallization rate calculation module, a non-crystallization rate calculation module and a phase change module. The unit resistor simulation module is used for simulating a phase change memory unit resistor. The temperature calculation module is used for aiming at an applied continuous pulse sequence to calculate the temperature of phase change layers, of a memory unit considering the heat accumulation effects at pulse signals, at the moment of ending of each pulse signal. The crystallization rate calculation module is used for calculating the volume of the phase change layers crystallizing per unit time. The non-crystallization rate calculation module is used for calculating the volume of the phase change layers non-crystallized per unit time. The phase change module is used for selecting the crystallization rate or the non-crystallized rate to calculate the non-crystallization ratio. The invention further discloses the application of a phase change memory unit SPICE model. The phase change memory unit SPICE model is used for simulating multiple-valued storage of the phase change memory unit. The phase change memory unit SPICE model system considering the heat accumulation effects is capable of accurately simulating the resistor changes of the phase change memory unit, and especially under the actions of continuous pulses, the system is capable of accurately simulating the phase change memory unit resistor in the multiple-valued storage technology of the phase change memory when the heat accumulation effects are obvious.

Description

Consider phase-changing memory unit SPICE model system and the application of thermal accumlation effect

Technical field

The invention belongs to integrated circuit specialized simulation program (Simulation Program with IC Emphasis, SPICE) model system field, more specifically, relate to a kind of phase-changing memory unit SPICE model system and application of considering thermal accumlation effect.

Background technology

Phase transition storage utilization can be stablized the material of phase transformation and be stored data.Typical phase-change material is GST compound, germanium (Ge), antimony (Sb) and tellurium (Te), consists of.Can there is reversible transition in material, the resistance of crystalline state is lower between crystalline state and amorphous state, and amorphous resistance is higher.The obvious resistance value of difference that different phase is corresponding can be used for representing the logic state of data storage.In the process to phase transition storage data writing, generally adopt electric pulse.By applying the electric pulse that a pulsewidth is relatively long, amplitude is relatively low, make the temperature of phase-change material rise to Tc and maintain a period of time, material transition is crystalline state, and this process is called as " set " process, and crystalline state is called " set " state.By applying an electric pulse that pulsewidth is relatively short, amplitude is relatively high, make the temperature of phase-change material rise to fusing point cooling fast more above, material transition is amorphous state, and this process is called as " reset " process, and amorphous state is called as " reset " state.In the process of reading phase change memories data, apply amplitude electric pulse very low, that can not change unit crystallization state, the resistance value of measuring unit.Phase transition storage, due to can be integrated with CMOS technique, has the advantages such as high speed, low pressure, low-power consumption, integrated level height, is considered to promise to be most the device of non-volatility memorizer of future generation.

For the commercial applications of phase transition storage, good chip circuit design is very important.The EDA(Electronic Design Automation extensively adopting in modem electronic circuitry design), it is automatic electronic design, can utilize the work such as simulation assessment that computing machine has manually been difficult to design proposal, design verification, design optimization, become the technical way of integrated circuit (IC) design.The input file of circuit simulating software generally comprises circuit structure description document and component models file, and the two forms integrated circuit model system.Therefore, can accurately simulate the SPICE model system of phase-changing memory unit of electrology characteristic most important for phase change memory chip circuit design.

Current existing phase-changing memory unit SPICE model system comprises: phase change resistor module, temperature computation module, state-storage module and percent crystallization in massecuite computing module, the temperature variation causing by calculating electric pulse, calculate the percent crystallization in massecuite of phase-change resistor, thus phase-changing memory unit resistance variations situation under analog electrical signal effect.Although existing phase-changing memory unit SPICE model system can more accurately be simulated the resistance variations of phase-changing memory unit under Sing plus effect, this model system is not considered the impact of thermal accumlation effect on phase-changing memory unit resistance.Along with technical development, the read or write speed of memory cell is accelerated, access times increase, under pulse train effect, the thermal accumlation effect of device is more obvious, existing model system is obvious for the phase-changing memory unit resistance deviation of simulation under pulse train effect, can not provide reliable reference for chip circuit design.In addition, because current existing phase-changing memory unit SPICE model system can not accurately be simulated the real resistance variations of phase-changing memory unit, therefore cannot be for the chip design of multilevel storage technology.

Summary of the invention

Above defect or Improvement requirement for prior art, the invention provides a kind of phase-changing memory unit SPICE model system of considering thermal accumlation effect, this model system can be used for simulating multilevel storage, its object is accurately to simulate phase-changing memory unit change in resistance under pulse train effect, solve thus existing phase-changing memory unit SPICE model system fast in read or write speed, situation Imitating phase-changing memory unit resistance value and the obvious technical matters of truth deviation that access times are many, solve the problem that there is no applicable phase transition storage SPICE model system simulation multilevel storage simultaneously.

For achieving the above object, according to one aspect of the present invention, provide a kind of phase-changing memory unit SPICE model system, having comprised:

Cell resistance analog module, calculates the real-time resistance of phase-changing memory unit for the amorphous rate providing according to phase transformation module, and according to the real-time resistance of phase transition storage that calculates gained, the voltage applying or current signal is made to corresponding output;

Temperature computation module, be used for according to environment temperature and each pulse signal ends moment phase-changing memory unit phase change layer temperature of pulse heat calculation of effect, for the continuous impulse sequence applying, consider thermal accumlation effect under pulse signal, environment temperature is updated to real-time phase change layer temperature constantly at each end-of-pulsing;

, for according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is the phase change layer volume of crystallization in crystallization velocity computing module;

, for according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is decrystallized phase change layer volume in decrystallized rate calculations module;

Phase transformation module, when phase change layer temperature is during higher than phase-change material fusing point, select decrystallized speed as transformation rate, when phase change layer temperature is during lower than phase-change material fusing point, select crystallization velocity as transformation rate, according to transformation rate, calculate the amorphous rate of phase-changing memory unit.

Preferably, described temperature computation module is calculated the method for real-time phase change layer temperature and is:

$T=\∫\frac{\mathrm{IV}-(T-T_a)[1/r_{\mathrm{tb}}+1(r_{\mathrm{tgst}}+r_{\mathrm{tt}})]}{C_t}\mathrm{dt}+T_a,$

Wherein T is phase change layer temperature, and t is the time, and I is phase-changing memory unit electric current, and V is phase-changing memory unit both end voltage, T _afor environment temperature, each end-of-pulsing is constantly using real-time phase change layer temperature as environment temperature, r _tt, r _tb, r _tgstbe respectively top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, C _tfor unit thermal capacitance;

Preferably, described phase-changing memory unit SPICE model system, its crystallization velocity computing module is added by nucleation rate and growth rate the phase change layer volume that obtains occurring in the unit interval crystallization variation.

Preferably, described phase-changing memory unit SPICE model system, the decrystallized rate calculations method that its decrystallized rate calculations module adopts is:

v _aa＝a ₂(T-T _m)/(h ₁r _ta)，

Wherein, v _aafor decrystallized speed, T is the phase change layer temperature that temperature computation module obtains, T _mfor phase change layer fusing point, h ₁for the latent heat of fusion, r _tafor the thermal resistance of non-crystallization region, a ₂the scale-up factor that experiment records, for matching experimental result.

Preferably, described phase-changing memory unit SPICE model system, its phase transformation module comprises selects circuit and electric capacity, selects circuit to select crystallization velocity or decrystallized speed as transformation rate, and electric capacity is used for doing integral operation, calculates amorphous rate.

In general, the above technical scheme of conceiving by the present invention compared with prior art, temperature variation pulse signal being caused due to temperature computation module counts environment temperature, considered thermal accumlation effect, compared with prior art, improved under continuous impulse effect the accuracy of phase-changing memory unit resistance simulation, in addition, because crystallization velocity computing module calculates crystallization velocity method based on nucleating growth theory, simultaneously decrystallized rate calculations module adopts the latent heat of fusion to calculate the decrystallized speed of phase change layer, with respect to prior art, more press close to real phase change layer crystallization and decrystallized process, therefore can calculate more accurately amorphous rate, thereby improve the simulation accuracy to phase-change memory cell resistance.Due to phase-changing memory unit resistance under the accurate simulated series pulse action of phase-changing memory unit SPICE model system energy provided by the present invention, can provide reliable reference to chip circuit design, therefore can improve efficiency and the accuracy of chip design, shorten the product design cycle.

According to another aspect of the present invention, the present invention is applied to simulate phase transition storage multilevel storage by above-mentioned phase-changing memory unit SPICE model system.

Because phase-changing memory unit SPICE model system provided by the invention can accurately be simulated the resistance value of phase-changing memory unit, during the erasable process of simulation phase-changing memory unit, additional specific electrical signal, phase-changing memory unit SPICE model system can present corresponding resistance value, the phase-changing memory unit resistance of simulation can rise or drop to maximum resistance, arbitrary value between most low-resistance, can be used for the simulation of multilevel storage technology, while having solved current phase-changing memory unit SPICE model system simulation resistance uphill process, only can get highest resistance, can not present other resistances, thereby can not be applied to simulate the problem of multilevel storage.

Accompanying drawing explanation

Fig. 1 is the structural representation of phase-changing memory unit SPICE model system of the present invention;

Fig. 2 is the method schematic diagram that phase-changing memory unit SPICE model system of the present invention is upgraded environment temperature under continuous impulse effect;

Fig. 3 is temperature, the resistance variations curve map that phase-changing memory unit SPICE model system load pulses of the present invention causes;

Fig. 4 is simulation result and the experimental data comparison diagram that phase-changing memory unit SPICE model system of the present invention loads continuous impulse sequence;

Fig. 5 is the electrical resistance change in voltage curve map of phase-changing memory unit SPICE model system of the present invention emulation;

Fig. 6 is the multilevel storage simulation result schematic diagram of phase-changing memory unit SPICE model system of the present invention under different amplitude pulse;

In institute's drawings attached, identical Reference numeral is used for representing identical element or structure, and wherein: 1 is cell resistance analog module, 2 is temperature computation module, and 3 is crystallization velocity computing module, and 4 is decrystallized rate calculations module, and 5 is phase transformation module.

Embodiment

In order to make object of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein, only in order to explain the present invention, is not intended to limit the present invention.In addition,, in each embodiment of described the present invention, involved technical characterictic just can not combine mutually as long as do not form each other conflict.

A kind of phase-changing memory unit SPICE model system provided by the invention comprises: cell resistance analog module, temperature computation module, crystallization velocity computing module, decrystallized rate calculations module, phase transformation module.

Cell resistance analog module connects with other component models systems in integrated circuit as the interface of model system, according to crystal area proportion linear change rule, computing unit resistance, it is input as the electric signal of model system outside, as voltage, current impulse, be output as the corresponding real-time current value of phase-changing memory unit, magnitude of voltage.The calculation expression of cell resistance analog module simulation phase-changing memory unit resistance is:

R=R _resetC _a+R _set(1-C _a)，

Wherein, R is the resistance of phase-changing memory unit, R _resetthe maximum resistance of unit, R _setthe most low-resistance of unit, C _ait is the amorphous rate of this phase change cells of providing of phase transformation module.

Temperature computation module, for simulating phase change layer temperature.Joule heat, upper/lower electrode thermal resistance, phase change layer thermal resistance, unit thermal capacitance and environment temperature that temperature computation module produces according to pulse, calculate phase change layer temperature.For continuous impulse sequence, in order to simulate thermal accumlation effect, temperature computation module also must record environment temperature, and after each end-of-pulsing, environment temperature is updated to current phase change layer temperature, calculates phase change layer temperature while accepting pulse for next time.The calculation expression of temperature computation module simulation phase change layer temperature is:

$T=\∫\frac{\mathrm{IV}-(T-T_a)[1/r_{\mathrm{tb}}+1(r_{\mathrm{tgst}}+r_{\mathrm{tt}})]}{C_t}\mathrm{dt}+T_a,$

Wherein, T is phase change layer temperature, and t is the time, and I is phase-changing memory unit electric current, and V is phase-changing memory unit both end voltage, T _afor environment temperature, r _tt, r _tb, r _tgstbe respectively top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, C _tfor unit thermal capacitance.The computing formula of top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance is:

$r_{\mathrm{tb}}=a_1\frac{{10}^{-7}}{S},$

$r_{\mathrm{tt}}=r_{\mathrm{tb}}/2,$

$r_{\mathrm{tgst}}=\frac{C_a{d}_{\mathrm{gst}}}{{\mathrm{Sk}}_a}+\frac{(1-C_a)d_{\mathrm{gst}}}{{\mathrm{Sk}}_c},$

Wherein, a ₁be the scale-up factor that experiment records, for matching experimental result, S is the contact area of bottom electrode and phase change layer, C _athe amorphous rate of phase change resistor, d _gstthe thickness of phase change layer, k _a, k _cbe respectively the thermal conductivity of phase change layer in amorphous state and crystalline state.The computing formula of unit thermal capacitance is:

C _t＝τ/[1/r _tb+1/(r _tgst+r _tt)]，

Wherein, r _tt, r _tb, r _tgstbe respectively top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, τ is thermal time constant.

, according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is the phase change layer volume of crystallization in crystallization velocity computing module.Crystallization velocity computing module is based on nucleation-growth theory, by under the condition in uniform temperature and amorphous rate, phase change layer nucleation rate and growth rate are added, and as the phase change layer volume that crystallization occurred in the unit interval, are crystallization velocity, and output, its computing formula is:

v _ac＝-(P _nV _nV _a/V _m+S _aV _g)，

Wherein, v _accrystallization velocity, P _nthe nucleation probability of unit interval, V _nbe into Assessment of Nuclear Volume, V _anon-crystallization region volume, V _mthe molecular volume of phase-change material, S _athe interfacial area in non-crystallization region and crystallization region, V _git is growth rate.Each parameter calculation formula is as follows:

$P_n=\mathrm{\αexp}[-(E_{a1}+\frac{16\mathrm{\π}{\mathrm{\γ}}^3}{3\mathrm{\Δ}{G}^2})/\left(k_{B}T\right)],$

$V_n=\frac{4\mathrm{\π}}{3}{(2\mathrm{\γ}/\mathrm{\ΔG})}^3,$

$V_a=\frac{2\mathrm{\&pi;}}{3}{C}_a{{\mathrm{<figure-callout\; id="3"\; label="d\; gst"\; filenames="HDA0000380148000000011.png"\; state="\{\{state\}\}">d</figure-callout>}}_{\mathrm{gst}}}^3,$

$S_a=2\mathrm{\&pi;}{\left(\frac{3V_a}{2\mathrm{\&pi;}}\right)}^{2/3},$

$V_g={\mathrm{fa}}_0\mathrm{\&alpha;}[1-\exp (-\frac{\mathrm{\&Delta;G}}{k_{B}T})]\exp (-\frac{E_{a2}}{k_{B}T}),$

Wherein, E _a1be nucleation energy of activation, Δ G is Excess Gibbs Free Energy, k _bbe Boltzmann constant, T is phase change layer temperature, and γ is the excess free energy of unit area, C _athe amorphous rate of phase change resistor, d _gstbe the thickness of phase change layer, f is the growth pattern factor, a ₀be atomic transition distance, α is the frequency factor of atomic vibration, E _a2atomic scattering energy of activation.Wherein:

$\mathrm{\&Delta;G}=h_1\frac{T_m-T}{T_m},$

f＝exp[-0.8/(1-T/T _m)]，

Wherein, T _mbe the fusing point of phase change layer material, T is phase change layer temperature, h ₁the latent heat of fusion for phase change layer material.

, according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is decrystallized phase change layer volume in decrystallized rate calculations module.Decrystallized rate calculations module, according to environment temperature, amorphous rate, calculates decrystallized speed, and its computing formula is:

v _aa＝a ₂(T-T _m)/(h ₁r _ta)，

Wherein, v _aafor decrystallized speed, a ₂for adjustability coefficients, T is the phase change layer temperature of temperature computation module simulation, T _mfor phase change layer fusing point, h ₁for the latent heat of fusion of phase change layer material, r _tathermal resistance for non-crystallization region.The thermal resistance calculation formula of non-crystallization region is:

r _ta＝C _ad _gst/(Sk _a)，

Wherein, C _athe amorphous rate of phase change resistor, d _gstbe the thickness of phase change layer, S is the contact area of bottom electrode and phase change layer, k _afor phase change layer is in amorphous thermal conductivity.

Phase transformation module, the amorphous rate of calculating phase-changing memory unit.Phase transformation module comprises selects circuit and electric capacity, according to phase change layer temperature, select crystallization velocity or decrystallized speed as effective transformation rate, calculate phase-changing memory unit amorphous rate, when phase change layer temperature is during lower than fusing point, select circuit using crystallization velocity as output, otherwise using decrystallized speed as output.Electric capacity is as integrating circuit, for integral operation.One end ground connection of electric capacity, the other end connects the output terminal of selecting circuit.The both end voltage of electric capacity is used for providing amorphous rate.The calculating formula of capacitance is:

$C=\frac{2\mathrm{\&pi;}}{3}{\mathrm{<figure-callout\; id="3"\; label="d\; gst"\; filenames="HDA0000380148000000011.png"\; state="\{\{state\}\}">d</figure-callout>}}_{\mathrm{gst}}^{},$

Wherein, C is capacitance, d _gstthe thickness of phase change layer.According to capacitance, calculate amorphous rate, formula is as follows:

$C_a=\frac{1}{C}{\&Integral;V}_a\mathrm{dt},$

Wherein, C is capacitance, V _abe effective transformation rate, t is the time.Wherein effectively transformation rate determines that method is as follows:

$V_a=\left\{\begin{array}{cc}{v}_{\mathrm{ac}},& T<\mathrm{Tm}\\ v_{\mathrm{aa}},& T\&GreaterEqual;\mathrm{Tm}\end{array}\right.$

Wherein, v _accrystallization velocity, v _aabe non-crystallization velocity, T is phase change layer temperature, T _mit is the fusing point of phase change layer material.

In such scheme, phase change material properties parameter can be searched from physics handbook or document, the data that phase-changing memory unit characterisitic parameter records or use phase transition storage manufacturer to provide with experimental technique.Wherein, nucleation energy of activation (E _a1), atomic scattering energy of activation (E _a2), atomic transition distance (a ₀), the frequency factor (α) of atomic vibration, molecular volume (V _m), the excess free energy (γ) of unit area, Boltzmann constant (k _b), the fusing point (T of phase change layer material _m), the latent heat of fusion (h ₁) be phase change material properties, as phase-change material Ge ₂sb ₂te ₅, its E _a1for 2.19eV, E _a2for 2.23eV, a ₀be 10 ^-10m, α is 4 * 10 ²⁵/ s, V _mbe 2.9 * 10 ^-28m ³, γ is 0.1J/m ², k _bbe 8.617 * 10 ^-5eV/K, T _m889K, h ₁be 4.189 * 10 ⁸j/m ³.Maximum resistance (R in phase-changing memory unit characterisitic parameter _reset), most low-resistance (R _set), amplitude and width and the adjustability coefficients (a of the amplitude of set pulse and width, reset pulse ₁, a ₂) be experiment measuring value; Phase change layer thickness (d _gst), bottom electrode and phase change layer contact area (S), amorphous state thermal conductivity (k _a), crystalline state thermal conductivity (k _c) data of using manufacturer to provide.

Be below specific embodiment:

As example, use phase-changing memory unit SPICE model system provided by the invention to simulate phase-changing memory unit, adopt Verilog-A language compilation model file, and in Hspice software, carry out emulation.The structural representation of phase-changing memory unit SPICE model system as shown in Figure 1, comprises cell resistance analog module, temperature computation module, crystallization velocity computing module, decrystallized rate calculations module, phase transformation module.For continuous impulse sequence, be simulation thermal accumlation effect, temperature computation module, in the finish time in each recurrent interval, is updated to real-time phase change layer temperature value by ambient temperature value, as shown in Figure 2.

Phase-changing memory unit adopts Ge ₂sb ₂te ₅as phase-change material, so there is E _a1for 2.19eV, E _a2for 2.23eV, a0 is 10 ^-10m, α is 4 * 10 ²⁵/ s, V _mbe 2.9 * 10 ^-28m ³, γ is 0.1J/m ², k _bbe 8.617 * 10 ^-5eV/K, T _m889K, h ₁be 4.189 * 10 ⁸j/m ³.Experiment measuring obtains R _resetfor 850K Ω, R _setfor 3k Ω, the amplitude of set pulse is 2.5V, and width is 40ns, and the amplitude of reset pulse is 4.2V, and width is 40ns, a ₁be 0.47, a ₂be 2.The data that provide according to manufacturer have d _gstfor 75nm, S is 4 * 10 ^-16m ², k _afor 0.2W/ (k-W), k _cfor 0.5W/ (k-W).

When loading amplitude 4.2V, the reset pulse of width 40ns and the set pulse of amplitude 2.5V, width 40ns, simulation result phase change layer temperature, cell resistance value change curve are as shown in Figure 3.When temperature meets or exceeds phase change layer fusing point, resistance value raises.When loading set pulse, temperature variation is to crystallization temperature region, and resistance value reduces.

For testing phase-changing memory unit SPICE model system provided by the present invention, while loading continuous impulse sequence, phase-changing memory unit itself, phase-changing memory unit SPICE model system provided by the invention, prior art are not considered to the phase-changing memory unit SPICE model system of thermal accumlation effect done respectively test.In the situation that the continuous impulse sequence amplitude loading is that 4.2V, width are that 40ns, interpulse period are 20ns, the simulation value of actual measurement phase-changing memory unit resistance, phase-changing memory unit SPICE model system provided by the invention simulation, do not consider thermal accumlation effect the simulation of SPICE model system simulation value as shown in Figure 4.Experimental result shows, use the simulation value of phase-changing memory unit SPICE model system simulation provided by the invention obviously more to approach real phase-changing memory unit resistance variations than the simulation value of not considering the SPICE model system of thermal accumlation effect, especially, along with applying the time of pulse train, increase, thermal accumlation effect embodies more obviously, and the simulated effect advantage of phase-changing memory unit SPICE model system provided by the invention is more obvious.

For emulation RV curve, apply the pulse train that pulsewidth is 40ns.The initial magnitude of pulse is 2V, with the incremental change of 0.1V, progressively increases pulse amplitude.In simulation process, load two group pulse sequences, the recurrent interval of one group of sequence is 15ns, and the recurrent interval of another group sequence is 100ns.Figure 5 shows that the RV curve that emulation obtains.Voltage surpasses after 3V, along with pulse amplitude increases gradually, cell resistance progressively raises, because the reason that interval reduces, accumulation of heat accelerates, the RV curve of recurrent interval 15ns is less than the set threshold voltage of the RV curve of recurrent interval 100ns, reset threshold voltage, and during recurrent interval 15ns, resistance value declines after raising again.In Fig. 5, can observe, in resistance rising, decline process, resistance value all gradually changes, and presents many-valued distribution, meets the characteristic of true device.

For emulation multilevel storage technology, applying pulse width is 60ns, and pulse amplitude is respectively the potential pulse of 2.0V, 2.5V, 3.0V, 3.5V.Phase-changing memory unit at the resistance variations curve of the impulse duration of different amplitudes as shown in Figure 6.Pulse amplitude is higher, the phase-changing memory unit resistance value obtaining is larger, having there are four kinds of distribution state in resistance, is respectively 185k Ω, 347k Ω, 531k Ω and 696k Ω, shows the circuit simulation of phase-changing memory unit SPICE model system support multilevel storage technology provided by the invention.

Those skilled in the art will readily understand; the foregoing is only preferred embodiment of the present invention; not in order to limit the present invention, all any modifications of doing within the spirit and principles in the present invention, be equal to and replace and improvement etc., within all should being included in protection scope of the present invention.

Claims (6)

1. a phase-changing memory unit SPICE model system, is characterized in that, comprising:

Cell resistance analog module, calculates the real-time resistance of phase-changing memory unit for the amorphous rate providing according to phase transformation module, and according to the real-time resistance of phase transition storage, the voltage applying or current signal is made to corresponding electric current or Voltage-output;

Temperature computation module, for according to each pulse signal ends of environment temperature and pulse heat calculation of effect phase-changing memory unit phase change layer temperature constantly, and is updated to real-time phase change layer temperature by environment temperature at each end-of-pulsing constantly;

, for according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is the phase change layer volume of crystallization in crystallization velocity computing module;

, for according to the phase change layer temperature of temperature computation module output, in the unit of account time, there is decrystallized phase change layer volume in decrystallized rate calculations module;

Phase transformation module, when phase change layer temperature is during higher than phase-change material fusing point, select decrystallized speed as transformation rate, when phase change layer temperature is during lower than phase-change material fusing point, select crystallization velocity as transformation rate, according to transformation rate, calculate the amorphous rate of phase-changing memory unit.

2. phase-changing memory unit SPICE model system as claimed in claim 1, is characterized in that, the method that described temperature computation module is calculated real-time phase change layer temperature is:

Wherein T is phase change layer temperature, and t is the time, and I is phase-changing memory unit electric current, and V is phase-changing memory unit both end voltage, T _afor environment temperature, each end-of-pulsing is constantly using real-time phase change layer temperature as environment temperature, r _tt, r _tb, r _tgstbe respectively top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, C _tfor unit thermal capacitance.

3. phase-changing memory unit SPICE model system as claimed in claim 1, is characterized in that, described crystallization velocity computing module is added by nucleation rate and growth rate the phase change layer volume that obtains occurring in the unit interval crystallization variation.

4. phase-changing memory unit SPICE model system as claimed in claim 1, is characterized in that, the decrystallized rate calculations method that described decrystallized rate calculations module adopts is:

v _aa＝a ₂(T-T _m)/(h ₁r _ta)，

Wherein, v _aafor decrystallized speed, T is the phase change layer temperature that temperature computation module obtains, T _mfor phase change layer fusing point, h ₁for the latent heat of fusion, r _tafor the thermal resistance of non-crystallization region, a ₂the scale-up factor that experiment records, for matching experimental result.

5. phase-changing memory unit SPICE model system as claimed in claim 1, it is characterized in that, described phase transformation module comprises selects circuit and electric capacity, selects circuit to be used for selecting crystallization velocity or decrystallized speed as transformation rate, and electric capacity is used for calculating amorphous rate.

6. the phase-changing memory unit SPICE model system described in claim 1 to 5 any one is applied to simulate phase transition storage multilevel storage.

Images