CN106503310A - A kind of phase-change memory cell thermal resistance and the acquisition methods of thermal capacitance - Google Patents
A kind of phase-change memory cell thermal resistance and the acquisition methods of thermal capacitance Download PDFInfo
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Abstract
The invention discloses the acquisition methods of a kind of phase-change memory cell thermal resistance and thermal capacitance, including：By applying pulse train on phase-change memory cell, resistance and the heat accumulation temperature of the phase-change memory cell of different amorphous rates are obtained；Non-crystallization region width corresponding with the phase-change memory cell of each amorphous rate difference and crystalline areas width are obtained according to resistance；The phase-change memory cell corresponding thermal resistance of difference according to non-crystallization region width and crystalline areas width calculation and each amorphous rate；Heat accumulation temperature is fitted, the logistic fit curve of the heat accumulation temperature of corresponding phase-change memory cell after acquisition i-th pulse of applying；Obtained after i-th pulse train is applied according to the logistic fit curve, the time constant of phase-change memory cell during corresponding phase-change memory cell thermal diffusion；Obtained according to thermal resistance and time constant and apply phase-change memory cell thermal capacitance after i-th pulse train.The present invention can effectively obtain the thermal capacitance and thermal resistance of phase-change memory cell.
Description
Technical field
The invention belongs to microelectronics techniques field, more particularly, to a kind of phase-change memory cell thermal resistance and thermal capacitance
Acquisition methods.
Background technology
Nineteen sixty-eight Ao Fuxinsiji (Stanford R.Ovshinsky) is found that phase-change material, and for as storage phase
Become memory element medium, phase transition storage has been developed as competitive novel semi-conductor technology now.Phase change memory list
Unit is the basic comprising modules of phase transition storage, and phase-change memory cell is after SET or RESET pulse is applied in, it is possible to achieve
Crystallization and decrystallized between reversible transition.The SET pulse feature which applies is that amplitude is low, width width, RESET pulse amplitude is high,
Narrow width.In real world applications using phase-change material in crystalline state with amorphous resistance difference come storage information.
Phase-change memory cell phase change layer is standing to be calculated as T-type structure, and under this structure, its Phase velocity map is tandem type phase point
Cloth.In series arrangement, phase-change memory cell resistance can be approximated to be the series connection of crystalline resistance and amorphous state resistance.Deposit in phase transformation
Apply RESET pulse between two electrode of storage unit, the heat of generation is from the top of temperature highest bottom electrode to the low Top electrode of temperature
Bottom is radially conducted, and graded occurs in bottom electrode to Top electrode this panel region temperature, higher the closer to bottom electrode temperature, when
Crystalline areas temperature is converted into non-crystallization region when being higher than melting temperature.
In order to analyze the thermal characteristic of phase-change memory cell, according to one-dimensional Fourier conduction of heat formula：Wherein θ represents that temperature, t express times, k represent that thermal conductivity, ρ s represent heat capacity per unit volume,
X represents length.And equally can derive in electricity： Wherein ν represents voltage, when t is represented
Between, r represents that resistivity, c represent capacitance per unit volume.Formula (1)-(2) show the reason for processing calorifics amount using electrical method
By basis.
Content of the invention
For the defect of prior art, it is an object of the invention to provide a kind of phase-change memory cell thermal resistance and thermal capacitance are obtained
Take method, it is intended to solve the problems, such as to there is presently no and a kind of calculating is measured to phase-change memory cell thermal capacitance thermal resistance accurately.
The invention provides a kind of phase-change memory cell thermal resistance and the acquisition methods of thermal capacitance, comprise the steps：
(1) thermal resistance of phase-change memory cell under different amorphous rates is measured：
(1.1) pass through to apply pulse train on phase-change memory cell, obtain the phase-change memory cell of different amorphous rates
Resistance and heat accumulation temperature；
(1.2) non-crystallization region width corresponding with the phase-change memory cell of each amorphous rate difference is obtained according to resistance
With crystalline areas width；
(1.3) according to non-crystallization region width and the phase-change memory cell of crystalline areas width calculation and each amorphous rate
The corresponding thermal resistance of difference；
(2) phase-change memory cell thermal capacitance is measured：
(2.1) the heat accumulation temperature is fitted, obtains and apply corresponding phase change memory list after i-th pulse
The logistic fit curve of the heat accumulation temperature of unit；
(2.2) obtained after i-th pulse train is applied according to the logistic fit curve, corresponding phase change memory
The time constant of phase-change memory cell during unit thermal diffusion；
(2.3) obtained according to thermal resistance and time constant and apply phase-change memory cell thermal capacitance after i-th pulse train.
Further, in step (1.1), i-th pulse train is applied to phase-change memory cell and is specifically included：
(1.1.1) apply a SET pulse, make phase-change memory cell complete crystallization；
(1.1.2) apply i RESET pulse, make the phase transformation layer crystal China region of phase-change memory cell decrystallized；I's is initial
It is worth for 1；
(1.1.3) apply READ pulses, and read the resistance for being applied with phase-change memory cell after i RESET pulse；
(1.1.4) i=i+1, and it is back to step (1.1.2).
Further, in step (1.2), the non-crystallization region width dAi=dpcm×(RAi-Rc)/(Ra-Rc)；
The crystalline areas width dCi=dpcm-dAi；Wherein, dpcmFor the width of phase change layer in phase-change memory cell, RAiRepresent and apply the
Phase-change memory cell resistance after i RESET pulse, RcRepresent resistance during phase-change memory cell complete crystallization, RaRepresent phase transformation
The resistance of memory element completely amorphousization.
Further, in step (1.3), the thermal resistanceWherein, RthiFor applying i-th arteries and veins
The thermal resistance of phase-change memory cell, r after punching effectbFor the thermal resistance of bottom electrode in phase-change memory cell, rtOn in phase-change memory cell
The thermal resistance of electrode, RtgstiIt is the thermal resistance for applying phase change layer in i-th to phase-change memory cell,
S is bottom electrode and phase-change memory cell phase change layer contact area size, K1Represent that phase-change material is in amorphous thermal conductivity, K2
Represent thermal conductivity of the phase-change material in crystalline state.
Further, the logistic fit curve is：Ti=a+b × ln (c × N+d)；Wherein, TiTable is i-th of applying
The heat accumulation temperature of corresponding phase-change memory cell after pulse, N represent pulse number, and a, b, c, d are adjusting parameter, learn from else's experience
Test value.
Further, the time constantWherein, Afall-i=α × Arise-i,
tfall-iTable be apply i-th pulse train after phase-change memory cell thermal diffusion time, Afall-iTable is i-th pulse sequence of applying
The magnitude parameters of corresponding phase-change memory cell temperature thermal diffusion process, A after rowfall-i=α × Arise-i, Arise-iTable is
Apply the magnitude parameters in phase-change memory cell temperature ramp de after i-th pulse train, α is a constant coefficient, learns from else's experience
Test value, T0It is ambient temperature, takes room temperature.
Further, the magnitude parametersWherein, under S is
Electrode and phase-change memory cell phase change layer contact area size,Represent phase-change memory cell non-crystallization region width at any time
Between rate of change, Δ h1It is the latent heat of fusion, Tm represents melting temperature, τrise-iThe pulse interval for applying pulse train is represented,
τrise-iIt is the thermal time constant of phase-change memory cell temperature ramp de.
Further, phase-change memory cell thermal capacitance Cthi=τfall-i/Rthi；Wherein, RthiFor applying i-th pulse
Corresponding phase-change memory cell thermal resistance, τ after sequencefall-iFor applying corresponding phase change memory after i-th pulse train
Unit thermal diffusion time constant.
By the contemplated above technical scheme of the present invention, compared with prior art, as the present invention passes through apparatus measures
And combine to calculate and can obtain the thermal characteristic parameter thermal capacitance and thermal resistance of phase-change memory cell, solve phase-change memory cell thermal capacitance with
Thermal resistance is unable to a difficult problem for direct access.
Description of the drawings
Fig. 1 is a kind of phase-change memory cell thermal resistance provided in an embodiment of the present invention and the acquisition methods of thermal capacitance realize flow process
Figure；
In Fig. 2, Fig. 2 (a) is the structural representation of the phase-change memory cell of the embodiment of the present invention；Fig. 2 (b) is of the invention real
Apply；Fig. 2 (c) shows phase-change memory cell
Phase change layer crystallization and decrystallized equivalent approximate model under RESET pulse；
Fig. 3 is the phase-change memory cell thermal resistance thermal capacitance network proposed according to electric heating analogy in the present invention；
Fig. 4 is the phase-change memory cell HSPICE model embodiments proposed according to computational methods of the present invention；
Fig. 5 is to calculate and emulate the thermal resistance change curve for obtaining according to embodiment experimental fit result；
Fig. 6 is according to embodiment heat accumulation temperature value and the loaarithmic curve of fitting；
Fig. 7 is to calculate and emulate the thermal capacitance change curve for obtaining according to embodiment experimental fit result.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with drawings and Examples, right
The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only in order to explain the present invention, and
It is not used in the restriction present invention.
With Development of storage technology, phase-change memory cell read or write speed is improved, phase-change memory cell meeting during read-write
Accumulation heat, and heat accumulation effect can directly affect device performance.Meanwhile, device inside thermal diffusion directly affects the heat product of heat
The change of tired and temperature.Therefore the heat diffusion properties of phase-change memory cell are measured and is had important practical significance.
The present invention propose phase-change memory cell heat diffusion properties measuring method, to phase-change memory cell difference crystallization rate under
Phase velocity map construct simplified model.Equivalent phase-change memory cell thermal resistance thermal capacitance network is set up simultaneously, it is proposed that thermal resistance, heat
Hold the approximate formula with heat accumulation temperature, and be verified in embodiment.Its key step is as follows：
(1) phase-change memory cell thermal resistance under different amorphous rates is measured；Specifically include following steps：
(1.1) pass through to apply pulse train on phase-change memory cell, obtain the phase-change memory cell of different amorphous rates
Resistance and heat accumulation temperature；
(1.2) non-crystallization region width corresponding with the phase-change memory cell of each amorphous rate difference is obtained according to resistance
With crystalline areas width；
Wherein, non-crystallization region width dAi=dpcm×(RAi-Rc)/(Ra-Rc)……(a)；Crystalline areas width dCi=
dpcm-dAi……(b)；dpcmFor the width of phase change layer in phase-change memory cell, RAiRepresent the phase after applying i-th RESET pulse
Become resistive memory cell, RcRepresent resistance during phase-change memory cell complete crystallization, RaRepresent phase-change memory cell completely amorphousization
Resistance.
(1.3) according to non-crystallization region width and the phase-change memory cell of crystalline areas width calculation and each amorphous rate
The corresponding thermal resistance of differenceRthiFor applying phase change memory list after i-th impulse action
The thermal resistance of unit, rbFor the thermal resistance of bottom electrode in phase-change memory cell, rtFor the thermal resistance of Top electrode in phase-change memory cell, RtgstiFor
The thermal resistance that phase change layer in i-th is applied to phase-change memory cell,Under S is
Electrode and phase-change memory cell phase change layer contact area size, K1Represent that phase-change material is in amorphous thermal conductivity, K2Represent phase
Become thermal conductivity of the material in crystalline state.
(2) phase-change memory cell thermal capacitance is measured；Specifically include following steps：
(2.1) general curve of heat accumulation temperature is fitted according to given data, is corresponded to after obtaining applying i-th pulse therewith
Phase-change memory cell heat accumulation temperature logistic fit curve
Ti=a+b × ln (c × N+d) ... is (e)；
TiTable is the heat accumulation temperature for applying corresponding phase-change memory cell after i-th pulse, and N represents pulse
Number, a, b, c, d are adjusting parameter, take empirical value.
(2.2) obtained after i-th pulse train is applied according to heat accumulation temperature logistic fit curve, corresponding phase
The time constant of phase-change memory cell when becoming memory element thermal diffusionAfall-i=α ×
Arise-i... (f), tfall-iTable be apply i-th pulse train after phase-change memory cell thermal diffusion time, Afall-iTable is to apply
Plus after i-th pulse train corresponding phase-change memory cell temperature thermal diffusion process magnitude parameters, Afall-i=α ×
Arise-i, Arise-iTable is to apply the magnitude parameters after i-th pulse train in phase-change memory cell temperature ramp de, and α is one
Individual constant coefficient, takes empirical value, T0It is ambient temperature, takes room temperature.Wherein, Arise-iThe computing formula of the magnitude parameters can be with table
For
In formula, S is bottom electrode and phase-change memory cell phase change layer contact area size,Represent phase-change memory cell
Non-crystallization region width rate over time, is tried to achieve by (a), Δ h1It is the latent heat of fusion, represents that material is inhaled in state change
Receive or liberated heat, Tm represents melting temperature.τrise-iRepresent the pulse interval for applying pulse train, τrise-iIt is phase transformation
The thermal time constant of memory element temperature ramp de.
(2.3) obtained according to thermal resistance and time constant and apply phase-change memory cell thermal capacitance C after i-th pulse trainthi=
τfall-i/Rthi……(h)；Wherein, apply corresponding phase-change memory cell thermal resistance R after i-th pulse trainthiBy (1.3)
Obtain, apply corresponding phase-change memory cell thermal diffusion time constant, τ after i-th pulse trainfall-iObtained by (2.2).
In (1.1), i-th pulse train is applied to phase-change memory cell and is broadly divided into following 3 steps：
(1.1.1) apply a SET pulse, make phase-change memory cell complete crystallization；
(1.1.2) apply i RESET pulse, make the phase transformation layer crystal China region of phase-change memory cell decrystallized；
(1.1.3) apply the resistance that READ pulses reading is applied with phase-change memory cell after i RESET pulse.
Repeat above measurement process, increase RESET pulse number i of second step, you can obtain being applied with i-th pulse sequence
The resistance of corresponding phase-change memory cell under row.
Apply the resistance of the phase-change memory cell of the different amorphous rates that pulse train is obtained, phase change memory is calculated with this
The thermal resistance of unit.The purpose for applying pulse train is in order to obtain the phase-change memory cell under different amorphous rate states, with this
Obtain phase-change memory cell resistance and apply the relation of number of pulses.
Non-crystallization region width corresponding with the phase-change memory cell of each amorphous rate difference and crystalline substance are obtained according to resistance
Change peak width.
In (1.2), the amorphized areas field width of obtaining phase-change memory cell under different amorphous rates using the resistance for measuring
Degree and crystalline areas width.Phase-change memory cell phase-change memory cell structure is reduced to a cylindrical model by the present invention,
The growth of non-crystallization region is considered as rectangular area growth after applying RESET pulse by electrode two ends.If phase-change memory cell is complete
Holocrystalline resistance is Rc, completely amorphousization resistance is Ra, remember phase-change memory cell non-crystallization region and phase-change memory cell phase change layer
Volume ratio can just be reduced to the width ratio of non-crystallization region and phase-change memory cell phase change layer.
Phase-change memory cell complete crystallization and decrystallized resistance is readily obtained, if phase-change memory cell phase change layer width is
dpcm, after i-th pulse train is applied, non-crystallization region width d in corresponding phase-change memory cellAiWith crystallization region
Field width degree dCiApproximately can be calculated with equation below.
dAi=dpcm×(RAi-Rc)/(Ra-Rc) dCi=dpcm-dAi……(3)
R in formulaAiRepresent the phase-change memory cell resistance after applying i-th pulse train, RcRepresent that phase-change memory cell is complete
Resistance during holocrystalline, RaRepresent the resistance of phase-change memory cell completely amorphousization.
(1.3) are derived, the phase-change memory cell non-crystallization region width and brilliant China region that tries to achieve in (1.2) is utilized
Width, brings the thermal resistance that computing formula obtains phase-change memory cell into.Based on the theoretical basiss of electric heating analogy, phase transformation storage phase is obtained
Become the thermal resistance thermal capacitance circuit of memory element.In phase-change memory cell thermal resistance network, excitation current source thermal capacitance CtIt is added in bottom electrode
Thermal resistance rbBetween.After applying i-th pulse train, corresponding phase-change memory cell phase change layer thermal resistance Rtgsti, electricity in thermal resistance
Very hot resistance rtSeries connection, then with rbWith CtSeries connection, last two-terminal-grounding.Using phase-change memory cell thermal resistance thermal capacitance network, can wait
Effect becomes the thermal resistance of the thermal diffusion process that swaps out, the computing formula of thermal capacitance, using electricity connection in series-parallel Equivalent Calculation thermal resistance, applies i-th
After pulse train effect, corresponding phase-change memory cell thermal resistance RthiCan be calculated by formula (4).
According to the simplified model of phase-change memory cell structure, convolution (3), phase-change memory cell amorphized areas can be obtained
Field width degree dAiWith crystalline areas width dci, phase-change memory cell phase change layer thermal resistance RtgstiWith amorphous state and the approximate width of crystalline state
Formula (5) can be expressed as
In formula (9), S represents bottom electrode and phase-change memory cell phase change layer contact area size, K1Represent that phase-change material is in
Amorphous state thermal conductivity, K2Represent thermal conductivity of the phase-change material in crystalline state.
In (2.1), method in order to measure the thermal capacitance of phase-change memory cell will first fit the heat of phase-change memory cell
Accumulation temperature Ti.In the case where the decrystallized change of phase-change memory cell is realized, the heat accumulation temperature of phase-change memory cell can be with
Logarithmic curve-fitting is approximately used so as to which the decrystallized heat accumulation temperature logarithmic function curve for obtaining phase-change memory cell is Ti=a+
B × ln (c × N+d), wherein TiExpression applies the heat accumulation temperature of phase-change memory cell after i-th pulse, and N represents pulse
Number, by adjusting parameter a, b, c, d, obtains accumulating temperature T with thisiLogistic fit curve.
Formula in (2.2) is derived, due to phase-change memory cell inner amorphous state Domain Volume is changed over can
To be represented with formula (6)：Vai=S × dAi……(7)；Ta in formulaiRepresent and apply i-th
Postimpulse peak temperature,Represent the rate of change of decrystallized volume, Δ h1It is the latent heat of fusion, represents material in state change
When absorb or liberated heat, Tm represents melting temperature.Meanwhile, volume Va of amorphous areasiCan be with approximate representation as formula
(7).
According to phase-change memory cell thermal resistance thermal capacitance network, after applying the i-th pulse train, phase inside phase-change memory cell
The maximum temperature T of change layergstiFormula (8) can be expressed as
W in formulajRepresent pulse power, WdRepresent the heat of unit interval dissipation.
Using the equation of heat conduction, after the i-th pulse train is applied to phase-change memory cell, if in phase-change memory cell
Portion's temperature reaches time to peak for ti, then peak temperature can be illustrated by formula (9)-(11).
Make Ti-1After expression is applied with the i-th -1 pulse train, heat accumulation temperature inside phase-change memory cell is utilized
Phase-change memory cell thermal resistance thermal capacitance circuit is derived, according to formula (9)-(11), peak temperature TaiFormula (12) can be expressed as
Wherein, the thermal time constant of phase-change memory cell temperature ramp de is τrise-i, Arise-iIt is magnitude parameters,
According to formula (9)-(12), A is derivedrise-iComputing formula (13)
Wherein, in formulaRepresent the speed that non-crystallization region face increases.
Apply i-th pulse to phase-change memory cell and reach peak temperature, the temperature of phase-change memory cell starts to reduce.Root
According to phase-change memory cell thermal resistance thermal capacitance network, the thermal diffusion process can regard the zero input response of thermal resistance thermal capacitance circuit as.Facility
Plus after i-th pulse, the magnitude parameters of phase-change memory cell temperature thermal diffusion process are Afall-1, temperature starts to reduce the 1st, 2
The thermal diffusion in pulse spacing can be expressed as formula (14)；The like, after i-th pulse train, phase-change memory cell thermal diffusion
Can be represented by formula (15)：
Composite type (15)-(16), derive that phase-change memory cell internal temperature can be shown by formula (17), (18) with time constant
Go out：
According to uphill process and decline process description formula, uphill process temperature maximum should be with the process of decline in theory
Temperature initial value is identical, but due to practical situation in, temperature rises to peak temperature first can be occurred fluctuating, and then tend to steady
Fixed.Therefore the initial temperature for declining process is less than the maximum temperature of uphill process, obtains Afall-iComputing formula (19)：
Afall-i=α × Arise-i……(19)；In formula, the value condition of α is：α ＜ exp (trise-i/τrise-i), wherein τfall-iFor applying
After i-th pulse train, the thermal diffusion time constant of phase-change memory cell is combined (6)-(19), can obtain phase change memory list
First thermal diffusion time τfall-iValue.
According to timeconstantτ in (2.3)fall-iDefinition obtain thermal capacitance computing formula (20)：Cthi=τfall-i/
Rthi……(20)；Wherein CthiThermal capacitance is represented, phase-change memory cell heat accumulation temperature and pulse are obtained by logistic fit curve
The relation of quantity, association type (13), (18), (20), obtains the curve of phase-change memory cell electric capacity and pulse number.
In order to preferably explain technical scheme, computational methods describe clear, and referring to the drawings, accompanying drawing is illustrated can be with
Implement the example embodiment of the present invention.It can be readily appreciated that other embodiments can be utilized, and test object can be carried out
Structural change, without deviating from the scope of the present invention.
The example all only illustrates rather than restriction in all respects.The scope of the present invention is all by appended claim
Represent, it is clear that described embodiment is only a part for invention, rather than whole embodiment.Enforcement based on the present invention
Example, the every other embodiment obtained under the premise of creative work is not made belong to the scope of protection of the invention.
For reasonable drawing heat diffusion properties relevant parameter, in the present embodiment, RESET is applied to phase-change memory cell first
Impulse waveform cluster, obtains the phase-change memory cell resistance after i-th impulse action, and then obtains corresponding resistance and number of pulses
Curve linear relationship.In the present embodiment, the thermal resistance abstracting method for being derived using profit of the invention, is obtained in different RESET pulse numbers
Lower thermal resistance.Obtain accumulating temperature by Fitted logistic curves, the method extracted using thermal capacitance of the present invention calculates thermal capacitance.Pass through
HSPICE softwares are simulated emulation to thermal resistance thermal capacitance, set up approximate phantom, obtain simulation curve.Contrast simulation and calculating
Curve is obtained, the feasibility of the present invention is verified.
In the embodiment of the present invention shown in the schematic block diagram of phase-change memory cell structure such as Fig. 2 (a), 1 and 1' in figure (a)
Top electrode is constituted together, and Top electrode 1, Top electrode 1' and bottom electrode 5 are made up of Tiw, and wherein 2 and 2' constitute isolation together
Layer, sealing coat is all SiO2Material, in phase-change memory cell, the material of phase change layer 3 is Ge2Sb2Te5Material, substrate 4 are Si materials
Material.Fig. 2 (a) is based on, in order to study heat accumulation effect, adds the RESET pulse of phase-change memory cell very short, now can not be direct
Measurement obtains the phase-change memory cell resistance after each impulse action, therefore in an embodiment, phase-change memory cell is applied with
Pulse train as shown in Fig. 2 (b), realizes the consecutive variations of phase-change memory cell resistance, obtains different amorphous rates with this
Phase-change memory cell.
In the present embodiment, the phase-change memory cell structure based on Fig. 2 (a), applies the test pulse waveform such as Fig. 2 (b)
Sequence, applies pulse train using 4200-SCS characteristic of semiconductor tester to phase-change memory cell, and its step is as follows：
(1) SET pulse is applied to phase-change memory cell first, makes phase-change memory cell complete crystallization,
(2) then apply i RESET pulse, then apply the resistance that phase-change memory cell is read in read pulse, record this
When phase transformation resistive memory cell Ri, i is positive integer.
(3) repeat aforesaid operations, change the value of i, obtain the electricity of phase-change memory cell resistance number pulse different from applying
Resistance and applying pulse train number curve graph of a relation.
On the basis of Fig. 2 (a) and Fig. 2 (b), in the present embodiment, with the increase of RESET pulse number, phase transformation is deposited
The volume of storage unit non-crystallization region becomes larger, and its simplified model is illustrated by Fig. 2 (c), and wherein 3 indication parts are SiO2Layer,
In phase-change memory cell, Tiw upper/lower electrodes are 4, decrystallized by realizing to phase-change memory cell upper/lower electrode applying pulse train
Gradual change, wherein crystalline areas 1 RESET pulse effect under be gradually reduced, and non-crystallization region 2 under RESET pulse gradually
Increase, obtains non-crystallization region 2' after the 1st RESET pulse is applied, and applies i RESET pulse sequence, non-crystallization region edge
Direction arrow 2 " increase, its zone cross-sectional 5 for increasing is approximately circular cross-section.After applying a RESET pulse, decrystallized
Region is a parts, and its width is d1；After applying 2 RESET pulses, non-crystallization region is (a+b) part, and its width is d2；Apply
Plus after 3 RESET pulses, non-crystallization region is (a+b+c), and its width is d3, by that analogy, pulse number increases, decrystallized
Region is rectangle growth.
According to electrical quantities and the method for calorifics amount analogy, calorifics amount is calculated, computing formula is constructed using electricity system, is such as schemed
Maximum temperature is analogized to maximum voltage, minimum temperature class by the phase change memory phase-change memory cell thermal resistance thermal capacitance network shown by 3
Than for minimum voltage, being earth point in figure 3, heat flow direction analogizes to direction of current flow, phase-change memory cell heat
Thermal resistance content network is the basic basis of computational methods and emulation.
Under HSPICE environment, the module for constituting system is write and is called using Verilog-A language.Phase change memory
Unit analogue system is as shown in figure 4, resistive module is used for the amorphous rate for calculating phase-change memory cell, and then obtains resistance.Temperature
Degree computing module is used for calculating the change of phase-change memory cell internal temperature, and phase transformation module is according to phase change memory cells temperature, meter
Calculate the volume that the unit interval undergoes phase transition.The model describe the change of phase-change memory cell phase change layer resistance under incentive action
Change.The model can be with the change of the lower phase change memory cells resistance of analog pulse excitation.In the present embodiment, from Ge2Sb2Te5
Material is as shown in table 1 as each parameter of phase-change memory cell phase change layer phantom.The primary data of emulation is set, if just
Beginning ratio is 0.01, and initial temperature is room temperature 300K, and pulse amplitude is 0.75V, pulse width is 40ns, the pulse period is
The RESET pulse of 60ns.By consulting literatures and related data, the primary data for emulating input in HSPICE is set with phantom
The parameter that puts is as shown in table 1.
Phase-change memory cell is tested using 4200-SCS characteristic of semiconductor testers, phase-change memory cell is applied
SET pulse obtains the resistance R that phase-change memory cell obtains complete crystallizationc, apply the resistance that RESET pulse obtains completely amorphousization
Ra, then apply i RESET pulse and obtain the phase-change memory cell resistance R after i-th RESET pulseai, in conjunction with the present invention in
Formula (a), (b), obtain the width of the decrystallized and crystalline areas after i-th impulse action.
In the present embodiment, by inspection information, phase-change memory cell Top electrode thermal resistance r is obtainedt=2.5 × 107K/W, under
Electrode thermal resistance rb=5 × 107K/W, phase-change memory cell sectional area S=2 × 10-15m2.Phase-change memory cell electricity is obtained in test
After resistance and pulse number curve chart, known condition is brought into computing formula (c) that the present invention derives, in (d), calculates phase
Become memory element in i-th postimpulse first phase-change memory cell thermal resistance, thus extracted the thermal resistance of phase-change memory cell, obtained
The curve chart of thermal resistance and pulse number is arrived.Likewise, in HSPICE phantoms, in the case of also having obtained ideal theory
Thermal resistance and the curve relation figure of pulse number, Integrated comparative are not difficult to find out that two curves are sufficiently close to, and variation tendency phase
With.
In order to control the amorphous rate of phase-change memory cell, make amorphous rate not undergo mutation, be gradually reduced thermal capacitance
In the case of emulate, resistance is sufficiently close to the curve that obtains is tested with the change curve of RESET pulse number.Heat accumulation temperature is first
First significantly rise, then tend to be steady.Thermal resistance can be calculated according to thermal resistance calculation formula (c) in the present invention, (d).
In the present embodiment, rt=2.5 × 107K/W, rb=5 × 107K/W, S=2 × 10-15m2, k1It is phase-change memory cell phase change layer
Thermal conductivity under amorphous state, k2It is thermal conductivity of the phase-change memory cell phase change layer under crystalline state, can be obtained by table 2.
Fig. 5 is to emulate and calculated curve, as shown in Figure 5, calculates and matches with simulation result.
Thermal capacitance is taken in order to obtain, heat accumulation temperature is first determined.Adjust in HSPICE emulation, the phase transformation in being emulated is deposited
Storage unit resistance is sufficiently close to matched curve.When thermal capacitance value is suitable, the lower amorphous rate of pulse train effect will not be sent out
Raw mutation, but gradually give plus.The change of heat accumulation temperature can not be too fast, simultaneously micro- with heat accumulation temperature to thermal capacitance in simulations
Adjust, phase-change memory cell amorphous rate is gradually increased.Thermal capacitance is gradually reduced, makes phase-change memory cell amorphous rate gradually become
Change so that the resistance of emulation-number of pulses curve is sufficiently close to the curve of experimental fit, and the change for obtaining heat accumulation temperature becomes
Gesture is first to become big, is then slowly increased, and is sufficiently close to matched curve.In the present embodiment, as pulse number increases,
Phase-change memory cell amorphous rate gradually increases, and phase-change memory cell resistance also increases.Old friend in heat diffusion properties, deposit by phase transformation
Storage unit thermal capacitance is gradually reduced, and thermal resistance gradually increases, and heat accumulation temperature is represented with logarithmic function with the relation of pulse number,
As shown in Figure 6.
In the present embodiment, the logarithmic function curve that can be revised using a parameter describing this change procedure, profit
Matched curve is asked with formula (e), the logarithmic function curve is Ti=a+b × ln (c × N+d), wherein TiRepresent heat accumulation temperature, N
Pulse number is represented, adjusting parameter a=43.47511 is taken, b=80.64071, c=284.6988, d=-207.6870, with this
Obtain accumulating temperature TiLogistic fit curve.
Phase-change memory cell heat accumulation temperature T is tried to achievei, phase-change memory cell heat is tried to achieve followed by formula (f), (g)
Diffusion time τfall-i.Pulse is idealized, we need the thermal time constant for using temperature ramp de in calculating process, made
Temperature ramp de thermal time constant be 2ns, temperature rise to peak temperature time be 5ns, for formula in parameter
Arise-iAnd Afall-i, it will be assumed that there is the relation of determination between them.It is τ to make actual constantrise-i=2ns, applies pulse sequence
The pulse spacing t of rowrise-i=5ns, can obtain the phase-change memory cell phase change layer material latent heat of fusion by inspection information
Value, Δ h1=4.189 × 108J/m3, Tm is phase-change memory cell phase change layer material melting temperature, and its value is 900K, T0It is room temperature
Temperature, if its value is 300K.When amorphous rate gradual change, the variation tendency of phase-change memory cell heat accumulation temperature is first to become big, and
After increase.The internal temperature of phase-change memory cell and heat accumulation temperature T of the individual pulse of heat accumulation temperature control (i-1)i-1And i-th
The individual pulse for being applied to phase-change memory cell is relevant.A can be obtainedrise-iAnd Afall-iRelation be：Arise-i×exp(trise-i/
τrise-i)=Afall-i, but decline the maximum temperature that the initial temperature of process should be less than uphill process in real process, therefore
Parameter Conditions should meet α ＜ exp (t in practice for orderrise-i/τrise-i).α=exp (4ns/2ns) is taken in the present embodiment,
Try to achieve Afall-iAfterwards, be applied in the present embodiment pulse between i-th pulse train of phase-change memory cell at intervals of
tfall-i, its value is taken for tfall-i=20ns, brings intofall-i.
Then, it is known that apply phase change cells thermal resistance R after i-th pulse trainthi, and phase-change memory cell thermal diffusion
Timeconstantτfall-i, according to formula (h), obtain the thermal capacitance of phase-change memory cell.Obtain ideally under HSPICE emulation
The value of thermal capacitance, while draw out calculating and emulating the thermal capacitance change curve for obtaining according to embodiment experimental fit result, which is such as
Shown in Fig. 7, it is not difficult to find out, 2 curves are close to, and have identical variation tendency.
As it will be easily appreciated by one skilled in the art that the foregoing is only presently preferred embodiments of the present invention, not in order to
The present invention, all any modification, equivalent and improvement that is made within the spirit and principles in the present invention etc. is limited, all should be included
Within protection scope of the present invention.
Claims (8)
1. acquisition methods of a kind of phase-change memory cell thermal resistance and thermal capacitance, it is characterised in that comprise the steps：
(1) thermal resistance of phase-change memory cell under different amorphous rates is measured：
(1.1) pass through to apply pulse train on phase-change memory cell, obtain the electricity of the phase-change memory cell of different amorphous rates
Resistance and heat accumulation temperature；
(1.2) non-crystallization region width corresponding with the phase-change memory cell of each amorphous rate difference and crystalline substance are obtained according to resistance
Change peak width；
(1.3) distinguished according to the phase-change memory cell of non-crystallization region width and crystalline areas width calculation and each amorphous rate
Corresponding thermal resistance；
(2) phase-change memory cell thermal capacitance is measured：
(2.1) the heat accumulation temperature is fitted, corresponding phase-change memory cell after acquisition i-th pulse of applying
The logistic fit curve of heat accumulation temperature；
(2.2) obtained after i-th pulse train is applied according to the logistic fit curve, corresponding phase-change memory cell
The time constant of phase-change memory cell during thermal diffusion；
(2.3) obtained according to thermal resistance and time constant and apply phase-change memory cell thermal capacitance after i-th pulse train.
2. acquisition methods as claimed in claim 1, it is characterised in that in step (1.1), apply i-th to phase-change memory cell
Individual pulse train is specifically included：
(1.1.1) apply a SET pulse, make phase-change memory cell complete crystallization；
(1.1.2) apply i RESET pulse, make the phase transformation layer crystal China region of phase-change memory cell decrystallized；The initial value of i is
1；
(1.1.3) apply READ pulses, and read the resistance for being applied with phase-change memory cell after i RESET pulse；
(1.1.4) i=i+1, and it is back to step (1.1.2).
3. acquisition methods as claimed in claim 1 or 2, it is characterised in that in step (1.2), the amorphized areas field width
Degree dAi=dpcm×(RAi-Rc)/(Ra-Rc)；
The crystalline areas width dCi=dpcm-dAi；
Wherein, dpcmFor the width of phase change layer in phase-change memory cell, RAiRepresent the phase change memory after applying i-th RESET pulse
Cell resistance, RcRepresent resistance during phase-change memory cell complete crystallization, RaRepresent the electricity of phase-change memory cell completely amorphousization
Resistance.
4. acquisition methods as described in any one of claim 1-3, it is characterised in that in step (1.3), the thermal resistance
Wherein, RthiFor applying the thermal resistance of phase-change memory cell after i-th impulse action, rbFor bottom electrode in phase-change memory cell
Thermal resistance, rtFor the thermal resistance of Top electrode in phase-change memory cell, RtgstiIt is the heat for applying phase change layer in i-th to phase-change memory cell
Resistance,S is bottom electrode and phase-change memory cell phase change layer contact area size, K1Represent phase
Become material and be in amorphous thermal conductivity, K2Represent thermal conductivity of the phase-change material in crystalline state.
5. acquisition methods as described in any one of claim 1-4, it is characterised in that the logistic fit curve is：Ti=a+b
×ln(c×N+d)；
Wherein, TiTable is the heat accumulation temperature for applying corresponding phase-change memory cell after i-th pulse, and N represents pulse
Number, a, b, c, d are adjusting parameter, take empirical value.
6. acquisition methods as described in any one of claim 1-5, it is characterised in that the time constant
Wherein, Afall-i=α × Arise-i, tfall-iTable be apply i-th pulse train after phase-change memory cell thermal diffusion when
Between, Afall-iTable is the amplitude ginseng of corresponding phase-change memory cell temperature thermal diffusion process after i-th pulse train of applying
Number, Afall-i=α × Arise-i, Arise-iTable is to apply the width after i-th pulse train in phase-change memory cell temperature ramp de
Value parameter, α are constant coefficients, take empirical value, T0It is ambient temperature, takes room temperature.
7. acquisition methods as claimed in claim 6, it is characterised in that the magnitude parameters
Wherein, S is bottom electrode and phase-change memory cell phase change layer contact area size,Represent phase-change memory cell amorphous
Change peak width rate over time, Δ h1It is the latent heat of fusion, Tm represents melting temperature, τrise-iRepresent and apply pulse train
Pulse interval, τrise-iIt is the thermal time constant of phase-change memory cell temperature ramp de.
8. acquisition methods as described in any one of claim 1-7, it is characterised in that phase-change memory cell thermal capacitance Cthi=
τfall-i/Rthi；
Wherein, RthiFor applying corresponding phase-change memory cell thermal resistance after i-th pulse train, τfall-iFor applying i-th
Corresponding phase-change memory cell thermal diffusion time constant after pulse train.
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| CN103514322A (en) * | 2013-09-10 | 2014-01-15 | 华中科技大学 | Phase change memory unit SPICE model system considering heat accumulation effects and application of phase change memory unit SPICE model |
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| CN101763452A (en) * | 2010-01-07 | 2010-06-30 | 中国科学院上海微系统与信息技术研究所 | Simulation method of phase-change memory |
| CN103514322A (en) * | 2013-09-10 | 2014-01-15 | 华中科技大学 | Phase change memory unit SPICE model system considering heat accumulation effects and application of phase change memory unit SPICE model |
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