CN103514322B - Phase change memory unit SPICE model system considering heat accumulation effects and application of phase change memory unit SPICE model - Google Patents

Abstract

The invention discloses a phase change memory unit SPICE model system considering heat accumulation effects. The system comprises a unit resistor simulation module, a temperature calculation module, a crystallization rate calculation module, a non-crystallization rate calculation module and a phase change module. The unit resistor simulation module is used for simulating a phase change memory unit resistor. The temperature calculation module is used for aiming at an applied continuous pulse sequence to calculate the temperature of phase change layers, of a memory unit considering the heat accumulation effects at pulse signals, at the moment of ending of each pulse signal. The crystallization rate calculation module is used for calculating the volume of the phase change layers crystallizing per unit time. The non-crystallization rate calculation module is used for calculating the volume of the phase change layers non-crystallized per unit time. The phase change module is used for selecting the crystallization rate or the non-crystallized rate to calculate the non-crystallization ratio. The invention further discloses the application of a phase change memory unit SPICE model. The phase change memory unit SPICE model is used for simulating multiple-valued storage of the phase change memory unit. The phase change memory unit SPICE model system considering the heat accumulation effects is capable of accurately simulating the resistor changes of the phase change memory unit, and especially under the actions of continuous pulses, the system is capable of accurately simulating the phase change memory unit resistor in the multiple-valued storage technology of the phase change memory when the heat accumulation effects are obvious.

Description

Consider phase-changing memory unit spice model system and the application of thermal accumlation effect

Technical field

The invention belongs to integrated circuit specialized simulation program (simulation program with ic emphasis, Spice) model system field, more particularly, to a kind of phase-changing memory unit spice model considering thermal accumlation effect System and application.

Background technology

Phase transition storage is using can stablize the material of phase transformation come data storage.Typical phase-change material is gst compound, by Germanium (ge), antimony (sb) and tellurium (te) are constituted.Material can occur reversible transition between crystalline state and amorphous state, and the resistance of crystalline state is relatively low, Amorphous resistance is higher.The resistance value of the corresponding obvious difference of different phase can be used for representing the logic state of data storage. To during phase transition storage write data, typically adopt electric pulse.By applying that pulsewidth is relatively long, amplitude relatively Low electric pulse, makes the temperature of phase-change material rise to crystallization temperature and maintain a period of time, material is changed into crystalline state, this process It is referred to as " set " process, crystalline state is referred to as " set " state.By applying an electric pulse that pulsewidth is relatively short, amplitude is relatively high, make The temperature of phase-change material rises to more than fusing point and quickly cools down, and material is changed into amorphous state, and this process is referred to as " reset " mistake Journey, amorphous state is referred to as " reset " state.During reading phase change memories data, apply amplitude very low, will not change The electric pulse of unit crystallization state, the resistance value of measuring unit.Phase transition storage, due to can be integrated with cmos technique, has height The advantages such as speed, low pressure, low-power consumption, integrated level height are it is considered to be promise to be the device of non-volatility memorizer of future generation most.

For the commercial applications of phase transition storage, good chip circuit design is particularly significant.Hyundai electronicses electricity Widely used eda(electronic design automation in the design of road), i.e. automatic electronic design, it is possible to use The work such as simulation assessment that computer is manually difficult to design to complete, design verification, design optimization, have become as collection Become the technical way of circuit design.The input file of circuit simulating software generally comprises circuit structure and describes file and element Model file, both constitutes integrated circuit model system.Accordingly, it is capable to the phase-changing memory unit of accurate simulation electrology characteristic Spice model system is most important for phase change memory chip circuit design.

Existing phase-changing memory unit spice model system includes at present: phase change resistor module, temperature computation module, State-storage module and percent crystallization in massecuite computing module, by calculating the temperature change that electric pulse leads to, calculate the knot of phase-change resistor Brilliant rate, thus the lower phase-changing memory unit resistance variations situation of analog electrical signal effect.Although existing phase-changing memory unit Spice model system can be compared with the resistance variations of the lower phase-changing memory unit of accurate simulation Sing plus effect, this model system Do not account for the impact to phase-changing memory unit resistance for the thermal accumlation effect.With technology development, the reading to memory cell Writing rate is accelerated, and access times increase, and the thermal accumlation effect of the lower device of pulse train effect becomes apparent from, existing model system For the phase-changing memory unit resistance deviation of simulation under pulse train effect substantially it is impossible to provide reliable for chip circuit design Reference.Further, since existing phase-changing memory unit spice model system is unable to accurate simulation phase transition storage list at present The real resistance variations of unit, are therefore not used to the chip design of multilevel storage technology.

Content of the invention

Disadvantages described above for prior art or Improvement requirement, the invention provides a kind of phase considering thermal accumlation effect Transition storage unit spice model system, this model system can be used for simulating multilevel storage, its object is to accurate simulation phase transformation Memory cell change in resistance under pulse train effect, thus solves existing phase-changing memory unit spice model system and exists Read or write speed is fast, access times many in the case of simulation phase-changing memory unit resistance value and the obvious technology of truth deviation Problem, solves the problems, such as the phase transition storage spice model system simulation multilevel storage not having to be suitable for simultaneously.

For achieving the above object, according to one aspect of the present invention, there is provided a kind of phase-changing memory unit spice model System, comprising:

Cell resistance analog module, it is real-time that the amorphous rate for being provided according to phase transformation module calculates phase-changing memory unit Resistance, and corresponding output is made according to the phase transition storage real time resistance calculating gained to the voltage applying or current signal；

Temperature computation module, for according to ambient temperature and each the pulse signal ends moment phase transformation of pulse heat calculation of effect Memory cell phase change layer temperature, for the continuous impulse sequence applying it is considered to thermal accumlation effect, environment temperature under pulse signal Degree is updated to real-time phase change layer temperature in each end-of-pulsing moment；

Crystallization velocity computing module, for the phase change layer temperature being exported according to temperature computation module, in the unit of account time There is the phase change layer volume of crystallization；

Decrystallized rate calculation module, for the phase change layer temperature being exported according to temperature computation module, unit of account time The decrystallized phase change layer volume of interior generation；

Phase transformation module, when phase change layer temperature is higher than phase-change material fusing point, selects decrystallized speed as transformation rate, when When phase change layer temperature is less than phase-change material fusing point, selects crystallization velocity as transformation rate, phase transformation is calculated according to transformation rate and deposits The amorphous rate of storage unit.

Preferably, the method that described temperature computation module calculates real-time phase change layer temperature is:

$t=\&integral;\frac{\mathrm{iv}-(t-t_a)[1/r_{\mathrm{tb}}+1(r_{\mathrm{tgst}}+r_{\mathrm{tt}})]}{c_t}\mathrm{dt}+t_a,$

Wherein t is phase change layer temperature, and t is the time, and i is phase-changing memory unit electric current, and v is phase-changing memory unit two ends Voltage, t_aFor ambient temperature, each end-of-pulsing moment is using real-time phase change layer temperature as ambient temperature, r_tt、r_tb、r_tgstRespectively For Top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, c_tFor unit thermal capacitance；

Preferably, described phase-changing memory unit spice model system, its crystallization velocity computing module by nucleation rate and Growth rate is added the phase change layer volume obtaining crystallization change in the unit interval.

Preferably, described phase-changing memory unit spice model system, the amorphous that its decrystallized rate calculation module adopts Changing rate calculations method is:

v_aa=a₂(t-t_m)/(h₁r_ta),

Wherein, v_aaThe phase change layer temperature obtaining for temperature computation module for decrystallized speed, t, t_mFor phase change layer fusing point, h₁ For the latent heat of fusion, r_taFor the thermal resistance of non-crystallization region, a₂It is the proportionality coefficient that experiment records, for matching experimental result.

Preferably, described phase-changing memory unit spice model system, its phase transformation module includes selection circuit and electric capacity, Selection circuit selects crystallization velocity or decrystallized speed as transformation rate, and electric capacity is used for doing integral operation, calculates amorphous rate.

In general, by the contemplated above technical scheme of the present invention compared with prior art, due to temperature computation mould The temperature change that pulse signal causes is counted block ambient temperature it is contemplated that thermal accumlation effect, compared with prior art, improves To phase-changing memory unit resistance simulation accuracy under continuous impulse effect, further, since crystallization velocity computing module calculates Crystallization velocity method is based on nucleating growth theory, and decrystallized rate calculation module adopts the latent heat of fusion to calculate phase change layer amorphous simultaneously Change speed, more press close to real phase change layer crystallization and amorphization with respect to prior art, therefore can more accurately calculate Amorphous rate, thus improve the simulation accuracy to phase-change memory cell resistance.Due to phase transition storage provided by the present invention The lower phase-changing memory unit resistance of unit spice model system energy accurate simulation train pulse effect, can give chip circuit design Reliable reference is provided, therefore can improve efficiency and the accuracy of chip design, shorten the product design cycle.

According to another aspect of the present invention, above-mentioned phase-changing memory unit spice model system is applied to by the present invention Simulation phase transition storage multilevel storage.

The phase-changing memory unit spice model system energy accurate simulation phase-changing memory unit being provided due to the present invention Resistance value, during the simulation erasable process of phase-changing memory unit, additional specific electrical signal, phase-changing memory unit spice model system System can assume corresponding resistance value, and the phase-changing memory unit resistance of simulation can rise or fall to maximum resistance, minimum electricity Arbitrary value between resistance, can be used for the simulation of multilevel storage technology, solves current phase-changing memory unit spice model system During simulation resistance uphill process, it is only capable of taking highest resistance it is impossible to assume other resistances, thus may not apply to simulate many-valued depositing The problem of storage.

Brief description

Fig. 1 is the structural representation of the phase-changing memory unit spice model system of the present invention；

Fig. 2 is that the phase-changing memory unit spice model system of the present invention updates ambient temperature under continuous impulse effect Method schematic diagram；

Fig. 3 is that the temperature that causes of phase-changing memory unit spice model system load pulses of the present invention, resistance variations are bent Line chart；

Fig. 4 be the present invention phase-changing memory unit spice model system load continuous impulse sequence simulation result with Experimental data comparison diagram；

Fig. 5 is the resistance of the phase-changing memory unit spice model system emulation of the present invention with voltage change curve figure；

Fig. 6 is that the multilevel storage under different amplitude pulse for the phase-changing memory unit spice model system of the present invention is imitated True result schematic diagram；

In all of the figs, identical reference is used for representing identical element or structure, wherein: 1 is cell resistance Analog module, 2 is temperature computation module, and 3 is crystallization velocity computing module, and 4 is decrystallized rate calculation module, and 5 is phase transformation mould Block.

Specific embodiment

In order that the objects, technical solutions and advantages of the present invention become more apparent, below in conjunction with drawings and Examples, right The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only in order to explain the present invention, and It is not used in the restriction present invention.As long as additionally, involved technical characteristic in each embodiment of invention described below The conflict of not constituting each other just can be mutually combined.

A kind of phase-changing memory unit spice model system that the present invention provides includes: cell resistance analog module, temperature Computing module, crystallization velocity computing module, decrystallized rate calculation module, phase transformation module.

Cell resistance analog module is coupled with other elements model system in integrated circuit as the interface of model system, presses According to crystal area proportion linear variability law, computing unit resistance, it inputs the signal of telecommunication outside model system, such as voltage, electric current Pulse, is output as phase-changing memory unit corresponding real-time current value, magnitude of voltage.Cell resistance analog module simulates phase change memory The calculation expression of device cell resistance is:

r=r_resetc_a+r_set(1-c_a),

Wherein, r is the resistance of phase-changing memory unit, r_resetIt is the maximum resistance of unit, r_setIt is the minimum electricity of unit Resistance, c_aIt is the amorphous rate of this phase change cells that phase transformation module provides.

Temperature computation module, for simulating phase change layer temperature.Temperature computation module according to the Joule heat of pulses generation, up and down Electrode thermal resistance, phase change layer thermal resistance, unit thermal capacitance and ambient temperature, calculate phase change layer temperature.For continuous impulse sequence, for mould Intend thermal accumlation effect, temperature computation module must also record ambient temperature, and after each end-of-pulsing, ambient temperature is updated For current phase change layer temperature, for accepting to calculate phase change layer temperature next time during pulse.Temperature computation module simulates phase change layer temperature Calculation expression be:

$t=\&integral;\frac{\mathrm{iv}-(t-t_a)[1/r_{\mathrm{tb}}+1(r_{\mathrm{tgst}}+r_{\mathrm{tt}})]}{c_t}\mathrm{dt}+t_a,$

Wherein, t is phase change layer temperature, and t is the time, and i is phase-changing memory unit electric current, and v is phase-changing memory unit two Terminal voltage, t_aFor ambient temperature, r_tt、r_tb、r_tgstIt is respectively Top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, c_tFor unit Thermal capacitance.Top electrode thermal resistance, bottom electrode thermal resistance, the computing formula of phase change layer thermal resistance are:

$r_{\mathrm{tb}}=a_1\frac{{10}^{-7}}{s},$

$r_{\mathrm{tt}}=r_{\mathrm{tb}}/2,$

$r_{\mathrm{tgst}}=\frac{c_a{d}_{\mathrm{gst}}}{{\mathrm{sk}}_a}+\frac{(1-c_a)d_{\mathrm{gst}}}{{\mathrm{sk}}_c},$

Wherein, a₁It is the proportionality coefficient that experiment records, for matching experimental result, s is the contact that bottom electrode is with phase change layer Area, c_aIt is the amorphous rate of phase change resistor, d_gstIt is the thickness of phase change layer, k_a、k_cIt is respectively phase change layer and be in amorphous state and crystalline substance The thermal conductivity of state.The computing formula of unit thermal capacitance is:

c_t=τ/[1/r_tb+1/(r_tgst+r_tt)],

Wherein, r_tt、r_tb、r_tgstIt is respectively Top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, τ is thermal time constant.

Crystallization velocity computing module, occurs according in the phase change layer temperature of temperature computation module output, unit of account time The phase change layer volume of crystallization.Crystallization velocity computing module is based on nucleation-growth theory, by the bar in uniform temperature and amorphous rate Under part, phase change layer nucleation rate is added with growth rate, is crystallization speed as the phase change layer volume that crystallization occurred in the unit interval Rate, and export, its computing formula is:

v_ac=-(p_nv_nv_a/v_m+s_av_g),

Wherein, v_acIt is crystallization velocity, p_nIt is the nucleation probability of unit interval, v_nIt is into Assessment of Nuclear Volume, v_aIt is non-crystallization region body Long-pending, v_mIt is the molecular volume of phase-change material, s_aIt is the interfacial area of non-crystallization region and crystalline areas, v_gIt is growth rate.Each ginseng Number computing formula is as follows:

$p_n=\mathrm{\αexp}[-(e_{a1}+\frac{16\mathrm{\π}{\mathrm{\γ}}^3}{3\mathrm{\δ}{g}^2})/\left(k_{b}t\right)],$

$v_n=\frac{4\mathrm{\π}}{3}{(2\mathrm{\γ}/\mathrm{\δg})}^3,$

$v_a=\frac{2\mathrm{\π}}{3}{c}_a{d_{\mathrm{gst}}}^3,$

$s_a=2\mathrm{\π}{\left(\frac{3v_a}{2\mathrm{\π}}\right)}^{2/3},$

$v_g={\mathrm{fa}}_0\mathrm{\α}[1-\exp (-\frac{\mathrm{\δg}}{k_{b}t})]\exp (-\frac{e_{a2}}{k_{b}t}),$

Wherein, e_a1It is nucleation activation energy, δ g is Excess Gibbs Free Energy, k_bIt is Boltzmann constant, t is phase change layer Temperature, γ is the excess free energy of unit area, c_aIt is the amorphous rate of phase change resistor, d_gstIt is the thickness of phase change layer, f is raw The long pattern factor, a₀It is atomic transition distance, α is the frequency factor of atomic vibration, e_a2It is atomic scattering activation energy.Wherein:

$\mathrm{\δg}=h_1\frac{t_m-t}{t_m},$

F=exp [- 0.8/ (1-t/t_m)],

Wherein, t_mIt is the fusing point of phase change layer material, t is phase change layer temperature, h₁The latent heat of fusion for phase change layer material.

Decrystallized rate calculation module, sends out according in the phase change layer temperature of temperature computation module output, unit of account time Raw decrystallized phase change layer volume.Decrystallized rate calculation module, according to ambient temperature, amorphous rate, calculates decrystallized speed, Its computing formula is:

v_aa=a₂(t-t_m)/(h₁r_ta),

Wherein, v_aaFor decrystallized speed, a₂The phase change layer temperature simulated for temperature computation module for adjustability coefficients, t, t_mFor Phase change layer fusing point, h₁For the latent heat of fusion of phase change layer material, r_taThermal resistance for non-crystallization region.The thermal resistance calculation of non-crystallization region Formula is:

r_ta=c_ad_gst/(sk_a),

Wherein, c_aIt is the amorphous rate of phase change resistor, d_gstIt is the thickness of phase change layer, s is the contact that bottom electrode is with phase change layer Area, k_aIt is in amorphous thermal conductivity for phase change layer.

Phase transformation module, calculates the amorphous rate of phase-changing memory unit.Phase transformation module includes selection circuit and electric capacity, according to Phase change layer temperature selects crystallization velocity or decrystallized speed as effective transformation rate, calculates phase-changing memory unit decrystallized Rate, when phase change layer temperature is less than fusing point, selection circuit using crystallization velocity as output, otherwise using decrystallized speed as defeated Go out.Electric capacity as integrating circuit, for integral operation.One end ground connection of electric capacity, the other end connects the outfan of selection circuit.Electricity The both end voltage held is used for providing amorphous rate.The calculating formula of capacitance is:

$c=\frac{2\mathrm{\π}}{3}{d}_{\mathrm{gst}}^3,$

Wherein, c is capacitance, d_gstIt is the thickness of phase change layer.Amorphous rate is calculated according to capacitance, formula is as follows:

$c_a=\frac{1}{c}{\&integral;v}_a\mathrm{dt},$

Wherein, c is capacitance, v_aIt is effective transformation rate, t is the time.Wherein effectively transformation rate determines that method is as follows:

$v_a=\left\{\begin{array}{cc}{v}_{\mathrm{ac}},& t<\mathrm{tm}\\ v_{\mathrm{aa}},& t\&greaterequal;\mathrm{tm}\end{array}\right.$

Wherein, v_acIt is crystallization velocity, v_aaIt is non-crystallization velocity, t is phase change layer temperature, t_mIt is the fusing point of phase change layer material.

In such scheme, phase change material properties parameter can be searched from physics handbook or document, and phase-changing memory unit is special Property parameter experimentally record or using phase transition storage manufacturer provide data.Wherein, nucleation activation energy (e_a1), atom Scattering activation energy (e_a2), atomic transition distance (a₀), the frequency factor (α) of atomic vibration, molecular volume (v_m), unit area Excess free energy (γ), Boltzmann constant (k_b), the fusing point (t of phase change layer material_m), the latent heat of fusion (h₁) it is that phase-change material is special Property, such as phase-change material ge₂sb₂te₅, its e_a1For 2.19ev, e_a2For 2.23ev, a₀For 10^-10M, α are 4 × 10²⁵/ s, v_mFor 2.9 × 10^-28m³, γ is 0.1j/m², k_bFor 8.617 × 10^-5Ev/k, t_mIt is 889k, h₁For 4.189 × 10⁸j/m³.Phase transition storage list Maximum resistance (r in first characterisitic parameter_reset), most low-resistance (r_set), the amplitude of the amplitude of set pulse and width, reset pulse With width and adjustability coefficients (a₁、a₂) it is experimental measurements；Phase change layer thickness (d_gst), bottom electrode and phase change layer contact area (s), Amorphous state thermal conductivity (k_a), crystalline state thermal conductivity (k_c) using manufacturer provide data.

It is below specific embodiment:

As an example, the phase-changing memory unit spice model system being provided using the present invention is to phase-changing memory unit It is simulated, model file is write using verilog-a language, and is emulated in hspice software.Phase transition storage list The structural representation of first spice model system as shown in figure 1, comprising cell resistance analog module, temperature computation module, crystallization speed Rate computing module, decrystallized rate calculation module, phase transformation module.For continuous impulse sequence, for simulating thermal accumlation effect, temperature Degree computing module, in the finish time in each pulse spacing, ambient temperature value is updated to real-time phase change layer temperature value, such as Fig. 2 Shown.

Phase-changing memory unit adopts ge₂sb₂te₅As phase-change material, then there is e_a1For 2.19ev, e_a2For 2.23ev, A0 is 10^-10M, α are 4 × 10²⁵/ s, v_mFor 2.9 × 10^-28m³, γ is 0.1j/m², k_bFor 8.617 × 10^-5Ev/k, t_mIt is 889k, h₁For 4.189 × 10⁸j/m³.Experiment measures to obtain r_resetFor 850k ω, r_setFor 3k ω, the amplitude of set pulse is 2.5v, and width is The amplitude of 40ns, reset pulse is 4.2v, and width is 40ns, a₁For 0.47, a₂For 2.D is had according to the data that manufacturer provides_gst For 75nm, s is 4 × 10^-16m², k_aFor 0.2w/ (k-w), k_cFor 0.5w/ (k-w).

When loading amplitude 4.2v, the reset pulse of width 40ns and amplitude 2.5v, the set pulse of width 40ns, emulation Result phase change layer temperature, cell resistance value changes curve are as shown in Figure 3.When temperature meets or exceeds phase change layer fusing point, resistance Value raises.When loading set pulse, temperature change to crystallization temperature region, resistance value reduces.

For testing phase-changing memory unit spice model system provided by the present invention, when loading continuous impulse sequence, right The phase-changing memory unit spice model system that phase-changing memory unit itself, the present invention provide, prior art do not consider heat The phase-changing memory unit spice model system of build-up effect has been made to test respectively.In the continuous impulse sequence amplitude loading it is 4.2v, width be 40ns, interpulse period be 20ns in the case of, actual measurement phase-changing memory unit resistance, the present invention provide The simulation value of phase-changing memory unit spice model system simulation, do not consider the spice model system mould of thermal accumlation effect The simulation value intended is as shown in Figure 4.Experimental result shows, the phase-changing memory unit spice model system being provided using the present invention Simulation simulation value than the spice model system not considering thermal accumlation effect simulation value substantially closer to real phase transformation Memory cell resistance variations, especially, increase with the time applying pulse train, thermal accumlation effect embodies more bright Aobvious, the simulated effect advantage of the phase-changing memory unit spice model system that the present invention provides becomes apparent from.

In order to emulate rv curve, apply the pulse train that pulsewidth is 40ns.The initial magnitude of pulse is 2v, passing with 0.1v Increment, is stepped up pulse amplitude.Load two group pulse sequences in simulation process, the pulse spacing of one group of sequence is 15ns, The pulse spacing of another group of sequence is 100ns.Fig. 5 show the rv curve that emulation obtains.After voltage is more than 3v, with pulse width Value is gradually increased, and cell resistance is stepped up, because the reason interval reduces, accumulation of heat accelerates, the rv of pulse spacing 15ns The set threshold voltage of the rv curve of curve ratio pulse spacing 100ns, reset threshold voltage are little, and during pulse spacing 15ns, Resistance value declines after raising again.It can be observed in figure 5, during resistance rises, declines, resistance value all gradually becomes Change, assume many Distribution value, meet the characteristic of real devices.

In order to emulate multilevel storage technology, applying pulse width be 60ns, pulse amplitude be respectively 2.0v, 2.5v, 3.0v, The potential pulse of 3.5v.Resistance change curves during the pulse of different amplitudes for the phase-changing memory unit are as shown in Figure 6.Pulse Amplitude is higher, and the phase-changing memory unit resistance value obtaining is bigger, and resistance occurs in that four kinds of distribution state, respectively 185k ω, 347k ω, 531k ω and 696k ω, show that the phase-changing memory unit spice model system that the present invention provides supports many-valued depositing The circuit simulation of storage technology.

As it will be easily appreciated by one skilled in the art that the foregoing is only presently preferred embodiments of the present invention, not in order to Limit the present invention, all any modification, equivalent and improvement made within the spirit and principles in the present invention etc., all should comprise Within protection scope of the present invention.

Claims (3)

1. a kind of phase-changing memory unit spice model system is it is characterised in that include:

Cell resistance analog module, it is electric in real time that the amorphous rate for being provided according to phase transformation module calculates phase-changing memory unit Resistance, and the output of phase induced current is made to the voltage applying according to phase-changing memory unit real time resistance, and according to phase change memory Device unit real time resistance makes relevant voltage output to the current signal applying；

Temperature computation module, for according to ambient temperature and each pulse signal ends moment phase change memory of pulse heat calculation of effect Device unit phase change layer temperature, and ambient temperature is updated to real-time phase change layer temperature in each end-of-pulsing moment；Described temperature The method that computing module calculates real-time phase change layer temperature is:

$t=\&integral;\frac{iv-\left(t-t_a\right)\&lsqb;1/r_{tb}+1/\left(r_{tgst}+r_{tt}\right)\&rsqb;}{c_t}dt+t_a,$

Wherein t is phase change layer temperature, and t is the time, and i is phase-changing memory unit electric current, and v is phase-changing memory unit two ends electricity Pressure, t_aFor ambient temperature, each end-of-pulsing moment is using real-time phase change layer temperature as ambient temperature, r_tt、r_tb、r_tgstIt is respectively Top electrode thermal resistance, bottom electrode thermal resistance, phase change layer thermal resistance, c_tFor unit thermal capacitance；

Crystallization velocity computing module, occurs in the phase change layer temperature being exported according to temperature computation module, unit of account time The phase change layer volume of crystallization；Nucleation rate is added with growth rate and obtains sending out in the unit interval by described crystallization velocity computing module The phase change layer volume of raw crystallization change；

Decrystallized rate calculation module, sends out in the phase change layer temperature being exported according to temperature computation module, unit of account time Raw decrystallized phase change layer volume；The decrystallized rate calculations method that described decrystallized rate calculation module adopts is:

v_aa=a₂(t-t_m)/(h₁r_ta),

Wherein, v_aaThe phase change layer temperature obtaining for temperature computation module for decrystallized speed, t, t_mFor phase change layer fusing point, h₁It is molten Change latent heat, r_taFor the thermal resistance of non-crystallization region, a₂It is the proportionality coefficient that experiment records, for matching experimental result；

Phase transformation module, when phase change layer temperature is higher than phase-change material fusing point, selects decrystallized speed as transformation rate, works as phase transformation When layer temperature is less than phase-change material fusing point, selects crystallization velocity as transformation rate, phase transition storage is calculated according to transformation rate The amorphous rate of unit.

2. phase-changing memory unit spice model system as claimed in claim 1 is it is characterised in that described phase transformation module bag Include selection circuit and electric capacity, selection circuit is used for selecting crystallization velocity or decrystallized speed as transformation rate, electric capacity by based on Calculate amorphous rate.

3. the phase-changing memory unit spice model system as described in claim 1 to 2 any one, is applied to simulate phase transformation Memorizer multilevel storage.