CN103488063A - Align marker and manufacturing method thereof - Google Patents
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- CN103488063A CN103488063A CN201210190822.1A CN201210190822A CN103488063A CN 103488063 A CN103488063 A CN 103488063A CN 201210190822 A CN201210190822 A CN 201210190822A CN 103488063 A CN103488063 A CN 103488063A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
- G03F9/708—Mark formation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
The invention discloses an align marker and a manufacturing method thereof. The align marker is manufactured by adopting an anisotropic etching technology. Because the etching speed in different crystal planes of a wafer is different in the anisotropic etching technology, specific crystal planes can be etched out in the wafer. A V-shaped groove is formed according to the characteristic, because two groove surfaces are both crystal planes with a specific crystal orientation, the groove ridge line formed by the two groove surfaces must be perpendicular to the crystal orientation of the wafer. So the align marker provided by the invention can avoid align errors, which is brought in during the wafer production process, and improves the precision and accuracy of the post align technology.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of alignment mark and preparation method thereof.
Background technology
From early 1960s up till now, the lithography alignment technology aims at from initial light field and details in a play not acted out on stage, but told through dialogues interference holography of today or the holographic technique of alignment of difference interference and mixing coupling and thick, the fine alignment technology of developing into, alignment precision is brought up to nanoscale by original micron order, has promoted the development of integrated circuit.China " Review of Alignment Technology for Lithography)) (total the 117th phase in 2004, the 30th to 34 pages) looked back the development function of lithography alignment technology, principle and characteristics to various alignment methods are analyzed and are estimated, and have introduced several typical main flow lithography alignment system architecture forms.
Along with the development of integrated circuit, electronic devices and components that can be integrated on monolithic chip are also more and more, and device sum that at present can be integrated on monolithic chip is over 1,000,000,000., when yet wafer is produced from wafer factory, its surface is the pure crystal face that does not contain any device.Semiconductor production manufacturer need to pass through plated film and photoetching process repeatedly on the surface of naked crystalline substance, finally forms the semiconductor devices of certain function.Almost each step photoetching process all relates to the process of contraposition.
So-called contraposition or alignment procedures, refer to by the machine recognition on lithographic equipment or the special alignment mark of eye recognition substrate surface, thereby make postchannel process He Qian road technique have locational overlapping.For wafer, the alignment mark of photoetching for the first time need to be produced on substrate surface as required.The quality of this photoetching alignment mark has very important impact to the whole manufacturing process of semiconductor devices: the first, and it has determined the position precision of follow-up all devices; The second, it has also identified the lattice arrangement direction of crystal column surface.Importance for second point is, when wafer is cut into wafer from crystal column, often all need to determine according to follow-up purposes the cut direction of wafer, such as<100 > wafer in crystal orientation is used for manufacturing MOS device and circuit, and<111 > crystal orientation wafer is used for manufacturing bipolar device and circuit.Gallium arsenide can only be along<100 > the crystal face cutting.Thereby, on the wafer of different crystal orientations, the alignment mark of head time photoetching also needs to have the function in this wafer crystal orientation of sign.
A kind of existing method of making head time photoetching alignment mark is that the flat limit while dispatching from the factory according to wafer, be positioned at wafer in lithographic equipment, the alignment mark that goes out to need by chemical wet etching.Although present ASML, NIKON, the novel litho machine of the companies such as CANON is all built-in high-precision optics is to Ping Bian mechanism, the bit errors of being introduced by litho machine is very little, but be limited to technological level, the crystal orientation of the wafer that wafer factory produces can't guarantee that definitely accurately simultaneously, on wafer, indicated crystal orientation and actual crystal orientation, flat limit also has error usually.Above various error stack, the alignment mark figure and the angle between actual crystal orientation that cause the flat limit contraposition of direct basis wafer to be produced are larger.
Therefore, be necessary to propose a kind of new alignment mark method for making, make the problems of the prior art be resolved.
Summary of the invention
In view of this, the present invention proposes a kind of alignment mark and preparation method thereof, the main identification line in this alignment mark strictly collimates in a particular crystal orientation, and is not subject to the impact of manufacture craft, makes this alignment mark guarantee the contraposition degree of accuracy of the first photoetching.
A kind of alignment mark proposed according to purpose of the present invention, being formed at one has on the wafer substrate of substrate orientation, described alignment mark comprises the first V-type groove and the second V-type groove, the piston ring land line of this first V-type groove and the second V-type groove is orthogonal, two the first groove faces of described this first V-type groove and two the second groove faces of described the second V-type groove have the surface orientation of same family of crystal planes, and this surface orientation is different from described substrate orientation, wherein the piston ring land line of the folded formation of two the first groove faces strictly collimates in the substrate crystal orientation.
Preferably, described substrate orientation is (100).
Preferably, the surface orientation of described two the first groove faces and two the second groove faces is { 111} face.
Preferably, the piston ring land line straight line of the piston ring land line of described the first V-type groove and the second V-type groove intersects, and forms cruciform.
Preferably, the piston ring land line of the piston ring land line of the first V-type groove and the second V-type groove forms to misplace and intersects.
The present invention proposes the method for making of above-mentioned alignment mark, the method comprising the steps of simultaneously:
Provide one to there is the wafer substrate of substrate orientation, make one deck mask layer on this substrate;
Etch the surfacial pattern of alignment mark on described mask layer, in the corresponding zone of the surfacial pattern of described alignment mark, expose substrate;
An anisotropic etching step is carried out in the substrate zone that described mask layer is come out, and the alignment mark surfacial pattern according on mask layer obtains alignment mark on substrate.
Preferably, described mask layer comprises the lamination of lamination, dielectric and the semiconductor material of photoresist, dielectric material, dielectric material, or the lamination of dielectric material and photoresist.
Preferably, the surfacial pattern of the alignment mark on described mask layer is the hollow cruciform.
Preferably, described anisotropic etching is wet-etching technology or reactive ion etching process.
Preferably, the etching liquid in described wet-etching technology is potassium hydroxide solution or tetramethyl peace hydroxylate solution.
Above-mentioned alignment mark and preparation method thereof, form by adopting the anisotropic etching fabrication techniques, because the etch rate of anisotropic etching on the different crystal faces of wafer is inconsistent, can on wafer, etch specific crystal face.According to the V-type groove of this Characteristics creation, because two groove faces are all the crystal faces with particular crystal orientation, so the piston ring land line of its folded formation also must collimate and the wafer crystal orientation.Therefore alignment mark of the present invention can be avoided the bit errors that wafer production process is introduced, and improves degree of accuracy and the accuracy of follow-up alignment process.
The accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, below will the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the alignment mark structural representation under first embodiment of the invention;
Fig. 2 is the sectional view in AA cross section in Fig. 1;
Fig. 3 is the alignment mark structural representation under second embodiment of the invention;
Fig. 4 and Fig. 5 are alignment mark method for making process flow diagram and the structural change figure under the first embodiment of the present invention;
Fig. 6 is the alignment mark surfacial pattern schematic diagram on mask layer under the flat limit of wafer and the first embodiment;
Fig. 7 is the enlarged drawing in the dotted line frame in Fig. 6;
Fig. 8 is the alignment mark surfacial pattern schematic diagram on mask layer under the second embodiment;
Fig. 9 and Figure 10 be respectively alignment mark in the first embodiment and the second embodiment the use schematic diagram.
Embodiment
As described in the background art, in existing alignment mark manufacturing process, litho machine need to rely on the flat limit of wafer itself as the contraposition object of reference.Although the accuracy of identification of litho machine itself has been developed a limit, make the contraposition degree of accuracy by flat limit reach requirement, but due to the Ping Bianben of wafer in manufacturing process, can introduce inevitable fabrication error, the machine error existed in the cutting of wafer and process of lapping, therefore using the alignment mark that flat limit makes as the reference thing, there is certain error in also inevasible meeting.These errors not only affect the setting accuracy in subsequent device manufacturing process, when some need to rely on the element manufacturing of wafer orientation, also can affect because of the crystal orientation of not aiming at wafer the optimum working performance of device.
Therefore the present invention, for addressing the above problem, has proposed a kind of alignment mark and preparation method thereof, and the method for making of this alignment mark is to utilize the anisotropic etching technology, produces on the wafer substrate surface and has the V-type groove intersected vertically.Anisotropic etching technology described here, while referring to the crystal column surface etching, along the etch rate on different crystal orientations, be different, take three kinds of modal wafer substrate (100), (110), (111) is example, the orientation of supposing wafer is (110), if the ratio of etch rate on (111) crystal orientation and (110) crystal orientation is 2:1, be anticipated that, the degree of depth of etching groove structure out on (111) direction, than the showed increased on (110), makes groove demonstrate obvious rectangle.Selection by concrete etching technics, such as etching liquid, etching ion or the etched surface of wafer is done to chemical treatment, can, so that the crystal face etch rate difference of anisotropic etch process on different orientation is more outstanding, even on some crystal faces, occur that etch rate is zero.Etching groove structure out now, just likely occur take that the crystal face that etch rate is zero place is that groove face forms the V-type groove.Now, the piston ring land of V-type groove forms because the groove face by two particular crystal orientation is folded, therefore this piston ring land line must be along a certain lattice arrangement direction, using this V-type groove as alignment mark, can guarantee the crystal orientation strict conformance with wafer substrate, and because this technique is just few to the dependence on the flat limit of wafer, there do not is the impact of fabrication error, greatly improved the degree of accuracy of contraposition.
Below will be described in detail alignment mark of the present invention and preparation method thereof.
For the ease of understanding inventive concept of the present invention, first several technical terms of the present invention are done to definition.
" substrate orientation ", while referring to that wafer dispatches from the factory, the crystal column surface initial orientation formed in cutting technique.In practical application, the substrate orientation of wafer is made into (100), (110) and (111) three kinds of orientations usually.
" surface orientation ", refer to that wafer substrate is through after processing, formation there is the local real surface of certain angle with substrate surface, the crystal orientation at this real surface place, part is defined as the surface orientation of this part real surface.
" anisotropic etching ", refer to have along different crystal orientation the etching technics of different etch rates.In the present invention, " anisotropic etching " especially refers to have etch rate on substrate orientation, and do not have etch rate on other orientation different from this substrate orientation, and this another orientation not forms parallel or vertical relation with substrate orientation.The etching structure so formed, its groove face is likely just the V-type groove along a certain particular crystal orientation.
Table one has provided the wafer of three kinds of different substrate orientations and the angular relationship that other surface orientation place crystal faces form:
The family of crystal planes that the crystal orientation representative meaned with " { } " in table has same feature.
As can be seen from the above table, as long as the etch rate that the anisotropic etch process that three kinds of substrates are carried out meets on other crystal orientation except substrate orientation is zero, just can realize etching the said V-type groove with particular surface orientation of the present invention.
Below will to technical scheme of the present invention, be clearly and completely described by embodiment.Obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making under the creative work prerequisite the every other embodiment obtained, belong to the scope of protection of the invention.
Refer to Fig. 1 and Fig. 2, Fig. 1 is the alignment mark structural representation under first embodiment of the invention, and Fig. 2 is the sectional view in AA cross section in Fig. 1.As shown in the figure, this alignment mark is arranged on substrate 10, this alignment mark comprises the first V-type groove 11 of in the vertical direction and the second V-type groove 12 in the horizontal direction, the piston ring land line 121 of the piston ring land line 111 of this first V-type groove 11 and the second V-type groove 12 is orthogonal, in the present embodiment, these two piston ring land lines intersection that is in line, make these two piston ring land lines form the cruciform of standards.Two the second groove faces 122 of two the first groove faces 112 of described this first V-type groove and described the second V-type groove 12 have the surface orientation of same family of crystal planes, and this surface orientation is different from described substrate orientation, in the present embodiment, the substrate orientation of described substrate 10 is (100), and the surface orientation of two the first groove faces 112 and two the second groove faces 122 is all { 111}.According to the angular relationship in table 1, now can know that the angle β between groove face and substrate plane should be 54.7 degree.In other embodiment, also can adopt other substrate orientation and surface orientation to set above-mentioned each face.According to geometric relationship, now the piston ring land line 121 of the piston ring land line 111 of two the first groove face 112 folded formation or two the second groove face 122 folded formation strictly collimates in the crystal orientation of substrate { 100}.Here it should be noted that the definition according to solid state physics, crystal orientation 100} should comprise six direction, and respectively (100), (010), (001) and with other three directions of these three opposite directions.
Refer to Fig. 3, Fig. 3 is the alignment mark structural representation under second embodiment of the invention.In the present embodiment, the piston ring land line 221 of the piston ring land line 211 of the first V-type groove 21 and the second V-type groove 22 forms dislocation and intersects, described dislocation is intersected and to be referred to that piston ring land line 211 has a dislocation with the crossing place of piston ring land line 221, make this piston ring land line 211 take piston ring land line 221 as interfacial upper and lower two parts not on same straight line and be parallel to each other.Equally, piston ring land line 221 also has a dislocation with the crossing place of piston ring land line 211, make this piston ring land line 221 take piston ring land line 211 as interfacial left and right two parts not on same straight line and be parallel to each other.The reason that forms this kind of structure be alignment mark in manufacturing process, because the flat limit of wafer of initial contraposition has an angle with the crystal orientation of wafer, the cross figure that makes alignment mark also with crystal orientation formation certain angle.Below, in introducing the method for making of alignment mark of the present invention, will elaborate to this.
Refer to Fig. 4 and Fig. 5, Fig. 4 and Fig. 5 are alignment mark method for making process flow diagram and the structural change figure under the first embodiment of the present invention.As shown in the figure, this method for making comprises step:
S11: provide one to there is the wafer substrate 10 of substrate orientation, make one deck mask layer 13 on this substrate 10.
Described wafer substrate 10 is (100) crystal face in one embodiment, can be (110) face or (111) face in other embodiments.
Described mask layer 13 is follow-up during to the backing material etching, play the effect stopped, when substrate is carried out to etching, selected etching liquid or etching ion do not participate in reacting or reacting very slow with this layer mask layer 13, make etch areas only limit to the exposed region in mask layer 13.The material of this mask layer 13 can be the lamination of lamination, dielectric and the semiconductor material that can comprise photoresist, dielectric material, dielectric material, or the lamination of dielectric material and photoresist.The method of making this mask layer 13 can comprise the filming technologies such as physical vapour deposition (PVD), chemical vapor deposition, sputtering sedimentation, thermal oxide, growth in situ, spin coating.
S12: etch the surfacial pattern 131 of alignment mark on aforementioned mask layer 13, in this corresponding zone of surfacial pattern 131, expose substrate 10.
For the etching technics of this mask layer 13, can adopt dry etching or wet etching.While such as the material when mask layer 13, being photoresist, adopt the reticle mask exposure technique, the required figure that exposes on mask layer 13, then used developer solution to clean, and the photoresist of exposure area is gone out, and exposes following substrate.And while adopting other material as mask layer 13, need to be on this mask layer 13 spin coating photoresist (being photoresist) or other photosensitive materials, then expose the zone of required etching by exposure technology, then carry out the etching of alignment mark surfacial pattern by dry method or wet etching.
Here it may be noted that, in this step, location positioning for the alignment mark surfacial pattern, need to rely on the flat limit of wafer as object of reference, the initial contraposition that is litho machine is carried out with the flat limit of wafer, as shown in Figure 6, the flat limit 101 of wafer is the unique edge with crystal orientation indication, and this flat limit 101 is usually designed to along the direction in wafer crystal orientation.Under the error condition of not considering this flat limit 101, now on mask layer 13, etching figure out as shown in Figure 7, is a positive hollow cruciform, and criss-cross at least one limit of this hollow, strictly is parallel to crystal orientation.
S13: an anisotropic etching step is carried out in the substrate zone that aforementioned mask layer 13 is come out, and the alignment mark surfacial pattern 131 according on mask layer 13 obtains alignment mark on substrate.
Described anisotropic etching, can be wet-etching technology or reactive ion etching process, and the anisotropic etching of two types all needs to have different etch rates along the different crystal faces of substrate.When anisotropic etching finishes, form the crystal face lower for etch rate in anisotropic etch process along it.Pound in a kind of concrete embodiment, this anisotropic etch process is usingd the KOH aqueous solution as etching liquid, by substrate standing corrosion in the water-bath of 70 degree.The etch rate of KOH etching liquid on (100) face is nearly 100 times of (111) face, and the surface orientation of two groove faces of the V-type groove now formed is { 111}.In another embodiment, this anisotropic etch process is usingd pure TMAH(tetramethyl peace hydroxylate) solution is as etching liquid, in order to form { 110} face.In another embodiment, this anisotropic etch process adopts the DRAM(dynamic RAM) reactive ion etching in technique, this technique can etch { 110} face on substrate.
After etching completes, form the alignment mark of first embodiment of the invention.
Below introduce again the method for making of the alignment mark of the second embodiment.In this embodiment, the main consideration flat limit of wafer produces error in making, therefore the crystal orientation of wafer has a selected angle relatively, now, litho machine carries out the graph position of the alignment mark that contraposition decides according to this flat limit, also there is certain anglec of rotation in the flat limit of wafer relatively, refers to Fig. 8.In Fig. 8, etching hollow cruciform out on mask layer, in order to mean there is certain angle with the wafer crystal orientation, be drawn as askew angle (relatively Fig. 7) by signal, while now the substrate of this alignment mark surfacial pattern below being carried out to anisotropic etching, because the angle of etched surface is certain, so after the criss-cross top and the bottom of hollow and left and right partial etching complete, produce separately a dislocation, referring to Fig. 3, form the structure of alignment mark as shown in Figure 3.In present embodiment, all the other are identical with the first embodiment one, do not repeat them here.
Below in introduction, by alignment mark of the present invention, carry out the process to bit manipulation.Refer to Fig. 9 and Figure 10, Fig. 9 and Figure 10 be respectively alignment mark in the first embodiment and the second embodiment the use schematic diagram.As shown in the figure, alignment mark of the present invention is in order to the contraposition process of light shield in photoetching process and substrate, and now, the body alignment mark that is provided with a square or rectangle on light shield, be of the present invention with reference to the body alignment mark on substrate.The body alignment mark is moved, two adjacent sides of square or rectangle of take are comparison other, carry out contraposition with any two adjacent sides with reference to the cross structure on alignment mark, if the translation position between wafer substrate and light shield is relatively correct, two adjacent sides on the body alignment mark just in time cover with reference to two adjacent sides on alignment mark, otherwise have at least one not cover with reference to the limit on alignment mark.In like manner, if the position of rotation between wafer substrate and light shield is relatively correct, two adjacent sides on the body alignment mark just in time cover with reference to two adjacent sides on alignment mark, otherwise have at least one not cover with reference to the limit on alignment mark.
Concrete structure for alignment mark of the present invention, in the situation that based on inventive concept, can make suitable distortion, such as the alignment mark that alignment mark is designed to single straight line (only comprising a V-type groove), square or rectangle (many crossing V-type grooves) and other possible shape.Yet it is emphasized that and the alignment mark of the disclosed cross structure of embodiment of the present invention have following advantage: the contraposition in photoetching process usually needs the microscope relied on the eye-observation litho machine to carry out.If only adopt single straight line as alignment mark, need by eye-observation body alignment mark whether parallel with the object of reference alignment mark, now the piston ring land line of V-type groove is longer in principle, more easily judge that whether crestal line is parallel with alignment mark on photolithography plate, but the litho machine microscopic fields of view is limited in scope, if the oversize microscopic fields of view that exceeds of crestal line, equally can't contraposition.While adopting the alignment mark of other structures to carry out contraposition, because the litho machine microscopic fields of view is generally circular or square, so or only utilized in the litho machine microscopic fields of view the superfine zone that crestal line occupies, or exceed the microscopical visual field of litho machine.And the alignment mark that two V grooves that adopt cross structure form can take full advantage of the litho machine visual field, in the situation that the V-type slot length constant simultaneously two axially on contraposition, aligning accuracy can obviously be improved.
In sum, the present invention proposes a kind of alignment mark and preparation method thereof, this alignment mark adopts the anisotropic etching fabrication techniques to form, and because the etch rate of anisotropic etching on the different crystal faces of wafer is inconsistent, can on wafer, etch specific crystal face.According to the V-type groove of this Characteristics creation, because two groove faces are all the crystal faces with particular crystal orientation, so the piston ring land line of its folded formation also must collimate and the wafer crystal orientation.Therefore alignment mark of the present invention can be avoided the bit errors that wafer production process is introduced, and improves degree of accuracy and the accuracy of follow-up alignment process.
To the above-mentioned explanation of the disclosed embodiments, make professional and technical personnel in the field can realize or use the present invention.Multiple modification to these embodiment will be apparent for those skilled in the art, and General Principle as defined herein can be in the situation that do not break away from the spirit or scope of the present invention, realization in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (10)
1. an alignment mark, being formed at one has on the wafer substrate of substrate orientation, it is characterized in that: described alignment mark comprises the first V-type groove and the second V-type groove, the piston ring land line of this first V-type groove and the second V-type groove is orthogonal, two the first groove faces of described this first V-type groove and two the second groove faces of described the second V-type groove have the surface orientation of same family of crystal planes, and this surface orientation is different from described substrate orientation, wherein the piston ring land line of the folded formation of two the first groove faces strictly collimates in the substrate crystal orientation.
2. alignment mark as claimed in claim 1 is characterized in that: described substrate orientation is (100).
3. alignment mark as claimed in claim 2, it is characterized in that: the surface orientation of described two the first groove faces and two the second groove faces is { 111} face.
4. alignment mark as claimed in claim 1 is characterized in that: the piston ring land line straight line of the piston ring land line of described the first V-type groove and the second V-type groove intersects, and forms cruciform.
5. alignment mark as claimed in claim 1 is characterized in that: the piston ring land line of the piston ring land line of the first V-type groove and the second V-type groove forms dislocation and intersects.
6. the method for making as the described alignment mark of claim 1 to 5 any one, it is characterized in that: the method comprising the steps of:
Provide one to there is the wafer substrate of substrate orientation, make one deck mask layer on this substrate;
Etch the surfacial pattern of alignment mark on described mask layer, in the corresponding zone of the surfacial pattern of described alignment mark, expose substrate;
An anisotropic etching step is carried out in the substrate zone that described mask layer is come out, and the alignment mark surfacial pattern according on mask layer obtains alignment mark on substrate.
7. method for making as claimed in claim 6, it is characterized in that: described mask layer comprises the lamination of lamination, dielectric and the semiconductor material of photoresist, dielectric material, dielectric material, or the lamination of dielectric material and photoresist.
8. method for making as claimed in claim 6, it is characterized in that: the surfacial pattern of the alignment mark on described mask layer is the hollow cruciform.
9. method for making as claimed in claim 6, it is characterized in that: described anisotropic etching is wet-etching technology or reactive ion etching process.
10. method for making as claimed in claim 9 is characterized in that: the etching liquid in described wet-etching technology is potassium hydroxide solution or tetramethyl peace hydroxylate solution.
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| CN201210190822.1A CN103488063B (en) | 2012-06-11 | 2012-06-11 | A kind of alignment mark and preparation method thereof |
| PCT/CN2013/077120 WO2013185605A1 (en) | 2012-06-11 | 2013-06-10 | Alignment mark and fabrication method thereof |
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| CN201210190822.1A CN103488063B (en) | 2012-06-11 | 2012-06-11 | A kind of alignment mark and preparation method thereof |
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| CN104596412A (en) * | 2014-12-11 | 2015-05-06 | 中国科学院等离子体物理研究所 | Identification base for complex curved surface high-precision measuring and positioning |
| CN105428292A (en) * | 2015-11-17 | 2016-03-23 | 中国科学技术大学 | Method for aligning grating mask to crystal surface of silicon wafer {111} |
| CN107557731A (en) * | 2017-08-01 | 2018-01-09 | 武汉华星光电半导体显示技术有限公司 | A kind of mask plate |
| CN109983567A (en) * | 2019-02-13 | 2019-07-05 | 长江存储科技有限责任公司 | Label for registration pattern in semiconductor fabrication |
| CN112563246A (en) * | 2020-12-18 | 2021-03-26 | 河源市众拓光电科技有限公司 | Photoetching overlay mark and preparation method thereof |
| CN112947016A (en) * | 2021-01-26 | 2021-06-11 | 湖北光安伦芯片有限公司 | Method for improving alignment precision of different-machine photoetching mixed operation |
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| JPH065483A (en) * | 1992-06-19 | 1994-01-14 | Oki Shisutetsuku Tokai:Kk | Aligning method for semiconductor crystal substrate |
| US6533391B1 (en) * | 2000-10-24 | 2003-03-18 | Hewlett-Packard Development Company, Llp | Self-aligned modules for a page wide printhead |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104596412A (en) * | 2014-12-11 | 2015-05-06 | 中国科学院等离子体物理研究所 | Identification base for complex curved surface high-precision measuring and positioning |
| CN105428292A (en) * | 2015-11-17 | 2016-03-23 | 中国科学技术大学 | Method for aligning grating mask to crystal surface of silicon wafer {111} |
| CN107557731A (en) * | 2017-08-01 | 2018-01-09 | 武汉华星光电半导体显示技术有限公司 | A kind of mask plate |
| CN109983567A (en) * | 2019-02-13 | 2019-07-05 | 长江存储科技有限责任公司 | Label for registration pattern in semiconductor fabrication |
| US10811363B2 (en) | 2019-02-13 | 2020-10-20 | Yangtze Memory Technologies Co., Ltd. | Marks for locating patterns in semiconductor fabrication |
| CN112563246A (en) * | 2020-12-18 | 2021-03-26 | 河源市众拓光电科技有限公司 | Photoetching overlay mark and preparation method thereof |
| CN112947016A (en) * | 2021-01-26 | 2021-06-11 | 湖北光安伦芯片有限公司 | Method for improving alignment precision of different-machine photoetching mixed operation |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103488063B (en) | 2016-01-20 |
| WO2013185605A1 (en) | 2013-12-19 |
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Effective date of registration: 20171206 Address after: 214028 Xinzhou Road, Wuxi national hi tech Industrial Development Zone, Jiangsu, China, No. 8 Patentee after: Wuxi Huarun Shanghua Technology Co., Ltd. Address before: 214028 Wuxi provincial high tech Industrial Development Zone, Hanjiang Road, No. 5, Jiangsu, China Patentee before: Wuxi CSMC Semiconductor Co., Ltd. |