Summary of the invention
Purpose of the present invention is exactly in order to address the above problem; a kind of capacitor overvoltage of harmonic resonance protective device and method are provided; it adopts advanced hardware device; and, in conjunction with the harmonic resonance parser, capacitor is carried out to reliably protecting, it has can detect harmonic voltage in real time; reasonable in design; practical, cost is low, the advantage of high efficiency.
To achieve these goals, the present invention adopts following technical scheme:
A kind of capacitor overvoltage of harmonic resonance protective device, mainly comprise master control circuit board, harmonic wave gathers and modulate circuit, voltage follower circuit, the multicircuit switch circuit, the AD modular converter, the FPGA control module, communication module 485 telecommunication circuits and 232 telecommunication circuits, the human-computer interaction module circuit board, described analog quantity is the data that gather from electrical network by voltage transformer, through harmonic wave collection and modulate circuit, voltage follower circuit, multicircuit switch sends the AD modular converter to, described AD modular converter conversion is controlled by FPGA, after changing, data send to FPGA, described FPGA passes through the SPI communication forwarding to master control circuit board by data, described master control circuit board is obtained the electrical network current topological structure by 485 communications, described master control circuit board is obtained the man-machine interface user by 232 communications and is arranged, comprise the voltage upper lower limit value, out-of-limit time upper lower limit value, master control circuit board is communicated by letter the electrical network current information by 232 simultaneously, historical action message sends man-machine interface to by man-machine interaction and is convenient to user's inquiry.
The primary processor of described master control circuit board is used the eZdsp F2812 of TI company minimum system.The outer SRAM memory of sheet that has comprised TMS320F2812 chip, 512K, JTAG emulation controller, power management chip, clock circuit, reset circuit, interface unit.
Amplifying circuit in described harmonic wave collection and modulate circuit has adopted AD modular converter 620 chips, gain ranging is 1 to 10, 000, maximum source current is 1.3mA only, described voltage follower circuit has adopted AD modular converter 797 chips, maximum input offset voltage is 80V, maximum output current is 50mA, described multicircuit switch circuit adopts AD modular converter G1404, described AD modular converter change-over circuit adopts AD modular converter 7658 chips, described fpga chip adopts EP3C10E144C8N, 485 rs 232 serial interface signal change-over circuits and 232 level shifting circuits based on SP3220EEA of described communication module based on MAX487.
Described human-computer interaction module adopts Altay technical grade embedded main board ARM8019, described ARM8019 is the ARM10 processor, the PC104 mainboard, WinCE5.0 and driver 64MB SDRAM, 256MB NandFlash, 32MB NorFlash, DSTN and the TFT liquid crystal display screen of support rgb interface, support the VGA interface, 800x600 resolution.
A kind of overvoltage detection method of capacitor overvoltage of harmonic resonance protective device: after initialization, the specific works step is as follows:
Step 1: system sends limit value to master control circuit board by serial ports, simultaneity factor gather analog data, plant stand monitor data respectively by SPI communicate by letter, serial communication sends master control circuit board to;
Step 2: master control circuit board, according to grid equipment parameter in current electrical network telemetry reading database, is carried out model analysis and Method For Harmonic Power Flow computing, according to setting the protection limit value, makes final protection scheme;
Step 3: master control circuit board judgement user initialization system operational mode, if system runs on off-line state, the system protection scheme is shown in customer interface, waits for and manually determines whether to issue.If system runs on presence, so directly action command is handed down to main website.
Model analysis concrete steps in described step 2 are:
(1) read the data that gather in master control circuit board, establishing reference frequency is original frequency;
(2) impedance of analytical equipment under harmonic wave;
(3) form corresponding network admittance battle array according to the network topology structure read in master control circuit board;
(4) the admittance battle array is carried out to the mode processing;
(5) whether determination frequency exceeds the peak frequency restriction, general highest order 50 times, if exceeded, the output modalities analysis result, if do not have, repeat (2) step afterwards.
Harmonic trend in described step 2 is analyzed concrete steps:
(1) carry out the first-harmonic tidal current analysis;
(2) whether determination frequency equates with fundamental frequency, if equate, fundamental frequency all is stored in to monitor, if unequal, fundamental frequency is assigned to current frequency, judge whether the storage of fundamental frequency solution completes, if complete, fundamental frequency is stored in to monitor, if directly do not exit.
(3) obtain the harmonic wave list needed; If initial value is i=1, judge whether i equates with the multi harmonics that will solve, if equate, directly exit, if i is unequal with the multi harmonics that will solve, corresponding list of frequency is assigned to frequency.
(4) whether determination frequency equals fundamental frequency, if equate, i+1, start circulation from the i initial value, if unequal, first uses direct method to solve, i+1 then, then carry out same circulation.
First-harmonic tidal current analysis concrete steps in described harmonic trend analytical procedure (1) are:
Judge that whether load module is identical with corresponding admittance battle array, if identical, use direct method to solve, then finish, if different, judge whether the admittance battle array variation has occurred, if do not change, use solution by iterative method, if variation has occurred, need to again form the admittance battle array, re-use solution by iterative method.
Direct method concrete steps in described harmonic trend analytical procedure (4) are:
1. judge whether system admittance battle array variation has occurred, if do not change, number of times directly adds 1, if variation has occurred, need re-establish the admittance battle array, and number of times adds 1 again;
2. the Injection Current zero clearing, obtain the harmonic source Injection Current;
3. judge whether solving of system completes, if do not have, leaps to iterations and adds 1, last solution is direct method, finish, if complete, it is true solving successfully flag bit and convergence is masked as true, iterations adds 1, and last solution is that direct method is true, finishes.
Beneficial effect of the present invention:
1 the present invention has adopted modal analysis method and Method For Harmonic Power Flow to analyze overvoltage of harmonic resonance; for the correctness of Over-voltage Analysis provides " two guarantee "; carry out the exploitation of overvoltage protection on the basis as a result of two algorithm binding analysis, improved the accuracy of protective device simultaneously.
2 the present invention have adopted man-machine interaction that protection limit value, guard time limit value can be set.
3 can realize that off-line, online two kinds of modes move.Off-line mode provides corresponding protection scheme for current mains by harmonics situation, does not take control measure but the wait manual confirmation.Line model provides corresponding protection scheme for current mains by harmonics situation, directly by communication interface, action command is issued and is regulated.
4 can holding capacitor real-time harmonic voltage and the information such as harmonic current, line voltage distribution.
5 can keeping track of history action, data.
Embodiment
Below in conjunction with accompanying drawing and embodiment, the invention will be further described.
As Fig. 1, a kind of capacitor overvoltage of harmonic resonance protective device, mainly comprise master control circuit board, harmonic wave gathers and modulate circuit, voltage follower circuit, the multicircuit switch circuit, the AD modular converter, the FPGA control module, communication module 485 telecommunication circuits and 232 telecommunication circuits, the human-computer interaction module circuit board, described analog quantity is the data that gather from electrical network by voltage transformer, through harmonic wave collection and modulate circuit, voltage follower circuit, multicircuit switch sends the AD modular converter to, described AD modular converter conversion is controlled by FPGA, after changing, data send to FPGA, described FPGA passes through the SPI communication forwarding to master control circuit board by data, described master control circuit board is obtained the electrical network current topological structure by 485 communications, described master control circuit board is obtained the man-machine interface user by 232 communications and is arranged, comprise the voltage upper lower limit value, out-of-limit time upper lower limit value, master control circuit board is communicated by letter the electrical network current information by 232 simultaneously, historical action message sends man-machine interface to by man-machine interaction and is convenient to user's inquiry.
The primary processor of described master control circuit board is used the eZdsp F2812 of TI company minimum system.The outer SRAM memory of sheet that has comprised TMS320F2812 chip, 512K, JTAG emulation controller, power management chip, clock circuit, reset circuit, interface unit.
Amplifying circuit in described harmonic wave collection and modulate circuit has adopted AD modular converter 620 chips, and gain ranging is 1 to 10,000, and maximum source current is 1.3mA only.
Described voltage follower circuit has adopted AD modular converter 797 chips, and maximum input offset voltage is 80V, and maximum output current is 50mA.
Described multicircuit switch circuit adopts AD modular converter G1404, is the conducting of two path control signal control four-way switch, can guarantee the accuracy of signal simultaneously.
Described AD modular converter change-over circuit adopts AD modular converter 7658 chips.AD modular converter 7658 is that AD modular converter I company manufactures, and high integration, 6 passage 16-bit successively approach (SAR) type AD modular converter C, include 1 2.5V reference voltage source and reference buffer.AD modular converter 7658 has 6 ALT-CH alternate channels and is divided into 3 group of two passage.Can by the VA/VB/VC field of CONVST-A/B/C pin or control register control concrete use which to AD modular converter ALT-CH alternate channel.The reading out data number of times will be according to the number of channels setting of AD modular converter conversion.
Described fpga chip adopts EP3C10E144C8N, and FPGA has been used the concept of logical cell array in design, and inside comprises configurable logic blocks, output input module and three parts of interconnector.The FPGA combinational logic is by look-up tables'implementation, look-up table is connected with the input of d type flip flop, again by other logical circuit of trigger actuation or I/O, the logical block module formed like this can either realize logic function and sequential logic function, between module, between module and I/O, the use metal wire is connected.FPGA loads programming data to realize its logic function to inner static storage cell, and these logical blocks have determined the function that FPGA can realize, FPGA allows unlimited programming.
Described SPI is developed by motorola inc, a communication interface provided between CPU or DSP and other chips.The SPI working method is the MS master-slave machine pattern that a main frame connects single or multiple slaves.The SPI interface generally has four kinds of signals: serial shift clock signal SCLK, data output signal, data input signal, Low level effective from the enable signal line.
Described Communication Module Design 485 rs 232 serial interface signal change-over circuits and 232 level shifting circuits based on SP3220EEA based on MAX487.
Described human-computer interaction module adopts Altay technical grade embedded main board ARM8019, and described ARM8019 is the ARM10 processor, the PC104 mainboard, WinCE5.0 and driver 64MB SDRAM, 256MB NandFlash, 32MB NorFlash, support DSTN and the TFT liquid crystal display screen of rgb interface, support the VGA interface, 800x600 resolution, support 4 wire resistive touch screen master USB x1, from whole 2.0 standards of USB x1, RS232 interface x2, RS485 interface x1, support the CF card.
As a kind of as Fig. 3 overvoltage detection method of capacitor overvoltage of harmonic resonance protective device: after initialization, the specific works step is as follows:
Step 1: system sends the UI Preferences limit value to master control circuit board by serial ports, simultaneity factor gather analog data, plant stand monitor data respectively by SPI communicate by letter, serial communication sends master control circuit board to;
Step 2: master control circuit board, according to grid equipment parameter in current electrical network telemetry reading database, is carried out model analysis and Method For Harmonic Power Flow computing, according to setting the protection limit value, makes final protection scheme;
Step 3: master control circuit board judgement user initialization system operational mode, if system runs on off-line state, the system protection scheme is shown in customer interface, waits for and manually determines whether to issue.If system runs on presence, so directly action command is handed down to main website.
Model analysis concrete steps in step 2 are as described in Figure 4:
(1) read the data that gather in master control circuit board, establishing reference frequency is original frequency;
(2) impedance of calculation element under harmonic wave;
(3) form corresponding network admittance battle array according to the network topology structure read in master control circuit board;
(4) the admittance battle array is carried out to the mode processing;
(5) whether determination frequency exceeds the peak frequency restriction, general highest order 50 times, if exceeded, the output modalities analysis result, if do not have, repeat (2) step afterwards.
Described model analysis is Eigenvalues analysis, supposes to learn that according to frequency sweep method parallel resonance occurs at the frequency f place system.This just means that in the voltage phasor calculated by formula (1.1), some element has very large value at the frequency f place.
[V
f]=[Y
f]
-1[I
f] (1.1)
In formula: [Y
f] be the network admittance battle array of frequency while being f, [V
f] be node voltage, [I
f] be the node Injection Current.[I
f] to only have an injection rate and its numerical value be 1.0pu, other numerical value is 0.For contracted notation, below subscript f is omitted.
Serious resonance will occur while leveling off to singular matrix in node admittance battle array Y, and now the voltage of some node also will be very high.Therefore, problem just is transformed into research admittance battle array Y and how is tending towards unusual, and existing perfect eigenvalue Method just can complete this task.According to document, matrix Y can be broken down into following form:
[V]=[L]Λ[T] (1.2)
In formula, [Λ] is the diagonal angle eigenmatrix, and [L] is left eigenvector, and [T] is right characteristic vector, and [L]=[T]
-1, wushu (1.2) is brought formula (1.1) into and is obtained:
[V]=[L][Λ]
-1[T][I] (1.3)
Or
[T][V]=Λ
-1[T][I] (1.4)
Make [U]=[T] [V] is the mode voltage vector, and [J]=[T] [I] is the mode current vector.Formula (1.4) can be reduced to:
[U]=[Λ]
-1[J] (1.5)
Or
The λ reciprocal of defined feature value
-1for mode impedance (Z
m), unit is impedance.Analysis mode (1.6) is drawn a conclusion: if λ
1equal zero or be worth very little, by λ
1 -1for infinity, even very little mode 1 Injection Current J
1also can produce very high mode 1 voltage U
1.Mode voltage mode U
1only with mode 1 Injection Current J
1relevant, because the coefficient of other mode Injection Current is zero, therefore their voltage will not be subject to the impact of mode 1.In other words, use mode territory method to be analyzed harmonic resonance, the position of resonance will be easy to be distinguished.This generation that shows resonance is in fact relevant with certain modality-specific, and irrelevant with which bar bus Injection Current.
Mode electric current J
1with the right eigenvalue vector representation, be:
J
1=T
11I
1+T
12I
2+T
13I
3+…+T
1nI
n (1.7)
Analysis mode (1.7) can obtain: if T
13value is maximum, so node current I
3mode 1 electric current is played a major role.Be that bus 3 produces resonance in 1 time excited target the easiest of mode.On the contrary, if T
13very littlely approach zero, no matter I
3muchly can not produce resonance.Therefore we can be by observing crucial right characteristic vector [T
11, T
12, T
13..., T
1n] value analyze which node current and more easily make mode 1 produce resonance.In like manner analyze and know, crucial left eigenvector [L
11, L
21, L
31..., L
n1]
t] value of T can be used for judgement and more easily observe the bus position that mode 1 produces resonance, for example supposes L
31the value maximum, the node voltage on bus 3 also has very large value, this means that at bus 3 places are places of the most easily observing mode 1 resonance.
As Fig. 5 as described in it harmonic trend in step 2 analyze concrete steps and be:
(1) carry out the first-harmonic tidal current analysis;
(2) whether determination frequency equates with fundamental frequency, if equate, fundamental frequency all is stored in to monitor, if unequal, fundamental frequency is assigned to current frequency, is then stored;
(3) obtain the harmonic wave list needed; If initial value is i=1, judge whether i equates with the multi harmonics that will solve, if equate, directly exit, if i is unequal with the multi harmonics that will solve, corresponding list of frequency is assigned to frequency;
(4) whether determination frequency equals fundamental frequency, if equate, circulation, if unequal, used direct method to solve.
As Fig. 6 as described in it first-harmonic tidal current analysis concrete steps in harmonic trend analytical procedure (1) be:
Judge that whether load module is identical with corresponding admittance battle array, if identical, use direct method to solve, then finish, if different, judge whether the admittance battle array variation has occurred; If do not change, use solution by iterative method; If variation has occurred, need to again form the admittance battle array, re-use solution by iterative method.
Direct method concrete steps in harmonic trend analytical procedure (4) are as described in Figure 7:
1. judge whether system admittance battle array variation has occurred, if do not change, number of times directly adds 1, if variation has occurred, need re-establish the admittance battle array, and number of times adds 1 again;
2. the Injection Current zero clearing, obtain the harmonic source Injection Current;
3. judge whether solving of system completes, if do not have, leaps to iterations and adds 1, last solution is direct method, finishes, if complete, it is true solving successfully flag bit and convergence is masked as very, and iterations adds 1, and solution is true, finishes.
The groundwork of described harmonic trend is to calculate busbar voltage and line current, and according to the tidal current analysis system resonance, the tidal current analysis program completes following functions:
(1) first carry out the tidal current analysis under first-harmonic, obtain the system node fundamental voltage.
(2) set up the node admittance matrix Y of harmonic wave each time
bus.
(3) the voltage result obtained according to the first step is obtained respective nodes harmonic electric current with the harmonic source characteristic that is connected to this point.
(4) in known harmonic current source frequency spectrum I (h) situation, ask for busbar voltage V (h)=Z
bus(h) I (h).
(5) computational scheme electric current I
line(h)=Δ V (h)/Z
line(h).
Final solution in described step 2 refers to carries out total harmonic wave overvoltage protection or single harmonic component overvoltage protection, then calls corresponding protection subprogram.
Although above-mentioned, by reference to the accompanying drawings the specific embodiment of the present invention is described; but be not limiting the scope of the invention; one of ordinary skill in the art should be understood that; on the basis of technical scheme of the present invention, those skilled in the art do not need to pay various modifications that creative work can make or distortion still in protection scope of the present invention.