CN103474475B - A kind of thin-film transistor and preparation method thereof, array base palte, display unit - Google Patents
A kind of thin-film transistor and preparation method thereof, array base palte, display unit Download PDFInfo
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- CN103474475B CN103474475B CN201310432334.1A CN201310432334A CN103474475B CN 103474475 B CN103474475 B CN 103474475B CN 201310432334 A CN201310432334 A CN 201310432334A CN 103474475 B CN103474475 B CN 103474475B
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Abstract
The present invention relates to Display Technique field, particularly a kind of thin-film transistor and preparation method thereof, array base palte, display unit, the flexibility in order to solve the semiconductor active layer of the TFT existed in prior art can not meet the problem of the requirement of Flexible Displays.The TFT that the embodiment of the present invention provides, comprise semiconductor active layer, described semiconductor active layer is made by class graphene semiconductor, and wherein, described class graphene semiconductor is the product replaced the part carbon atom in graphene conductor by the atom that substitute element is corresponding after.The flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
Description
Technical field
The present invention relates to Display Technique field, particularly a kind of thin-film transistor and preparation method thereof, array base palte, display unit.
Background technology
Flexible Displays has the performances such as light, thin, flexible and shock-resistant, be applicable to mobile phone, personal digital assistant (PersonalDigitalAssistant, PDA), in the display unit such as e-book, notebook computer, electronic poster, automobile instrument, the potential advantages of Flexible Displays become increasingly conspicuous in recent years.
Need TFT(ThinFilmTransistor in display unit, thin-film transistor) drive realize picture display.Multiple grid line of being parallel to each other that the array base palte of display unit comprises underlay substrate and is positioned at inside underlay substrate and with described grid line square crossing and the multiple data wires be electrically insulated, wherein, two adjacent grid lines and two adjacent data lines surround a pixel cell.For the TFT of bottom grating structure, the TFT of each pixel cell comprises the gate electrode be positioned on underlay substrate, be positioned on underlay substrate and the gate insulation layer of covering grid electrode, be positioned at the semiconductor active layer on gate insulation layer and lay respectively at source electrode and the drain electrode of semiconductor active layer both sides.
The semiconductor active layer of described TFT is between source electrode and drain electrode, and when applying cut-in voltage on gate electrode, semiconductor active layer becomes the source electrode of TFT described in conducting and the conducting channel of drain electrode.Current described semiconductor active layer is formed by amorphous silicon semiconductor or metal-oxide semiconductor (MOS) etc.When the material of described semiconductor active layer is amorphous silicon semiconductor, because amorphous silicon semiconductor performance when carrying out bending can worsen thus can cause the deterioration of the performance of TFT, thus described semiconductor active layer can not bend; When the material of described semiconductor active layer is metal-oxide semiconductor (MOS), because the degree of crook of metal-oxide semiconductor (MOS) is very limited, when the degree of crook of metal-oxide semiconductor (MOS) exceedes the limit that self can bear, performance can worsen thus can cause the deterioration of the performance of TFT, and thus the flexibility of described semiconductor active layer is lower.Because Flexible Displays requires that the flexibility of the semiconductor active layer of described TFT is higher, thus the flexibility of TFT semiconductor active layer can not meet the requirement of Flexible Displays at present.
In sum, the flexibility of the semiconductor active layer of current TFT can not meet the requirement of Flexible Displays.
Summary of the invention
A kind of thin-film transistor that the embodiment of the present invention provides and preparation method thereof, array base palte, display unit, the flexibility in order to solve the semiconductor active layer of the TFT existed in prior art can not meet the problem of the requirement of Flexible Displays.
First aspect, a kind of TFT that the embodiment of the present invention provides, comprises semiconductor active layer;
Described semiconductor active layer is made by class graphene semiconductor, and wherein, described class graphene semiconductor is the product replaced the part carbon atom in graphene conductor by the atom that substitute element is corresponding after;
Wherein, substitute element be the 5th major element of the periodic table of elements, at least one element in the various elements that comprise of the 6th major element, the 7th major element and lanthanide series.
In embodiments of the present invention, because graphene conductor has extraordinary pliability, graphene conductor is rubbed and folding time its valence link also can not rupture, thus the class graphene semiconductor obtained by the chemical constitution changing graphene conductor also has extraordinary pliability, bending it, folding and when rubbing its valence link all can not rupture, correspondingly, the performance of class graphene semiconductor also can not change;
By by a kind of newly and there is extraordinary flexible class graphene semiconductor, for making the semiconductor active layer of the embodiment of the present invention, thus make the flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
Preferably, in the grid of described TFT, source electrode and drain electrode, at least one of them is made by graphene conductor.
In embodiments of the present invention, have that resistance is low, good stability, transparency are high due to graphene conductor and the advantage such as pliability is good, thus the embodiment of the present invention is by graphene conductor, for to make in grid, source electrode and drain electrode three at least one of them, the conductance of grid, source electrode and drain electrode, stability, transparency and pliability can be improved.
Preferably, described source electrode, drain electrode and described semiconductor active layer are arranged with layer.
In embodiments of the present invention, due to source electrode, drain electrode and described semiconductor active layer are arranged on same layer, thus can the thickness of thinning TFT, and then thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit.
Second aspect, a kind of array base palte that the embodiment of the present invention provides, comprises described TFT.
In embodiments of the present invention, the flexibility of the semiconductor active layer comprised due to the TFT of the embodiment of the present invention can meet the requirement of Flexible Displays, thus for the array base palte of TFT comprising the embodiment of the present invention, the flexibility of the semiconductor active layer that described array base palte comprises also can meet the requirement of Flexible Displays.
Preferably, at least one in many grid lines of described array base palte and data wire is made by graphene conductor.
In embodiments of the present invention, have that resistance is low, good stability, transparency are high due to graphene conductor and the advantage such as pliability is good, thus the embodiment of the present invention is by graphene conductor, for making at least one in many grid lines and data wire, the conductance of grid line and data wire, stability, transparency and pliability can be improved.
The third aspect, a kind of display unit that the embodiment of the present invention provides, comprises described array base palte.
In embodiments of the present invention, the flexibility of the semiconductor active layer comprised due to the array base palte of the embodiment of the present invention can meet the requirement of Flexible Displays, thus for the display unit of array base palte comprising the embodiment of the present invention, the flexibility of the semiconductor active layer that described display unit comprises also can meet the requirement of Flexible Displays.
Fourth aspect, the manufacture method of a kind of described TFT that the embodiment of the present invention provides, comprising:
Control the part carbon atom in the graphene conductor of atom replacement graphene conductor layer corresponding to substitute element, make graphene conductor layer convert class graphene semiconductor layer to;
According to the class graphene semiconductor layer converted to, form semiconductor active layer;
Wherein, described substitute element be the 5th major element of the periodic table of elements, at least one element in the various elements that comprise of the 6th major element, the 7th major element and lanthanide series.
In embodiments of the present invention, because graphene conductor has extraordinary pliability, graphene conductor is rubbed and folding time its valence link also can not rupture, thus the class graphene semiconductor obtained by the chemical constitution changing graphene conductor also has extraordinary pliability, bending it, folding and when rubbing its valence link all can not rupture, correspondingly, the performance of class graphene semiconductor also can not change;
And the semiconductor active layer formed is made by class graphene semiconductor, thus make the flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
Preferably, after described formation semiconductor active layer, the method also comprises the step forming source electrode and drain electrode, is specially:
In semiconductor active layer both sides and the region adjacent with semiconductor active layer forms source-drain electrode layer;
Patterned process is carried out to described source-drain electrode layer and forms source electrode and drain electrode.
In embodiments of the present invention, due to source electrode, drain electrode and described semiconductor active layer are arranged on same layer, thus can the thickness of thinning TFT, and thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit.
Preferably, the step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Form graphene conductor layer and source-drain electrode layer successively, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer and source-drain electrode layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
By patterned process, source-drain electrode layer corresponding to the 3rd region and graphene conductor layer are etched, and source-drain electrode layer corresponding to described first area is etched, and exposes the graphene conductor layer that described first area is corresponding;
By patterned process, the source-drain electrode layer making second area corresponding forms source electrode and drain electrode respectively;
Control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of graphene conductor layer corresponding to the described first area that exposes, the graphene conductor layer making described first area corresponding converts class graphene semiconductor layer to, and by class graphene semiconductor layer corresponding for first area, as the semiconductor active layer formed.
Those skilled in the art in embodiments of the present invention, provide the method that the first forms semiconductor active layer, source electrode and drain electrode simultaneously, so that can realize technical scheme of the present invention easily.It should be noted that; the concrete grammar of semiconductor active layer, source electrode and drain electrode is formed only for explaining the present invention in the embodiment of the present invention; and being not limited to the present invention, other method that may be used for realizing technical solution of the present invention is also within protection scope of the present invention.
In embodiments of the present invention, due to when forming semiconductor active layer and the source electrode be positioned on semiconductor active layer and drain electrode, the embodiment of the present invention only adopts a photoetching process, decreases a photoetching process, thus improves production efficiency.
Preferably, the step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Form graphene conductor layer, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
Control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of the graphene conductor layer of described first area, the graphene conductor layer of described first area is made to convert class graphene semiconductor layer to, and by the class graphene semiconductor layer of first area, as the semiconductor active layer formed;
By patterned process, the graphene conductor layer in described 3rd region is etched, and the graphene conductor layer of described second area form source electrode and drain electrode respectively.
Those skilled in the art in embodiments of the present invention, provide the method that the second forms semiconductor active layer, source electrode and drain electrode simultaneously, so that can realize technical scheme of the present invention easily.It should be noted that; the concrete grammar of semiconductor active layer, source electrode and drain electrode is formed only for explaining the present invention in the embodiment of the present invention; and being not limited to the present invention, other method that may be used for realizing technical solution of the present invention is also within protection scope of the present invention.
In embodiments of the present invention, because source electrode and drain electrode are made by graphene conductor, the conductance of source electrode and drain electrode, stability, transparency and pliability can thus be improved; Due to source electrode, drain electrode and described semiconductor active layer are arranged on same layer, thus can the thickness of thinning TFT, and thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit; In addition, due to when forming semiconductor active layer, source electrode and drain electrode, the embodiment of the present invention only adopts a photoetching process, decreases a photoetching process, thus improves production efficiency.
Compared with prior art, the embodiment of the present invention by by a kind of newly and there is extraordinary flexible class graphene semiconductor, for making semiconductor active layer, thus make the flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
Accompanying drawing explanation
Fig. 1 is the structural representation of Graphene of the prior art;
Fig. 2 A ~ Fig. 2 C is the structural representation of the TFT in the embodiment of the present invention;
Fig. 3 is the structural representation of the class graphene semiconductor in the embodiment of the present invention;
Fig. 4 is the structural representation of the pixel cell that the array base palte in the embodiment of the present invention comprises;
Fig. 5 is the method flow schematic diagram that the embodiment of the present invention makes array base palte;
Fig. 6 A ~ 6J is the profile that the embodiment of the present invention makes the pixel cell that array base palte comprises in array base palte process.
Embodiment
The TFT that the embodiment of the present invention provides, comprise semiconductor active layer, described semiconductor active layer is made by class graphene semiconductor, and wherein, described class graphene semiconductor is the product replaced the part carbon atom in graphene conductor by the atom that substitute element is corresponding after; At least one element in the various elements that substitute element is the 5th major element of the periodic table of elements, the 6th major element, the 7th major element and lanthanide series comprise, due to by by a kind of newly and there is extraordinary flexible class graphene semiconductor, for making the semiconductor active layer of the embodiment of the present invention, thus make the flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
In order to clearly demonstrate the scheme of the embodiment of the present invention, below first to the Graphene(Graphene mentioned in the embodiment of the present invention) describe in detail.
Graphene is a kind of conductor material of the individual layer laminated structure be made up of carbon atom.As shown in Figure 1, Graphene forms hexangle type by carbon atom with sp2 hybridized orbit and is honeycomb lattice and thickness only has the two-dimensional material of a carbon atom thickness.
Each carbon atom of Graphene is sp2 hydridization, and contribute the electronics on residue p track to form large π key, because pi-electron can move freely, thus Graphene has good conductivity, its resistivity than copper or silver lower, be the material that current resistivity is minimum.
The basic structural unit of Graphene is benzene hexatomic ring the most stable in organic material, and thus Graphene has good stability.
Graphene is the thinnest in the world is at present the hardest nano material also, and it is almost completely transparent, and only absorb the light of 2.3%, thus Graphene has good transparency.
Connection between the carbon atom of Graphene inside is very pliable and tough, and when applying external force in Graphene, the meeting flexural deformation of carbon atom face, make carbon atom need not rearrange to adapt to external force, thus holding structure is stablized, thus Graphene has good pliability.
Below in conjunction with Figure of description, the embodiment of the present invention is described in further detail.
As shown in Figure 2 A, the TFT that the embodiment of the present invention provides, comprises semiconductor active layer 6A;
Semiconductor active layer 6A is made by class graphene semiconductor, and wherein, described class graphene semiconductor is the product replaced the part carbon atom in graphene conductor by the atom that substitute element is corresponding after;
Wherein, substitute element be the 5th major element of the periodic table of elements, at least one element in the various elements that comprise of the 6th major element, the 7th major element and lanthanide series.
In concrete enforcement, after the atom that substitute element is corresponding replaces the part carbon atom in graphene conductor, after the conduction band of described graphene conductor and valence band are separated, described graphene conductor becomes class graphene semiconductor.
In concrete enforcement, by the chemical constitution by changing graphene conductor (namely class graphene semiconductor is, atom corresponding to substitute element replaces the part carbon atom in graphene conductor) semi-conducting material that obtains, thus may be used for the semiconductor active layer making the embodiment of the present invention; And class graphene semiconductor is by by changing the class grapheme material that the chemical constitution of Graphene obtains, thus class graphene semiconductor and grapheme material similar, there is good stability, pliability and transparency.
In enforcement, the embodiment of the present invention by by obtain described newly and there is extraordinary flexible class graphene semiconductor, for being made as semiconductor active layer, the flexibility of the semiconductor active layer of the embodiment of the present invention can be made can to meet the requirement of Flexible Displays.
Preferably, as shown in Figure 3, described class graphene semiconductor comprises carbon atom C and atom N(corresponding to substitute element is described for atom N), wherein the atom of atom N correspondence position in graphene conductor that each substitute element is corresponding is carbon atom.
Preferably, described VA(the 5th main group) representative element of element is N(nitrogen) element, VIA(the 6th main group) representative element of element is oxygen element, VIIA(the 7th main group) representative element of element is F(fluorine) element.
In concrete enforcement, by atom corresponding for substitute element being substituted the part carbon atom in graphene conductor, conduction band and the valence band of the graphene conductor that conduction band and valence band are overlapped are separated and have certain band gap, thus reduce the conductance of graphene conductor, realize the graphene conductor that conduction band and valence band overlap to change into valence band and conduction band separately and there is the class graphene semiconductor of certain band gap.
It should be noted that, the particular chemical of the class graphene semiconductor in the embodiment of the present invention only for explaining the present invention, and is not limited to the present invention, and other structure that may be used for realizing technical solution of the present invention is also within protection scope of the present invention.
Preferably, as shown in Figure 2 B, the TFT of the embodiment of the present invention comprise grid 1, at least one of them is made by graphene conductor in source electrode 7 and drain electrode 8 three.
In enforcement, the grid be made by graphene conductor, source electrode and drain electrode have good conductance, stability, transparency and pliability.
Preferably, as shown in Figure 2 C, the TFT of the embodiment of the present invention comprises source electrode 7, drain electrode 8 and semiconductor active layer 6A are arranged with layer.
In concrete enforcement, the source electrode that TFT comprises, drain electrode also can be identical with of the prior art with the vibrational power flow of semiconductor active layer, and such as, source electrode and drain electrode are arranged with layer, and are arranged on the top of semiconductor active layer.
In enforcement, source electrode, drain electrode and semiconductor active layer are arranged on same layer, can the thickness of thinning TFT, and then thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit.
The grid 1 shown in Fig. 2 A ~ 2C, gate insulator 2 between grid 1 and semiconductor active layer 6A is also comprised in the structure of TFT.
It should be noted that, the embodiment of the present invention take TFT as the introduction that the TFT of bottom grating structure carries out for example, and in a particular application, the TFT in the embodiment of the present invention also can be applied in top gate structure, that is, the TFT of the embodiment of the present invention also can be the TFT of top gate structure.
Preferably, the array base palte that the embodiment of the present invention provides, comprises described TFT.
In enforcement, the flexibility of the semiconductor active layer comprised due to the TFT of the embodiment of the present invention can meet the requirement of Flexible Displays, thus for the array base palte of TFT comprising the embodiment of the present invention, the flexibility of the semiconductor active layer that described array base palte comprises also can meet the requirement of Flexible Displays.
Preferably, the grid line that array base palte comprises is connected with the grid of TFT, and the data wire that array base palte comprises is connected with the source electrode of TFT, and at least one in described many grid lines and data wire is made by graphene conductor.
In enforcement, the grid line be made by graphene conductor and data wire have good conductance, stability, transparency and pliability.
It should be noted that, due in embodiments of the present invention, array base palte comprises multiple pixel cell, each pixel cell comprises a TFT, and the execution mode of TFT in each pixel cell of comprising of the array base palte that the embodiment of the present invention provides is similar, the execution mode of a pixel cell will comprised for the array base palte of the embodiment of the present invention below, is described the preferably execution mode of the embodiment of the present invention.
Embodiment one
Preferably, as shown in Figure 4, the pixel cell of the array base palte that the embodiment of the present invention provides, comprises TFT401, grid line 402, data wire 403, through hole 404 and pixel electrode 405;
TFT401 comprises grid 4011, be positioned on grid 4011 and the gate insulation layer (not shown) of cover gate 4011, be positioned at the semiconductor active layer 4012 on gate insulation layer and be positioned on semiconductor active layer 4012 and lay respectively at source electrode 4013 and the drain electrode 4014 of semiconductor active layer 4012 both sides;
Grid line 402 is connected with the grid 4011 of TFT401, and data wire 403 is connected with the source electrode 4013 of TFT401, and pixel electrode 405 is connected with drain electrode 4014 by through hole 404;
Semiconductor active layer 4012 is made by class graphene semiconductor, and grid 4011, source electrode 4013, drain electrode 4014, grid line 402 and data wire 403 are made by graphene conductor.
Preferably, the display unit that the embodiment of the present invention provides, comprises described array base palte.
In enforcement, the flexibility of the semiconductor active layer comprised due to the array base palte of the embodiment of the present invention can meet the requirement of Flexible Displays, thus for the display unit of array base palte comprising the embodiment of the present invention, the flexibility of the semiconductor active layer that described display unit comprises also can meet the requirement of Flexible Displays.
Preferably, described display unit can be: liquid crystal panel, Electronic Paper, OLED(OrganicLightEmittingDiode, Organic Light Emitting Diode) any product or parts with Presentation Function such as panel, mobile phone, panel computer, television set, display, notebook computer, DPF, navigator.
Preferably, the manufacture method of the TFT that the embodiment of the present invention provides, comprises the step forming semiconductor active layer:
Control the part carbon atom in the graphene conductor of atom replacement graphene conductor layer corresponding to substitute element, make graphene conductor layer convert class graphene semiconductor layer to;
According to the class graphene semiconductor layer converted to, form semiconductor active layer;
Wherein, substitute element be the 5th major element of the periodic table of elements, at least one element in the various elements that comprise of the 6th major element, the 7th major element and lanthanide series.
In enforcement, the semiconductor active layer of formation is made by having extraordinary flexible class graphene semiconductor, and thus the flexibility of the semiconductor active layer of the embodiment of the present invention can meet the requirement of Flexible Displays.
In concrete enforcement, semiconductor active layer, source electrode and drain electrode can be formed respectively, also can be formed, and the method forming semiconductor active layer, source electrode and drain electrode respectively or simultaneously has multiple, the embodiment of the present invention will exemplify three kinds of preferably execution modes simultaneously.
One, be introduced to the execution mode forming semiconductor active layer, source electrode and drain electrode respectively below.
Steps A 1, formation graphene conductor layer;
In concrete enforcement, the method for sputtering or thermal evaporation can be adopted, form graphene conductor layer.
Steps A 2, the part carbon atom controlled in the graphene conductor of atom replacement graphene conductor layer corresponding to substitute element, make graphene conductor layer convert class graphene semiconductor layer to;
Steps A 3, patterned process is carried out to the class graphene semiconductor layer converted to, form semiconductor active layer;
In concrete enforcement, by steps A 1 ~ steps A 3, achieve formation semiconductor active layer.
Steps A 4, in semiconductor active layer both sides and the region adjacent with semiconductor active layer forms source-drain electrode layer;
Steps A 5, described source-drain electrode layer carried out to patterned process and form source electrode and drain electrode.
In concrete enforcement, by steps A 4 ~ steps A 5, achieve and form source electrode and drain electrode.
In concrete enforcement, the formation source electrode of the embodiment of the present invention and the step of drain electrode also can with to form source electrode in prior art identical with the step of drain electrode, such as, sedimentary origin drain electrode layer on semiconductor active layer, and patterned process formation source electrode and drain electrode are carried out to source-drain electrode layer.
In concrete enforcement, the material of source-drain electrode layer can be made up of the metal, conducting metal oxide, graphene conductor etc. with electric conductivity.In addition, due to source electrode, drain electrode and described semiconductor active layer are arranged on same layer, thus can the thickness of thinning TFT, and thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit.
In concrete enforcement, preferably, source electrode and drain electrode are made by graphene conductor, can improve the conductance of source electrode and drain electrode, stability, transparency and pliability;
Two, be introduced to the first execution mode forming semiconductor active layer, source electrode and drain electrode simultaneously below.
Preferably, the step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Step B1, successively formation graphene conductor layer and source-drain electrode layer, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer and source-drain electrode layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
Step B2, by patterned process, source-drain electrode layer corresponding to the 3rd region and graphene conductor layer are etched, and source-drain electrode layer corresponding to described first area is etched, and exposes the graphene conductor layer that described first area is corresponding;
Step B3, by patterned process, the source-drain electrode layer making second area corresponding forms source electrode and drain electrode respectively;
Step B4, control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of graphene conductor layer corresponding to the described first area that exposes, the graphene conductor layer making described first area corresponding converts class graphene semiconductor layer to, and by class graphene semiconductor layer corresponding for first area, as the semiconductor active layer formed.
In concrete enforcement, the execution sequence of step B3 and step B4 can be put upside down, that is, first perform step B4, then perform step B3.
In enforcement, due to when forming semiconductor active layer and the source electrode be positioned on semiconductor active layer and drain electrode, the embodiment of the present invention only adopts a photoetching process, decreases a photoetching process, thus improves production efficiency.
Preferably, in step bl is determined., form source-drain electrode layer, comprising:
By sputtering or the method for thermal evaporation, graphene layer forms source-drain electrode layer.
In concrete enforcement, in the execution mode of source-drain electrode layer and prior art, the execution mode of source-drain electrode layer is similar.
Preferably, the thickness of source-drain electrode layer is
Preferably, the material of source-drain electrode layer comprises Cr(chromium), W(tungsten), Ti(titanium), Ta(tantalum), Mo(molybdenum), Al(aluminium) and Cu(copper) metal or alloy in one.
Preferably, source-drain electrode layer can be individual layer, also can be multilayer.
Preferably, in step B2, pass through patterned process, source-drain electrode layer corresponding to the 3rd region and graphene conductor layer are etched, and source-drain electrode layer corresponding to described first area is etched, and exposes the graphene conductor layer that described first area is corresponding, comprising:
Last layer photoresist is coated with on source-drain electrode layer surface, and by gray tone or half-tone mask plate exposure imaging, complete exposure area, partial light permeability region and complete light tight region is formed on source-drain electrode layer surface, wherein complete light tight region corresponds to described second area, partial light permeability region corresponds to described first area, and complete exposure area corresponds to described 3rd region;
Etch away source-drain electrode layer corresponding to complete exposure area and graphene conductor layer;
By photoetching cineration technics, get rid of the photoresist in partial light permeability region, and the source-drain electrode layer of etch away sections transmission region, expose the graphene conductor layer under it.
Preferably, in step B4, when the graphene conductor controlling particle corresponding to the substitute element graphene conductor layer corresponding with the described first area exposed contacts, particle corresponding to substitute element will be corresponding with the described first area exposed the graphene conductor of graphene conductor layer react, thus realize controlling atom corresponding to substitute element and replace part carbon atom in the graphene conductor of graphene conductor layer corresponding to the described first area that exposes.
Preferably, the mode that any graphene conductor that can realize controlling particle corresponding to the substitute element graphene conductor layer corresponding with the first area exposed contacts all is applicable to the embodiment of the present invention, such as, substitute corresponding for substitute element is input to ion implantor, to make ion implantor particle corresponding for the substitute element obtained by substitute is injected in the graphene conductor of graphene conductor layer corresponding to the first area that exposes; Or under plasma conditions, the graphene conductor controlling substitute corresponding to the substitute element graphene conductor layer corresponding with first area contacts, to obtain particle corresponding to substitute element, thus the graphene conductor realizing controlling particle corresponding to the substitute element graphene conductor layer corresponding with the first area exposed contacts.
Preferably, in step B4, particle corresponding to substitute element can be any microcosmic particle corresponding to substitute element, that is, the kind of the particle that substitute element is corresponding can be various, and such as, the kind of the particle that substitute element is corresponding is atom, electronics and ion etc.
In enforcement, particle corresponding to the substitute element contacted with graphene conductor can react with graphene conductor, the atom making substitute element corresponding replaces the part carbon atom in graphene conductor, and form stable valence link with the residual carbon atom in graphene conductor, thus the conduction band of the graphene conductor making original conduction band and valence band overlap and valence band are separately, and produce certain band gap, reduce the conductance of graphene conductor, Graphene is made to become the semi-conducting material (that is, class graphene semiconductor) of class Graphene from conductor material.
Three, be introduced to the second execution mode forming semiconductor active layer, source electrode and drain electrode simultaneously below.
Preferably, the step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Step C1, formation graphene conductor layer, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
Step C2, control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of the graphene conductor layer of described first area, the graphene conductor layer of described first area is made to convert class graphene semiconductor layer to, and by the class graphene semiconductor layer of first area, as the semiconductor active layer formed;
In concrete enforcement, atom corresponding to the control substitute element in step C2 replaces the execution mode of the part carbon atom in the graphene conductor of the graphene conductor layer of described first area, similar with the execution mode controlling atom corresponding to substitute element in the step B4 of the embodiment of the present invention and replace the part carbon atom in the graphene conductor of graphene conductor layer corresponding to the described first area that exposes, do not repeat them here.
Step C3, by patterned process, the graphene conductor layer in described 3rd region is etched, and the graphene conductor layer of described second area form source electrode and drain electrode respectively.
In enforcement, because source electrode and drain electrode are made by graphene conductor, thus can improve the conductance of source electrode and drain electrode, stability, transparency and pliability; Due to source electrode, drain electrode and described semiconductor active layer are arranged on same layer, thus can the thickness of thinning TFT, and thinningly can comprise the array base palte of the TFT of the embodiment of the present invention and the thickness of display unit; In addition, due to when forming semiconductor active layer, source electrode and drain electrode, the embodiment of the present invention only adopts a photoetching process, decreases a photoetching process, thus improves production efficiency.
It should be noted that, the execution mode of other retes except semiconductor active layer, source electrode and drain electrode that embodiment of the present invention formation TFT comprises can be similar with execution mode of the prior art, do not repeat them here.
Below in conjunction with the manufacture method of the TFT of the embodiment of the present invention, to make the array base palte of the pixel cell comprised in embodiment one, the manufacture method of the array base palte of the embodiment of the present invention is introduced.
Embodiment two
It should be noted that, the structure chart mentioned in the embodiment of the present invention two is the middle A-B of Fig. 4 (that is, the planar structure schematic diagram of the pixel cell in embodiment one) to profile.
As shown in Figure 5, the manufacture method of the array base palte of the embodiment of the present invention, comprising:
Step 501, as shown in Figure 6A, underlay substrate 0 forms grid 1 and grid line;
In concrete enforcement, when making TFT, in step 501, underlay substrate forms grid.
In concrete enforcement, the execution mode forming gate electrode and grid line in the execution mode that underlay substrate is formed gate electrode and grid line of the embodiment of the present invention and prior art on underlay substrate is similar.
Preferably, underlay substrate is formed gate electrode and grid line, comprising:
Adopt the method for sputtering or thermal evaporation, underlay substrate deposits grid metal level;
By etching grid metal level, underlay substrate forms gate electrode and grid line.
In concrete enforcement, in the execution mode of the underlay substrate of the embodiment of the present invention and prior art, the execution mode of underlay substrate is similar, and preferably, underlay substrate is transparent glass substrate or quartz.
In concrete enforcement, in the execution mode of the grid metal level of the embodiment of the present invention and prior art, the execution mode of grid metal level is similar.
Preferably, the thickness range of grid metal level is
Preferably, the material of grid metal level comprises the one in the metal or alloy of Cr, W, Ti, Ta, Mo, Al and Cu.
Preferably, grid metal level can be one or more layers.
Step 502, as shown in Figure 6B, underlay substrate 0 forms the gate insulation layer 2 of cover gate 1 and grid line;
In concrete enforcement, when making TFT, in step 502, gate insulation layer 2 cover gate 1.
In concrete enforcement, the execution mode forming the gate insulation layer of covering grid electrode and grid line in the execution mode that underlay substrate is formed the gate insulation layer of covering grid electrode and grid line of the embodiment of the present invention and prior art on underlay substrate is similar.
Preferably, underlay substrate is formed the gate insulation layer of covering grid electrode and grid line, comprising:
By PECVD(plasmaenhancedchemicalvapordeposition, plasma enhanced chemical vapor deposition) method, underlay substrate is formed the gate insulation layer of covering grid electrode and grid line.
In concrete enforcement, in the execution mode of the gate insulation layer of the embodiment of the present invention and prior art, the execution mode of gate insulation layer is similar.
Preferably, the thickness range of gate insulation layer is
Preferably, the reacting gas that gate insulation layer is corresponding can be SiH
4(silane), NH
3(ammonia) and N
2mist, or be SiH
2cl
2(dichlorosilane), NH
3and N
2mist, the material of gate insulation layer comprises the one in oxide, nitride and oxynitrides.
Step 503, as shown in Figure 6 C, deposited graphite alkene conductor layer 3 and source-drain electrode layer 4 successively, and the region being coated with graphene conductor layer 3 and source-drain electrode layer 4 is divided into first area corresponding to described semiconductor active layer along horizontal direction, the second area that source electrode, drain electrode and data wire are corresponding, and the 3rd region except first area and second area;
In concrete enforcement, when making TFT, in step 503, second area is the second area that source electrode and drain electrode are corresponding.
Step 504, as shown in Figure 6 D, last layer photoresist 5 is coated with on source-drain electrode layer 4 surface, and by gray tone or half-tone mask plate exposure imaging, complete exposure area, partial light permeability region and complete light tight region is formed on source-drain electrode layer 4 surface, wherein complete light tight region corresponds to described second area, partial light permeability region corresponds to described first area, and complete exposure area corresponds to described 3rd region;
Step 505, as illustrated in fig. 6e, etch away source-drain electrode layer 4 corresponding to complete exposure area and graphene conductor layer 3;
Step 506, as fig 6 f illustrates, by photoetching cineration technics, get rid of the photoresist 5 in partial light permeability region;
Step 507, as shown in Figure 6 G, the source-drain electrode layer 4 of etch away sections transmission region, exposes the graphene conductor layer 3 under it;
Step 508, under plasma conditions, the graphene conductor surface of the graphene conductor layer corresponding in the first area exposed passes into N
2, to obtain N
2plasma, realizes control N
2the graphene conductor of the graphene conductor layer that plasma is corresponding with the first area exposed contacts;
It should be noted that, the embodiment of the present invention is for N with substitute corresponding to substitute element
2, and by passing into N under plasma conditions
2realize control N
2plasma contacts the introduction carried out for example with the graphene conductor exposed, substitute corresponding to substitute element is other objects, or other execution modes realizing controlling execution mode that particle corresponding to substitute element contact with the graphene conductor exposed and the embodiment of the present invention are similar.
Step 509, as shown in figure 6h, the N2 plasma that the described graphene conductor corresponding with the first area exposed contacts and graphene conductor are reacted, N replaces part C and forms C-N key, the conduction band of the described graphene conductor of the first area that original conduction band and valence band are overlapped and valence band are separately, produce certain band gap, conductance also reduces, thus defines class graphene semiconductor 6A, and by class graphene semiconductor layer 6A corresponding for first area, as the semiconductor active layer 6A formed;
In concrete enforcement, in step 509, that corresponding with first area semiconductor active layer 6A is arranged with layer is the graphene conductor layer 6B that second area is corresponding.
Step 510, as shown in fig. 6i, the source-drain electrode layer 4 corresponding to second area etches, and forms source electrode 7, drain electrode 8 and data wire;
In concrete enforcement, when making TFT, in step 510, after the source-drain electrode layer 4 corresponding to second area etches, form source electrode 7 and drain electrode 8.
Preferably, when making TFT, 511 ~ step 513 can not be comprised the steps.
Step 511, as shown in fig. 6i, forms the passivation layer 9 covering source electrode 7, drain electrode 8 and data wire;
In concrete enforcement, it is similar that the formation of the embodiment of the present invention covers the execution mode forming the passivation layer covering source electrode, drain electrode and data wire in the execution mode of the passivation layer of source electrode, drain electrode and data wire and prior art.
Preferably, form the passivation layer covering source electrode, drain electrode and data wire, comprising:
By PECVD method, form the passivation layer covering source electrode, drain electrode and data wire.
In concrete enforcement, in the execution mode of the passivation layer of the embodiment of the present invention and prior art, the execution mode of passivation layer is similar.
Preferably, the thickness range of passivation layer is
Preferably, the reacting gas that passivation layer is corresponding can be SiH
4, NH
3and N
2mist, or be SiH
2cl
2, NH
3and N
2mist, the material of passivation layer comprises the one in oxide, nitride or oxynitrides.
Preferably, passivation layer can be one deck, also can be multilayer.
Step 512, as shown in fig. 6i, etch away the passivation layer 9 of drain electrode 8 correspondence position, to form the via hole 10 exposing drain electrode 8;
Step 513, as shown in Fig. 6 J, passivation layer 9 is formed and carries out by via hole 10 and drain electrode 8 pixel electrode 11 that is electrically connected.
In concrete enforcement, the execution mode forming pixel electrode in the execution mode forming pixel electrode over the passivation layer of the embodiment of the present invention and prior art is over the passivation layer similar.
Preferably, by sputtering or thermal evaporation method, over the passivation layer deposit transparent conductive layer;
Transparency conducting layer is etched, is carried out the pixel electrode be electrically connected in pixel region formation by via hole and drain electrode.
In concrete enforcement, in the execution mode of the transparency conducting layer of the embodiment of the present invention and prior art, the execution mode of transparency conducting layer is similar.
Preferably, the thickness range of transparency conducting layer is
Preferably, the material of transparency conducting layer comprises one or more in tin indium oxide, indium zinc oxide and aluminum zinc oxide.
Although describe the preferred embodiments of the present invention, those skilled in the art once obtain the basic creative concept of cicada, then can make other change and amendment to these embodiments.So claims are intended to be interpreted as comprising preferred embodiment and falling into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (6)
1. a thin-film transistor, comprises semiconductor active layer, it is characterized in that,
Described semiconductor active layer is made by class graphene semiconductor, and wherein, described class graphene semiconductor is the product replaced the part carbon atom in graphene conductor by the atom that substitute element is corresponding after;
Wherein, substitute element is at least one element in the lanthanide series of the periodic table of elements;
The grid of described thin-film transistor is made by graphene conductor.
2. thin-film transistor as claimed in claim 1, it is characterized in that, source electrode, drain electrode and described semiconductor active layer are arranged with layer.
3. an array base palte, is characterized in that, comprises thin-film transistor as claimed in claim 1 or 2.
4. array base palte as claimed in claim 3, is characterized in that, at least one in many grid lines of described array base palte and data wire is made by graphene conductor.
5. a display unit, is characterized in that, comprises the array base palte as described in claim 3 or 4.
6. a manufacture method for thin-film transistor as claimed in claim 1 or 2, is characterized in that, the method comprises the step forming semiconductor active layer:
Control the part carbon atom in the graphene conductor of atom replacement graphene conductor layer corresponding to substitute element, make graphene conductor layer convert class graphene semiconductor layer to;
According to the class graphene semiconductor layer converted to, form semiconductor active layer;
Wherein, described substitute element is at least one element in the lanthanide series of the periodic table of elements;
The step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Form graphene conductor layer and source-drain electrode layer successively, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer and source-drain electrode layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
By patterned process, source-drain electrode layer corresponding to the 3rd region and graphene conductor layer are etched, and source-drain electrode layer corresponding to described first area is etched, and exposes the graphene conductor layer that described first area is corresponding;
By patterned process, the source-drain electrode layer making second area corresponding forms source electrode and drain electrode respectively;
Control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of graphene conductor layer corresponding to the described first area that exposes, the graphene conductor layer making described first area corresponding converts class graphene semiconductor layer to, and by class graphene semiconductor layer corresponding for first area, as the semiconductor active layer formed;
Described source-drain electrode layer is multilayer; Or
The step of described formation semiconductor active layer also comprises formation source electrode and drain electrode simultaneously, is specially:
Form graphene conductor layer, and be the first area that described semiconductor active layer is corresponding by the Region dividing being coated with graphene conductor layer, described source electrode and second area corresponding to drain electrode, and the 3rd region except first area and second area;
Control atom corresponding to substitute element and replace part carbon atom in the graphene conductor of the graphene conductor layer of described first area, the graphene conductor layer of described first area is made to convert class graphene semiconductor layer to, and by the class graphene semiconductor layer of first area, as the semiconductor active layer formed;
By patterned process, the graphene conductor layer in described 3rd region is etched, and the graphene conductor layer of described second area form source electrode and drain electrode respectively.
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| CN103681697B (en) * | 2013-12-27 | 2015-12-30 | 京东方科技集团股份有限公司 | Array base palte and display unit |
| CN103715267A (en) * | 2013-12-30 | 2014-04-09 | 京东方科技集团股份有限公司 | TFT, TFT array substrate, manufacturing method of TFT array substrate and display device |
| CN104576758A (en) * | 2015-01-22 | 2015-04-29 | 合肥京东方光电科技有限公司 | Thin film transistor, array substrate, manufacturing method for thin film transistor and manufacturing method for array substrate |
| CN104867970A (en) * | 2015-05-21 | 2015-08-26 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate, display device and manufacturing method of the array substrate |
| CN106847744B (en) * | 2017-02-20 | 2020-10-02 | 合肥京东方光电科技有限公司 | Preparation method of array substrate, array substrate and display device |
| CN106960797A (en) * | 2017-04-28 | 2017-07-18 | 京东方科技集团股份有限公司 | A kind of preparation method of thin film transistor (TFT) and preparation method thereof and array base palte |
| CN108206182A (en) * | 2017-12-28 | 2018-06-26 | 深圳市华星光电半导体显示技术有限公司 | Array substrate and its manufacturing method |
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