CN103457589B - A kind of light integrates solid-state relay - Google Patents
A kind of light integrates solid-state relay Download PDFInfo
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- CN103457589B CN103457589B CN201310322340.1A CN201310322340A CN103457589B CN 103457589 B CN103457589 B CN 103457589B CN 201310322340 A CN201310322340 A CN 201310322340A CN 103457589 B CN103457589 B CN 103457589B
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- output end
- power semiconductor
- end power
- integrated
- photovoltaic cell
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Abstract
The invention discloses a kind of integrated level is higher, the preferable light of reliability integrates solid-state relay.The light integrates solid-state relay, including the control circuit being integrated on same substrate and output end power semiconductor, also include photovoltaic cell arrays, the photovoltaic cell arrays are integrated in the drift region on output end power semiconductor surface, and the photovoltaic cell arrays are formed by the series connection of several photovoltaic cells.The photovoltaic cell arrays of the integrated solid-state relay of the light are integrated in the drift region on output end power semiconductor surface, therefore, photovoltaic cell arrays need not take the area of substrate domain, reduce the surface area of substrate, the integrated level of chip can be greatly improved, and photovoltaic cell arrays, control circuit and output end power semiconductor are integrated on same substrate by the present invention, the solid-state relay of integrated power device reduces difficulty and the ghost effect of encapsulation, the reliability of relay is effectively improved, is adapted in electric and electronic technical field popularization and application.
Description
Technical field
The present invention relates to electric and electronic technical field, and in particular to a kind of light integrates solid-state relay.
Background technology
Solid-state relay（Solid State Relay, abridge SSR）, it is by microelectronic circuit, discrete electronic device (is opened
Close the semiconductor elements such as triode, bidirectional triode thyristor), the noncontacting switch of power electronic power device composition.Solid-state relay
It is a kind of four-terminal device, two inputs, two output ends, inputs termination control signal, output end and load and power sources in series,
Isolating for control terminal and load end is realized with isolating device.The small control signal of the input of solid-state relay, reaches
Large current load is directly driven, without mechanical contact component in switching process, therefore solid-state relay is removed and had and electromagnetism relay
It is also compatible with logic circuit outside the same function of device, resistance to mechanical resistant impact of shaking, the unconfined advantage of installation site.Solid-state after
Electrical equipment is widely used to computer external interface equipment, constant temperature system, temperature adjustment, electric furnace heating control, motor control etc. at present
Occasion.
At present, most of solid-state relay is all that the chip of input, control circuit and output end is carried out into difference respectively
Degree is integrated, and multiple chips are encapsulated jointly, although this preparation method provides conveniently in the selection of function,
But the encapsulation of multiple chips adds the difficulty of making, its cost also significantly increases.Further, since the non-monolithic of modules
It is integrated to add ghost effect, reduce the reliability of whole element.
Publication number CN102970019A describes a kind of PhotoMOS relay, and its general principle is：One control device is connected
It is connected between photovoltaic diode array and the grid for exporting metal-oxide-semiconductor field effect t, so that control device exports in photovoltaic
When be in high-impedance state, photovoltaic export disappear when be in low resistive state, so as to charging current caused by photovoltaic diode array
Flow to output end, the grid of metal-oxide-semiconductor field effect t.All components mentioned in patent are using the side of V-groove isolation
Method, realizes single-chip integration, realizes the control function of solid-state relay well, and similar patent also includes：United States Patent (USP)
Numbers 5151602, U.S. Patent number 5278422 and publication number CN1728553A etc., it is all that above-mentioned patent, which also has a common ground,
It is using V-groove isolation method that photovoltaic diode array and control circuit single-chip integration, the output port of control circuit is outer again
The grid source of monolithic power MOS elements is connect, most the various pieces of relay are encapsulated jointly at last, and this packaged type is not only
The difficulty of encapsulation can be increased, simultaneously because muitichip package ghost effect is bigger, reduce the reliability of whole relay, and
The output end of some solid-state relays employs lateral power, because the drift region length of lateral power is larger, and
Effect is used only to bear pressure-resistant, adds the area of whole chip, have impact on the integrated level of whole chip.In addition, at these
The battery of photovoltaic two described in patent is mostly made using monocrystalline Silicon photrouics, and its manufacture difficulty and cost are higher.
The content of the invention
The technical problems to be solved by the invention be to provide a kind of integrated level is higher, the preferable light of reliability integrate solid after
Electrical equipment.
Technical scheme is used by the present invention solves above-mentioned technical problem：The light integrates solid-state relay, including integrated
In the control circuit on same substrate and output end power semiconductor, in addition to photovoltaic cell arrays, the photovoltaic cell arrays
Convert optical signals into electric signal and electric signal is supplied to control circuit, the control circuit controls according to the electric signal of input
The switch of output end power semiconductor；The control circuit by several triodes, several diodes and several
Impedor combines, and each triode, each diode and each impedor are separately in a V-type of substrate
In groove；The output end power semiconductor is separately in the V-groove of substrate；The photovoltaic cell arrays are integrated in output end
The drift region on power semiconductor surface, the photovoltaic cell arrays are formed by the series connection of several photovoltaic cells.
It is further that the photovoltaic cell is polysilicon photovoltaic cells.
It is further that the drift region on the output end power semiconductor surface is provided with N-type polycrystalline silicon matrix,
An oxygen layer is provided between N-type polycrystalline silicon matrix and output end power semiconductor, is passed through on the surface of N-type polycrystalline silicon matrix
Double diffusion technique forms P+ areas and N+ areas, and it is described more that Bing P+ areas set anode electrode, N+ areas to set cathode electrode to be formed
Crystal silicon photovoltaic battery.
It is further that the polysilicon photovoltaic cells surface is provided with anti-reflecting layer.
It is further that the output end power semiconductor is lateral double diffusion metal oxide semiconductor field-effect
Transistor or landscape insulation bar double-pole-type transistor.
Beneficial effects of the present invention：The photovoltaic cell arrays that the light integrates solid-state relay are integrated in output end power semiconductor
The drift region of device surface, therefore, photovoltaic cell arrays need not take the area of substrate domain, reduce the surface area of substrate,
The integrated level of chip can be greatly improved, and it is of the invention by photovoltaic cell arrays, control circuit and output end power semiconductor device
Part is integrated on same substrate, and the solid-state relay of integrated power device reduces difficulty and the ghost effect of encapsulation, effectively
Improve the reliability of relay.
Brief description of the drawings
Fig. 1 is the domain schematic diagram that light of the present invention integrates solid-state relay；
Fig. 2 is the substrat structure schematic diagram of output end power semiconductor part of the present invention；
Fig. 3 to Fig. 6 is the technical process in the drift region integrated photovoltaic array on output end power semiconductor surface
Figure；
Description of symbols in figure：Substrate 1, V-groove 101, photovoltaic cell arrays 2, control circuit 3, output end power semiconductor device
Part 4, N-type polycrystalline silicon matrix 5, field oxygen layer 6, P+ areas 7, N+ areas 8, anode electrode 9, cathode electrode 10, anti-reflecting layer 11.
Embodiment
The embodiment of the present invention is further described below in conjunction with the accompanying drawings.
As shown in Figure 1, 2, the light integrates solid-state relay, including the control circuit 3 being integrated on same substrate 1 and output
Hold power semiconductor 4, in addition to photovoltaic cell arrays 2, the photovoltaic cell arrays 2 convert optical signals into electric signal and by electricity
Signal is supplied to control circuit 3, and the control circuit 3 is according to the electric signal control output end power semiconductor 4 of input
Switch；The control circuit 3 is combined by several triodes, several diodes and several impedors, each
Triode, each diode and each impedor are separately in a V-groove 101 of substrate 1；The output end work(
Rate semiconductor devices 4 is separately in the V-groove 101 of substrate 1；The photovoltaic cell arrays 2 are integrated in output end power semiconductor
The drift region on the surface of device 4, the photovoltaic cell arrays 2 are formed by the series connection of several photovoltaic cells.The photoelectricity of the solid-state relay
Pond array 2 is integrated in the drift region on the surface of output end power semiconductor 4, and therefore, photovoltaic cell arrays 2 need not take substrate
The area of 1 domain, the surface area of substrate 1 is reduced, improve the integrated level of chip, and it is of the invention by photovoltaic cell arrays 2, control
Circuit 3 and output end power semiconductor 4 are integrated on same substrate 1, and the solid-state relay of integrated power device reduces
The difficulty of encapsulation and ghost effect, it is effectively improved the reliability of relay.
In said structure, the photovoltaic cell can use existing various photovoltaic cells, as preferably：
The photovoltaic cell is polysilicon photovoltaic cells, and polysilicon photovoltaic cells are easy to process, and manufacturing cost is low, can be lowered significantly whole
The cost of solid-state relay.
For convenience in the drift region integrated photovoltaic array 2 on the surface of output end power semiconductor 4, the output end
The drift region on the surface of power semiconductor 4 is provided with N-type polycrystalline silicon matrix 5, in N-type polycrystalline silicon matrix 5 and output end power
An oxygen layer 6 is provided between semiconductor devices 4, the surface of N-type polycrystalline silicon matrix 5 by double diffusion technique formed P+ areas 7 with
And N+ areas 8, Bing P+ areas 7 set anode electrode 9, N+ areas 8 to set cathode electrode 10 to form described polysilicon photovoltaic cells.For
Raising luminous power, the polysilicon photovoltaic cells surface are provided with anti-reflecting layer 11.
Specifically, the surface of output end power semiconductor 4 drift region integrated photovoltaic array 2 technical process such as
Under：First, in the thermally grown layer of silicon dioxide in drift region on the surface of output end power semiconductor 4, oxygen layer 6 on the spot, such as Fig. 3
It is shown；Then, the surface of oxygen layer 6 on the scene needs the region for making photovoltaic cell to deposit one layer of N-type polycrystalline silicon formation N-type polycrystalline silicon base
Body 5, as shown in Figure 4；Followed by mask N-type polycrystalline silicon matrix 5 surface carry out P+ diffusions, formed P+ areas 7 with
And N+ areas 8, as shown in Figure 5；Finally, carry out PECVD one layer of anti-reflection film of plating in device surface and form described anti-reflecting layer 11, and
Anode electrode 9, N+ areas 8 is set to set cathode electrode 10 to form described polysilicon photovoltaic cells in P+ areas 7, as shown in Figure 6.
In order to control faint voltage or analog signal, the output end power semiconductor 4 is laterally double
Diffused MOS field-effect answers transistor or landscape insulation bar double-pole-type transistor, meanwhile, lateral double diffused metal
Oxide semiconductor field effect transistor and landscape insulation bar double-pole-type transistor have the drift region of larger area, are easy to photoelectricity
Pond array 2 integrates.
Claims (3)
1. a kind of light integrates solid-state relay, it is characterised in that：Including the control circuit (3) that is integrated on same substrate (1) and
Output end power semiconductor (4), in addition to photovoltaic cell arrays (2), the photovoltaic cell arrays (2) convert optical signals into electricity
Electric signal is simultaneously supplied to control circuit (3) by signal, and the control circuit (3) is according to the electric signal control output end power of input
The switch of semiconductor devices (4)；The control circuit (3) is by several triodes, several diodes and several impedances
Element combines, and each triode, each diode and each impedor are separately in a V-type of substrate (1)
In groove (101)；The output end power semiconductor (4) is separately in the V-groove (101) of substrate (1)；The photocell
Array (2) is integrated in the drift region on output end power semiconductor (4) surface, and the photovoltaic cell arrays (2) are by several light
Volt battery is in series, and the photovoltaic cell is polysilicon photovoltaic cells, output end power semiconductor (4) surface
Drift region is provided with N-type polycrystalline silicon matrix (5), between N-type polycrystalline silicon matrix (5) and output end power semiconductor (4)
An oxygen layer (6) is provided with, P+ areas (7) and N+ areas (8) are formed by double diffusion technique on the surface of N-type polycrystalline silicon matrix (5),
Bing P+ areas (7) set anode electrode (9), N+ areas (8) to set cathode electrode (10) to form described polysilicon photovoltaic cells.
2. light as claimed in claim 1 integrates solid-state relay, it is characterised in that：The polysilicon photovoltaic cells surface is set
There is anti-reflecting layer (11).
3. the light according to any one claim in claim 1 to 2 integrates solid-state relay, it is characterised in that：Institute
It is cross bimoment or landscape insulation bar to state output end power semiconductor (4)
Bipolar transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310322340.1A CN103457589B (en) | 2013-07-29 | 2013-07-29 | A kind of light integrates solid-state relay |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310322340.1A CN103457589B (en) | 2013-07-29 | 2013-07-29 | A kind of light integrates solid-state relay |
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| Publication Number | Publication Date |
|---|---|
| CN103457589A CN103457589A (en) | 2013-12-18 |
| CN103457589B true CN103457589B (en) | 2017-12-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112071869B (en) * | 2020-08-28 | 2022-09-30 | 深圳市奥伦德元器件有限公司 | Photovoltaic driver for solid-state relay and preparation method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7495498B2 (en) * | 2004-10-12 | 2009-02-24 | Summer Steven E | Radiation tolerant solid-state relay |
| CN101645401A (en) * | 2009-09-10 | 2010-02-10 | 清华大学 | Circuit device three-dimensional integrative method |
| CN202332915U (en) * | 2011-11-29 | 2012-07-11 | 浙江晶科能源有限公司 | Reflection board applied to solar assembly |
| CN102970019A (en) * | 2012-12-11 | 2013-03-13 | 电子科技大学 | Solid relay of single chip integrated power semiconductor device |
-
2013
- 2013-07-29 CN CN201310322340.1A patent/CN103457589B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7495498B2 (en) * | 2004-10-12 | 2009-02-24 | Summer Steven E | Radiation tolerant solid-state relay |
| CN101645401A (en) * | 2009-09-10 | 2010-02-10 | 清华大学 | Circuit device three-dimensional integrative method |
| CN202332915U (en) * | 2011-11-29 | 2012-07-11 | 浙江晶科能源有限公司 | Reflection board applied to solar assembly |
| CN102970019A (en) * | 2012-12-11 | 2013-03-13 | 电子科技大学 | Solid relay of single chip integrated power semiconductor device |
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