CN103412849A - NoC (network on chip) resource network interface of ARM processing unit and drive method of NoC resource network interface - Google Patents
NoC (network on chip) resource network interface of ARM processing unit and drive method of NoC resource network interface Download PDFInfo
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Abstract
The invention relates to a NoC (network on chip) resource network interface of ARM processing unit and a drive method of the NoC resource network interface. The NoC resource network interface of the ARM processing unit (ARM-RNI) is characterized in that an AHB bus interface processing module and transmitting and receiving modules built in an FPGA are connected directly with an AHB bus of the ARM processing unit through a data bus; ARM is provided with a Linux system and a device driver of the FPGA; the ARM-RNI is connected with a route node. The drive method includes: after initializing, mapping a physical address of an input/output buffer of the transmitting and receiving modules to an ARM kernel; transmitting data sent by the ARM to a local route node through the ARM-RNI transmitting module; transmitting the data forwarded by the network-on-chip to the ARM through the ARM-RNI receiving module. The NoC resource network interface and the drive method thereof have the advantages that stable high-speed data communication between the ARM and the FPGA is achieved, fewer FPGA resources are used, the NoC can be expanded in application by the powerful ARM, and the NoC is higher in expansion capacity and network communication capacity.
Description
Technical field
The present invention relates to communication technical field between the network-on-chip IP kernel, be specially a kind of NoC resource network interface and driving method thereof of arm processor.
Background technology
Development along with semiconductor process techniques, can integrated increasing IP kernel on one single chip, due to the equipment on bus when communication to the exclusivity of bus and unified bus to the requirement of synchronous clock, make the method for designing of SOC (system on a chip) (System-on-a-Chip) not meet design requirement.Network-on-chip (NoC, Networks on Chip) proposition is from thoroughly having solved the problem that bus structure are brought on architecture, NoC uses for reference the communication thought of packet switch in computer network, and computer networking technology is transplanted in chip design, realizes a large amount of IP kernel interconnection.NoC adopts Global Asynchronous, local synchronization technology (GALS), supports parallel communications, has good extendability.
NoC is comprised of chip-on communication meshed network and a plurality of resource nodes that are attached thereto, and the chip-on communication meshed network comprises routing node and the resource network interface (Resource – Network – Interface, RNI) of communication connection.Resource node completes sensu lato calculation task, and resource node can be embedded microprocessor and DSP core, reconfigurable device, storer, input-output device etc., and resource node is connected in network-on-chip by the resource network interface.The resource network interface is the interface between resource node and routing node, is the bridge communicated between the two.
Arm processor has abundant Peripheral Interface, real-time, can stably move the (SuSE) Linux OS of being transplanted in chip, support multitasking, the arm processor of usining can greatly be expanded NoC system applies space as the resource node of NoC chip multi-core system.
But have not yet to see the report that is exclusively used in the NoC resource network interface that connects arm processor.
Summary of the invention
The NoC resource network interface and the driving method thereof that the purpose of this invention is to provide a kind of arm processor, realize high speed, the transmitting of arm processor and other IP kernel data of NoC system.
The NoC resource network interface of the open arm processor of the present invention, described network-on-chip NoC is based on the abbreviation of the English Field Programmable of FPGA(Gate Array, be field programmable gate array) chip, intrasystem some routing nodes interconnect, system architecture is 2 dimension grid (2D-Mesh) topological structures of rule, routing node in NoC adopts the worm hole data exchange mechanism based on the Virtual Channel technology, realizes by deadlock-free determinacy XY dimension routing algorithm.Resource node is embedded microprocessor, DSP core, reconfigurable device, storer, input-output device etc., and resource node is connected with the routing node of NoC by the resource network interface.Arm processor is as the resource node of NoC, and the NoC resource network interface that the present invention designs arm processor connects certain routing node of this arm processor and NoC.The NoC resource network interface that the present invention designs arm processor comprises ahb bus interface processing module, sending module and the receiver module built in FPGA, ahb bus interface processing module matches with arm processor ahb bus sequential, through data bus, directly with the ahb bus of arm processor, be connected, FPGA becomes an external memory storage of arm processor.In arm processor, transplant built-in Linux operating system, and under (SuSE) Linux OS, designed the device driver of FPGA.The data bus that this resource network interface is connected with arm processor mainly contains the data line of 16 bit wides, and address wire and control signal wire.This resource network interface is connected with a routing node of network-on-chip, and handshake line and transmission, reception data line are arranged between the two.Sending module comprises the abbreviation of FIFO(first in first out, i.e. first in first out) input data buffer, organize bag device and controller.The controller of sending module receives the data that arm processor sends, and group bag device carries out corresponding packing to data to be processed, then that data are temporary in the input data buffer, then sends into the routing node connected; Receiver module comprises FIFO output data buffer and transponder.The output state of receiver module receives and keeps in the data that the local direction of routing node sends over, and passes to arm processor, and transponder gives corresponding response according to the output state store status to the data transfer request of route node.FIFO input data buffer and FIFO output data buffer are asynchronous input, the output buffer of this resource network interface.
FIFO input data buffer and FIFO output data buffer storage depth are set to 8, and width is set to 34.
The driving method key step of the NoC resource network interface of arm processor of the present invention is as follows:
I, initialization
Start the device driver of the FPGA under the arm processor (SuSE) Linux OS, each module of the resource network interface in initialization FPGA, registration FPGA resource network interfacing equipment;
II, address mapping
The physical address map of the output buffer of the input buffer of sending module in the resource network interface and receiver module is arrived to the arm processor kernel spacing;
The input buffer of the sending module of constructing in FPGA and the output buffer of receiver module are assigned with address separately, in the FPGA installation driving, these two addresses are mapped to the kernel spacing of arm processor, by these two addresses, read the data in network-on-chip or transmit data to network-on-chip in driver.
III, transmit and receive data
When the local routing node connected to the resource network interface as the arm processor of resource node sends data, write operation program in the linux system call driver of arm processor, arm processor sends data to the resource network interface, the output buffer of sending module receives the data that arm processor sends, the data that receive when output buffer reach its threshold value, the group bag device of sending module is packed data, controller sends the transmission data request signal to local routing node, after receiving the replying of local routing node, the data that sending module will be organized bag send to local routing node, the data that arm processor sends enter network-on-chip.
While as the arm processor of resource node, receiving the network-on-chip data that local routing node that this resource network interface connects transmits, the transponder of receiver module obtains the data transfer request signal of local routing node, give local routing node and permit the answer signal transmitted, the input buffer of receiver module receives the network-on-chip data that local router sends, the data that receive when input buffer reach its threshold value, to the arm processor resource node, send readout data signal, the arm processor resource node reads the arm processor kernel spacing by the read data program that read operates process by the data in input buffer, copy data to again the user's space of arm processor.Arm processor unpacks, receives other resource node of network-on-chip and sends data.
As swap data between the arm processor of resource node and network-on-chip, be the asynchronous clock field communication, this driving method realizes that by asynchronous input buffer and asynchronous output buffer data are synchronous.During exchanges data, the clock that the prime module is provided, as writing clock, is used the fundamental clock of rear class module to produce read signal, completes the data transmission.
This resource network interface is connected with the ahb bus of arm processor through data bus, if the data bus of this resource network interface directly connects the data bus of the memory controller of arm processor, will take for a long time the data bus of arm processor, cause the CPU of arm processor to move.This driving method designs the controller judgement arm processor read data state in this resource network interface receiver module, if the arm processor read data is effective, the data bus of this resource network interface and arm processor is connected, if the arm processor read data is non-effective, the data bus port this resource network interface is connected with arm processor is arranged to high-impedance state, and the two is no longer connected.
For fear of when network-on-chip does not send data to arm processor, the linux system of arm processor does not stop its cpu resource of inquiry waste, and this driving method has the interrupt handling routine of blocking operation.After the linux system of arm processor called the read operation program, transponder detected the memory state of input buffer, and the data of input buffer stores do not reach threshold value, and arm processor will be read process and be placed in dormant state.When the data of the input buffer stores of receiver module in the resource network interface reach threshold value, transponder sends the transmit data request signal to arm processor, transponder sends the read data request signal to arm processor, after arm processor obtains this signal, call interrupt handling routine, wake the write operation process of dormancy up, the data of the input buffer stores of receiver module in the resource network interface are read in the arm processor kernel spacing, then copy data to the user's space of arm processor.
Compared with prior art, the NoC resource network interface of arm processor of the present invention and the advantage of driving method thereof are: 1, be applicable to arm processor and with the NoC system, be connected and carry out the data exchange, make the NoC system can move a plurality of processors, the NoC system processing multiple task ability that realizes unique multinuclear design is strong, can meet the requirement of modern industry measurement and control area to real-time, complicacy, accuracy etc.; 2, as the data transmission between other resource node in resource node arm processor and NoC system, make the NoC system can utilize the characteristics such as arm processor is powerful, expand the application of NoC, strengthen extended capability and the network communications capability of NoC system; 3, the asynchronous FIFO inputoutput buffer is realized the exchange between the asynchronous data territory, compares with the asynchronous exchange of data mode of dual port RAM, has reduced the use of FPGA port resource; 4, the resource network interface under (SuSE) Linux OS and driving method thereof are high-speed data communication interface and the driving methods between arm processor and fpga chip, have realized stable data communication between the high-end chip of two classes.
The accompanying drawing explanation
Fig. 1 is the NoC resource network interface embodiment of this arm processor communication construction of the network-on-chip based on FPGA structural model figure used;
Fig. 2 is the NoC resource network interface embodiment of this arm processor as the hardware connection diagram of the Local direction routing node of the resource network interface of the arm processor of resource node, this arm processor and network-on-chip;
Fig. 3 is the NoC resource network interface embodiment inner structure schematic diagram of this arm processor.
Embodiment
Network-on-chip NoC in the NoC resource network interface embodiment of this arm processor is based on fpga chip, its communication construction of network-on-chip based on FPGA structural model figure as shown in Figure 1, intrasystem some routing node R interconnect, system architecture is 3 * 32 dimension grid (2D-Mesh) topological structures of rule, routing node R in NoC adopts the worm hole data exchange mechanism based on the Virtual Channel technology, realizes by deadlock-free determinacy XY dimension routing algorithm.In figure, S means the resource node of general IP kernel, and RNI means general resource network interface (Resource Network Interface), and resource node S is connected with the routing node R of NoC by resource network interface RNI.ARM means the arm processor as resource node, and ARM-RNI means the NoC resource network interface of the arm processor of the present embodiment.The NoC resource network interface ARM-RNI of arm processor connects as the arm processor of NoC resource node and the routing node R of NoC.
Arm processor connects as shown in Figure 2 as the hardware of the local direction routing node of the resource network interface ARM-RNI of the resource node of network-on-chip NoC, this arm processor and network-on-chip.
The NoC resource network interface ARM-RNI embodiment of this arm processor as shown in Figure 3, comprise the ahb bus interface processing module, sending module and the receiver module that build in FPGA, with hardware description language Verilog, construct the modules of the resource network interface of arm processor in FPGA.Ahb bus interface processing module matches with arm processor ahb bus sequential, directly with the ahb bus of arm processor, is connected through data bus, and FPGA becomes an external memory storage of arm processor.In arm processor, transplanted built-in Linux operating system, and the device driver of FPGA under (SuSE) Linux OS has been arranged.
As shown in Figures 2 and 3, the data bus that this resource network interface ARM-RNI is connected with arm processor mainly contains the data line D of 16 bit wides, and the address wire ADDR of arm processor, what control signal wire had an arm processor writes enable signal line nWE, arm processor read enable signal line nOE, the chip selection signal line nGCS5 of the storer of arm processor, routing node allows with effect signal wire PORT_AV, Input Data Buffer is write enable signal line write_en_in, output data buffer is read enable signal line read_en_in, the reception data request signal line receive_req that ARM-RNI sends to arm processor.This resource network interface is connected with a routing node of network-on-chip, and between the two, oriented local direction routing node sends data line SD, receives data line RD from local direction routing node, also has the handshake line, comprise routing node write clock signal line wclk, to local direction routing node request for data transmitted signal line req_to_local, the acknowledge signal line grant_from_local that local direction routing node sends, what mail to local direction routing node writes enable signal line write_to_local, the read clock signal line rclk of routing node, the transmission data application signal wire req_from_local of local direction routing node, acknowledge signal line grant_to_local to local direction routing node, the resource network interface sent by local direction routing node write enable signal write_from_local.
Sending module comprises FIFO input data buffer, group bag device and controller.The controller of sending module receives the data that arm processor sends, and group bag device carries out corresponding packing to data to be processed, then that data are temporary in the input data buffer, then sends into the routing node connected; Receiver module comprises FIFO output data buffer and transponder.The output state of receiver module receives and keeps in the data that the local direction of routing node sends over, and extracts useful data and passes to arm processor, and transponder gives corresponding response according to the output state store status to the data transfer request of route node.FIFO input data buffer and FIFO output data buffer are asynchronous input, the output buffer of this resource network interface.
This routine FIFO input data buffer and FIFO output data buffer storage depth are set to 8, and width is set to 34.
The driving method key step of the NoC resource network interface of arm processor of the present invention is as follows:
I, initialization
Start the device driver of the FPGA under the arm processor (SuSE) Linux OS, initialization FPGA, registration FPGA equipment;
II, address mapping
The physical address map of the output buffer of the input buffer of sending module in the resource network interface and receiver module is arrived to arm processor kernel Virtual Space;
The input buffer of the sending module of constructing in FPGA and the output buffer of receiver module are assigned with address separately, in the FPGA installation driving, these two addresses are mapped to the kernel spacing of arm processor, by these two addresses, read the data in network-on-chip or transmit data to network-on-chip in driver.
III, transmit and receive data
Arm processor is as follows to the flow process that NoC sends data: when the local routing node connected to the resource network interface as the arm processor of resource node sends data, write operation program in the linux system call driver of arm processor, arm processor sends data to the resource network interface, the output buffer of sending module receives the data that arm processor sends, the data that receive when output buffer reach its threshold value, the group bag device of sending module is packed data, controller sends the transmission data request signal to local routing node, after receiving the replying of local routing node, the data that sending module will be organized bag send to local routing node, the data that arm processor sends enter network-on-chip.
Arm processor receives that from NoC, to send the flow process of data as follows: while as the arm processor of resource node, receiving the network-on-chip data that local routing node that this resource network interface connects transmits, application program system calls the read operation program, transponder detects the memory state of input buffer, the data of input buffer stores do not reach threshold value, and arm processor will be read process and be placed in dormant state.The transponder of receiver module obtains the data transfer request signal of local routing node, give local routing node and permit the answer signal transmitted, the input buffer of receiver module receives the network-on-chip data that local router sends, the data that receive when input buffer reach its threshold value, transponder sends the read data request signal to arm processor, after arm processor obtains this signal, call interrupt handling routine, wake the write operation process of dormancy up, its read data program reads the arm processor kernel spacing by the data in input buffer, copy data to again the user's space of arm processor.Arm processor has received other resource node of network-on-chip and has sent data.
As swap data between the arm processor of resource node and network-on-chip, be the asynchronous clock field communication, this driving method realizes that by asynchronous input buffer and asynchronous output buffer data are synchronous.During exchanges data, the clock that the prime module is provided, as writing clock, is used the fundamental clock of rear class module to produce read signal, completes the data transmission.
This resource network interface is connected with the ahb bus of arm processor through data bus, controller judgement arm processor read data state in this resource network interface receiver module of this routine driving method, if the arm processor read data is effective, the data bus of this resource network interface and arm processor is connected, if the arm processor read data is non-effective, the data bus port this resource network interface is connected with arm processor is arranged to high-impedance state, and the two is no longer connected.
Above-described embodiment, be only the specific case that purpose of the present invention, technical scheme and beneficial effect are further described, and the present invention not is defined in this.All any modifications of making, be equal to replacement, improvement etc., within all being included in protection scope of the present invention within scope of disclosure of the present invention.
Claims (7)
1.ARM the NoC resource network interface of processor, described network-on-chip NoC is based on fpga chip, intrasystem some routing nodes interconnect, system architecture is 2 dimension mesh topology of rule, routing node in NoC adopts the worm hole data exchange mechanism based on the Virtual Channel technology, realizes by deadlock-free determinacy XY dimension routing algorithm; Resource node is connected with the routing node of NoC by the resource network interface; It is characterized in that:
Arm processor is as the resource node of NoC, and the NoC resource network interface of described arm processor connects certain routing node of this arm processor and NoC; The NoC resource network interface of arm processor comprises ahb bus interface processing module, sending module and the receiver module built in FPGA, ahb bus interface processing module matches with arm processor ahb bus sequential, through data bus, directly with the ahb bus of arm processor, be connected, FPGA becomes an external memory storage of arm processor; In arm processor, transplanted built-in Linux operating system, and the device driver of FPGA under (SuSE) Linux OS has been arranged; The data bus that this resource network interface is connected with arm processor mainly contains the data line of 16 bit wides, and address wire and control signal wire; This resource network interface is connected with a routing node of network-on-chip, and handshake line and transmission, reception data line are arranged between the two;
Sending module comprises FIFO input data buffer, group bag device and controller, the controller of sending module receives the data that arm processor sends, group bag device carries out corresponding packing to data to be processed, then that data are temporary in the input data buffer, then sends into the routing node connected;
Receiver module comprises FIFO output data buffer and transponder, the output state of receiver module receives and keeps in the data that the local direction of routing node sends over, pass to arm processor, transponder gives corresponding response according to the output state store status to the data transfer request of route node;
FIFO input data buffer and FIFO output data buffer are asynchronous input, the output buffer of this resource network interface.
2. the NoC resource network interface of arm processor according to claim 1 is characterized in that:
Described FIFO input data buffer and FIFO output data buffer storage depth are set to 8, and width is set to 34.
3. the driving method of the NoC resource network interface of arm processor according to claim 1 and 2 is characterized in that key step is as follows:
I, initialization
Start the device driver of the FPGA under the arm processor (SuSE) Linux OS, each module of the resource network interface in initialization FPGA, registration FPGA resource network interfacing equipment;
II, address mapping
The physical address map of the output buffer of the input buffer of sending module in the resource network interface and receiver module is arrived to the arm processor kernel spacing;
III, transmit and receive data
When the local routing node connected to the resource network interface as the arm processor of resource node sends data, write operation program in the linux system call driver of arm processor, arm processor sends data to the resource network interface, the output buffer of sending module receives the data that arm processor sends, the data that receive when output buffer reach its threshold value, the group bag device of sending module is packed data, controller sends the transmission data request signal to local routing node, after receiving the replying of local routing node, the data that sending module will be organized bag send to local routing node, the data that arm processor sends enter network-on-chip,
While as the arm processor of resource node, receiving the network-on-chip data that local routing node that this resource network interface connects transmits, application program system calls the read operation program, transponder detects the memory state of input buffer, the data of input buffer stores do not reach threshold value, and arm processor will be read process and be placed in dormant state, the transponder of receiver module obtains the data transfer request signal of local routing node, give local routing node and permit the answer signal transmitted, the input buffer of receiver module receives the network-on-chip data that local router sends, the data that receive when input buffer reach its threshold value, transponder sends the read data request signal to arm processor, after arm processor obtains this signal, call interrupt handling routine, wake the write operation process of dormancy up, its read data program reads the arm processor kernel spacing by the data in input buffer, copy data to again the user's space of arm processor.
4. the driving method of the NoC resource network interface of arm processor according to claim 3 is characterized in that:
In described step II, the input buffer of the sending module of constructing in FPGA and the output buffer of receiver module are assigned with address separately, in the FPGA installation driving, these two addresses are mapped to the kernel spacing of arm processor, by these two addresses, read the data in network-on-chip or transmit data to network-on-chip in driver.
5. the driving method of the NoC resource network interface of arm processor according to claim 3 is characterized in that:
In described step III, be the asynchronous clock field communication as swap data between the arm processor of resource node and network-on-chip, this driving method realizes that by asynchronous input buffer and asynchronous output buffer data are synchronous; During exchanges data, the clock that the prime module is provided, as writing clock, is used the fundamental clock of rear class module to produce read signal, completes the data transmission.
6. the driving method of the NoC resource network interface of arm processor according to claim 3 is characterized in that:
In described step III, controller judgement arm processor read data state in described resource network interface receiver module, if the arm processor read data is effective, the data bus of this resource network interface and arm processor is connected, if the arm processor read data is non-effective, the data bus port this resource network interface is connected with arm processor is arranged to high-impedance state, and the two is no longer connected.
7. the driving method of the NoC resource network interface of arm processor according to claim 3 is characterized in that:
In described step III, this driving method has the interrupt handling routine of blocking operation, after the linux system of arm processor calls the write operation program, transponder detects the memory state of input buffer, the data of input buffer stores do not reach threshold value, receiver module is to the arm processor transmitted signal, and the interrupt handling routine of arm processor makes the write operation process from the operation queue of arm processor scheduler, removing temporarily, is placed in dormant state; When the data of the input buffer stores of receiver module in the resource network interface reach threshold value, transponder sends the transmit data request signal to arm processor, transponder sends the read data request signal to arm processor, after arm processor obtains this signal, call interrupt handling routine, wake the write operation process of dormancy up, the data of the input buffer stores of receiver module in the resource network interface are read in the arm processor kernel spacing, then copy data to the user's space of arm processor.
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Application publication date: 20131127 |