CN103365336A - Calibration method and device for system clock of USB equipment - Google Patents

Abstract

The invention discloses a calibration method and device for a system clock of USB equipment. The method comprises the following steps: taking the system clock of the USB equipment as a clock source of a USB equipment timer in counting function after performing frequency division to the system clock of the USB equipment through utilizing the counting function and capturing function of the USB equipment timer, and taking a low-velocity clock of the USB equipment as a trigger source of the USB equipment timer in capturing function; capturing the jump edge of the trigger source, and obtaining the actual count value of the system clock of a corresponding capturing interval; calibrating the frequency of the system clock of the USB equipment as per the obtained actual count value, a preset theoretic count value and an acceptable error range. According to the invention, the calibration method and device have the benefit that the frequency of the system clock can be calibrated in time when the USB equipment system clock has deviation in frequency, so that the USB equipment can be normally used; further, the cost of the USB equipment is reduced as only an HSI crystal oscillator is adopted by the USB equipment.

Description

The calibration steps of USB device system clock and device

Technical field

The present invention relates to the USB technology, relate in particular to a kind of calibration steps and device of USB device system clock.

Background technology

USB(Universal Serial Bus, USB (universal serial bus)) the engine clock of equipment derives from the system clock frequency division, system clock derives from HSE(High speed external clock signal, the high speed external timing signal) or HSI(High speed internal clock signal, high-speed internal clock signal).The system clock that USB device utilizes the HSE crystal oscillator to produce does not need to calibrate, but this scheme need to be set up the HSE crystal oscillator, increased PCB(Printed Circuit Board in the USB device, printed circuit board (PCB)) dimensional space, also increased simultaneously the cost of USB device; For the USB device of directly using the HSI crystal oscillator, at normal temperatures, this USB device can work, but under rugged surroundings, because the HSI crystal oscillator of USB device is subject to the impact of environment temperature, therefore will cause the system clock deviation of USB device to surpass the admissible error range of usb protocol, yet, the scheme of at present not the system clock of the USB device that produces relatively large deviation effectively being calibrated, thus cause the larger USB device of system clock deviation normally not use.

Summary of the invention

The fundamental purpose of the embodiment of the invention provides a kind of calibration steps and device of USB device system clock, when deviation appears in the system clock frequency that is intended to USB device, this system clock frequency is calibrated.

The embodiment of the invention discloses a kind of calibration steps of USB device system clock, may further comprise the steps:

Utilize tally function and the capture function of USB device timer, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

The hopping edge of continuous capturing trigger source obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area;

According to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

According to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, calibrate described system clock.

Preferably, the low-speed clock of described USB device comprises: GPIO clock, LSI or LSE;

Described low-speed clock with described USB device comprises as the trigger source of described USB device timer capture function: with described low-speed clock directly as described trigger source;

Perhaps,

With described low-speed clock trigger source as described USB device timer capture function behind the second default divide ratio frequency division.

Preferably, the hopping edge of described continuous capturing trigger source obtains respectively the count value of described timer, and according to the count value of described timer, the count value V that obtains between capture area comprises:

The hopping edge of twice trigger source of continuous capturing obtains respectively the count value V of described timer ₁And V ₂, calculate the timer count value V that obtains ₂And V ₁The vector difference, as the count value V between capture area;

Perhaps,

The hopping edge of N+1 trigger source of continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3;

Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, with the mean value of described vector difference as the count value V between capture area.

Preferably, described according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, also comprise after calibrating described system clock:

System clock frequency scope corresponding to error range that system clock frequency and the described system clock of the USB device after the calibration allowed compares;

When the system clock frequency of the USB device after the calibration does not still satisfy described system clock frequency scope, continue the system clock of the described USB device of calibration.

Preferably, the calibration steps of described USB device system clock also comprises:

When the calibration number of times reaches default calibration number of times, if the system clock frequency of USB device does not still satisfy described system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

Preferably, described according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, also comprise after calibrating described system clock:

According to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency.

The embodiment of the invention also discloses a kind of calibrating installation of USB device system clock, comprising:

The clock setting module, utilize tally function and the capture function of USB device timer, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

The numerical value acquisition module for the hopping edge of continuous capturing trigger source, obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area; According to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

The clock alignment module is used for calibrating described system clock according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows.

Preferably, the low-speed clock of described USB device comprises: GPIO clock, LSI or LSE;

Described clock setting module also is used for:

With described low-speed clock directly as described trigger source; Perhaps,

With described low-speed clock trigger source as described USB device timer capture function behind the second default divide ratio frequency division.

Preferably, described numerical value acquisition module also is used for:

The hopping edge of twice trigger source of continuous capturing obtains respectively the count value V of described timer ₁And V ₂, calculate the timer count value V that obtains ₂And V ₁The vector difference, as the count value V between capture area;

Perhaps,

The hopping edge of N+1 trigger source of continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3;

Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, with the mean value of described vector difference as the count value V between capture area.

Preferably, described clock alignment module also is used for:

System clock frequency scope corresponding to error range that system clock frequency and the described system clock of the USB device after the calibration allowed compares;

When the system clock frequency of the USB device after the calibration does not still satisfy described system clock frequency scope, continue the system clock of the described USB device of calibration.

Preferably, described clock alignment module also is used for:

When the calibration number of times reaches default calibration number of times, if the system clock frequency of USB device does not still satisfy described system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

Preferably, described clock alignment module also is used for:

According to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency.

Tally function and the capture function of the embodiment of the invention by utilizing the USB device timer, with behind the system clock frequency division of USB device as the clock source of described USB device timer tally function, with the low-speed clock of the described USB device trigger source as described USB device timer capture function; Catch the hopping edge of trigger source, obtain the system clock actual count value between corresponding capture area; According to the actual count value of obtaining, default theoretical count value and the error range that allows, the method of the system clock frequency of calibration USB device, have when deviation appears in the system clock frequency of USB device, the beneficial effect of in time this system clock frequency being calibrated, and then USB device can normally be used; Further, because this USB device is only used the HSI crystal oscillator, therefore, reduced the cost of USB device.

Description of drawings

Fig. 1 is the calibration steps first embodiment schematic flow sheet of USB device system clock of the present invention;

Fig. 2 is the calibration steps second embodiment schematic flow sheet of USB device system clock of the present invention;

Fig. 3 is the calibrating installation one embodiment high-level schematic functional block diagram of USB device system clock of the present invention.

The realization of embodiment of the invention purpose, functional characteristics and advantage are described further with reference to accompanying drawing in connection with embodiment.

Embodiment

Further specify technical scheme of the present invention below in conjunction with Figure of description and specific embodiment.Should be appreciated that specific embodiment described herein only in order to explain the present invention, is not intended to limit the present invention.

USB Key in the USB device is as example, and USB Key is a kind of hardware device of USB interface, belongs to from equipment, carries out data interaction by USB interface and PC.The built-in single-chip microcomputer of USB Key or intelligent card chip have certain storage space, can store user's private key and digital certificate, utilize the built-in public key algorithm realization of USB Key to the authentication of user identity.The usb bus interface is to realize that by the chip with the USB module generally, USB hardware engine module clock is 48Mhz, and this USB hardware engine clock jitter allowed band is positive and negative 0.25%.When this USB hardware engine clock jitter surpasses this scope, will cause USB interface communication unstable, even mistake occur, cause USB Key cisco unity malfunction.

The clock of USB hardware engine derives from single-chip system clock PLL(Phase Locked Loop, phaselocked loop) after the frequency multiplication, carrying out frequency division is 48Mhz again.In order to save cost and circuit board space, the single-chip microcomputer in the USB device adopts HSI sheet internal clock as the clock source of system clock, and these HSI sheet internal clock characteristics are that precision is low, easily influenced by ambient temperature.Therefore must carry out suitable calibration to the HSI clock, otherwise when variation of ambient temperature is violent, HSI will produce larger drift, cause USB engine clock source deviation excessive, thereby make USB Key cisco unity malfunction.The calibrating principle of embodiment of the invention USB device system clock is by timer capture function and tally function, with behind the system clock frequency division of USB device as the clock source of described USB device timer tally function, with behind the low speed external clock frequency division of described USB device as the trigger source of described USB device timer capture function; Catch the hopping edge of trigger source, obtain the system clock actual count value between corresponding capture area, according to the actual count value of obtaining, default theoretical count value and the error range that allows, find out the optimal offset of current system clock, clock source is compensated, reach the effect of stablizing USB hardware engine clock source.This scheme is mainly used in USB Key relevant device, contains simultaneously other based on the usb terminal master-slave equipment of usb bus data communication.

With reference to Fig. 1, Fig. 1 is the calibration steps first embodiment schematic flow sheet of USB device system clock of the present invention; As shown in Figure 1, the calibration steps of USB device system clock of the present invention may further comprise the steps:

Step S01, the tally function of utilizing the USB device timer and capture function, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

USB device is according to preset time period, and whether the detection system clock has exceeded the maximum deviation scope that the USB device normal operation allows.In the present embodiment, preset time period can arrange according to the residing actual environment of USB device, also can arrange according to actual needs, such as, it is 10 seconds that this sense cycle is set under Normal Environmental Temperature, and under rugged surroundings, it is 1 second that this sense cycle is set; Present embodiment is not done restriction to the concrete time span of preset time period.

When detecting, utilize the tally function of USB device timer and capture function that the system clock of USB device is calibrated.With the system clock of the USB device clock source as USB device timer tally function after the first default divide ratio carries out frequency division; With the low-speed clock of the USB device trigger source as USB device timer capture function.

The low-speed clock of described USB device comprises: GPIO clock, LSI or LSE; In the present embodiment, with the LSE(Low Speed External clock signal of USB device, low speed external clock) after the second default divide ratio carries out frequency division as the trigger source of USB device timer capture function.According to the residing actual environment of described USB device and concrete condition, the described first default divide ratio and the second default divide ratio can be the same or different.Present embodiment is not done restriction to the concrete span of the described first default divide ratio and the second default divide ratio.

In a preferred embodiment, also can be directly with the low speed external clock of the described USB device of the frequency division not trigger source as described USB device timer capture function.

The hopping edge of step S02, continuous capturing trigger source obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area.

USB device utilizes the capture function of timer by the hopping edge of twice trigger source of continuous capturing, obtains respectively corresponding timer count value V1 and V2, calculates the vector difference twice again, obtains the count value V between capture area; At this moment, if V2 greater than V1, then the value of V is the difference of V2 and V1; If V2, represents then that timer carries out counting to get again V2 after count value overflows less than V1, then this moment V value be (0xffff – V1+V2+1).

Step S03, according to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

Step S04, according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, calibrate described system clock.

According to the count value V between the first default divide ratio and capture area, obtaining the actual count value T_CNT of USB device system clock between described capture area is the product that count value V and first presets divide ratio.According to the theoretical count value S_CNT of the described system clock that calculates actual count value T_CNT and preset and the error range that described system clock allows, calibrate described system clock.

In a preferred embodiment, in order to obtain more accurately timer actual count value T_CNT, USB device is obtained the actual count value T_CNT of timer internal can also be in the following way:

The hopping edge of N+1 trigger source of continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3; Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, obtain the mean value of timer count value

Mean value according to the timer count value of obtaining With the first default divide ratio, obtain the actual count value T_CNT of USB device system clock.

In a preferred embodiment, the system clock frequency scope that the system clock frequency after USB device will be calibrated is corresponding with the error range that described system clock allows compares; When the system clock frequency of the USB device after the calibration did not still satisfy the said system reference clock frequency, repeating said steps S02 to S04 continued to calibrate the system clock of described USB device.

In a preferred embodiment, when if USB device reaches default calibration number of times at the calibration number of times, its system clock frequency is still outside default system clock frequency scope, then stop to continue calibration, with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

The below will describe again with concrete use scenes the implementation process of the calibration steps of present embodiment USB device system clock.

USB device adopts timer tally function and capture function that system clock is calibrated, the tally function clock source of timer derives from system clock SYSCLK, through AHB/APB frequency division (SOC (system on a chip) clock division) and timer frequency division, enable 0 ~ 0xffff cycle count.The SYSCLK clock is through AHB/APB and timer frequency division, and its divide ratio is respectively PRE1 and PRE2, and then timer tally function clock source TIMERCLK value is:

TIMERCLK?=?SYSCLK/(PRE1*PRE2)；

The trigger source of USB device timer capture function can be GPIO(General Purpose Input Output, universal input/output) or LSI or LSE, select the RTC clock source of LSE as the trigger source of capture function herein; LSE is carried out frequency division according to the second default divide ratio PRE3, obtain more low-frequency signal through behind the frequency division, by the hopping edge of twice trigger source of continuous capturing, obtain respectively corresponding timer count value V1 and V2, calculate again the vector difference twice, obtain the count value V between capture area; At this moment, if V2 greater than V1, then the value of V is the difference of V2 and V1; If V2, represents then that timer carries out counting to get again V2 after count value overflows less than V1, then this moment V value be (0xffff – V1+V2+1).According to the count value V that obtains timer, and the first default divide ratio (PRE1*PRE2), obtain the actual count value of USB device timer.

In a preferred embodiment, in order to obtain more level and smooth and stable data, can add filter function, such as, the hopping edge of N+1 trigger source of continuous capturing obtains respectively N interval corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; At this moment, N the count value that obtains sorted, remove mxm. and minimum, remaining (N-2) individual numerical value is averaged obtains mean value again

In the present embodiment, the value of described N is the integer greater than 3.

At this moment, the system clock SYSCLK actual count value T_CNT that obtains is:

$T\_\mathrm{CNT}=\stackrel{\‾}{V}*\mathrm{PRE}1*\mathrm{PRE}2$

Take RTC clock source RTCCLK as 32.768Khz as example, then the value as the trigger source CAPCLK of capture function is behind the second default divide ratio PRE3 frequency division:

CAPCLK?=RTCCLK?/?PRE3；

In between a capture area, the theoretical count value S_CNT of timer is:

S_CNT?=?32Mhz/CAPCLK；

If the maximum deviation that the USB device system clock allows is X%, then count value upper lower limit value H_CNT and the L_CNT between this capture area is respectively:

H_CNT?=?S_CNT?*(1+?X%)；

L_CNT?=?S_CNT?*(1-?X%)；

Actual count value T_CNT is within the theoretical count value bound that (L_CNT＜T_CNT＜H_CNT), then system clock is within the maximum deviation scope that USB allows between capture area; Otherwise exceed error range, will carry out compensation for calibrating errors to the HSI clock, repeat above-mentioned steps after the compensation again, whether the clock source that calculates after calibrating meets the demands.If reach default calibration number of times (such as 5 times), the system clock frequency of USB device still can not satisfy default system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, USB device is sent the information that calibration makes mistakes simultaneously.

In a preferred embodiment, USB device also can constantly be carried out the system clock calibration according to the actual requirements, until this USB device system clock frequency satisfies default system clock frequency scope.

Tally function and the capture function of present embodiment by utilizing the USB device timer, with behind the system clock frequency division of USB device as the clock source of described USB device timer tally function, with the low-speed clock of the described USB device trigger source as described USB device timer capture function; Catch the hopping edge of trigger source, obtain the system clock actual count value between corresponding capture area; Method according to the actual count value of obtaining, default theoretical count value and the error range that allows, have when deviation appears in the system clock frequency of USB device, the beneficial effect of in time this system clock frequency being calibrated, and then USB device can normally be used; Further, because this USB device is only used the HSI crystal oscillator, therefore, reduced the cost of USB device.

Please refer to Fig. 2, Fig. 2 is the calibration steps second embodiment schematic flow sheet of USB device system clock of the present invention; The difference of present embodiment and the described embodiment of Fig. 1 is, only increased " step S05, according to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency "; Present embodiment only is described specifically step S05, and other related steps of calibration steps of relevant USB device system clock of the present invention please refer to the specific descriptions of related embodiment, do not repeat them here.

As shown in Figure 2, the calibration steps of USB device system clock of the present invention also comprises afterwards at " step S04, according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, calibrate described system clock ":

Step S05, according to the system clock frequency of USB device after the calibration, calibration USB device hardware engine clock frequency.

USB device is calibrated HSI according to the system clock frequency of calibration; And the HSI after the calibration is as benchmark, calibration USB device hardware engine clock frequency.

In the present embodiment, USB device with HSI as clock source, behind the inner frequency multiplication of phase locked loop of USB device, carry out again frequency division, can be modulated into the signal of certain frequency value as system clock SYSCLK, and the signal of another frequency values is as the clock source USBCLK of USB hardware engine; Take the HSI of 16Mhz as example, behind the inner frequency multiplication of phase locked loop of USB device, carry out again frequency division, can be modulated into the signal of 32Mhz as system clock SYSCLK, and the signal of 48Mhz is as the clock source USBCLK of USB hardware engine.SYSCLK and USBCLK all derive from again frequency division of HSI clock source frequency multiplication, and HSI clock jitter value is the deviate of SYSCLK and USBCLK clock.Calculate SYSCLK clock jitter value, can obtain HSI clock jitter value and USBCLK clock jitter value.In like manner, the HSI clock source is carried out clock jitter compensation, can reach SYSCLK and USBCLK compensates, reach the stability of USBCLK.

Present embodiment is by the system clock frequency calibration HSI according to the USB device after the calibration, and the HSI after the calibration is as the method for reference calibration USB device hardware engine clock frequency, beneficial effect with each clock frequency of calibration USB device, further, make the USB interface of USB device can be with more accurately frequency work.

Please refer to Fig. 3, Fig. 3 is the calibrating installation first embodiment high-level schematic functional block diagram of USB device system clock of the present invention; As shown in Figure 3, the calibrating installation of USB device system clock of the present invention comprises: clock setting module 01, numerical value acquisition module 02 and clock alignment module 03.

Clock setting module 01, be used for utilizing tally function and the capture function of USB device timer, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

USB device is according to preset time period, and whether the detection system clock has exceeded the maximum deviation scope that the USB device normal operation allows.In the present embodiment, preset time period can arrange according to the residing actual environment of USB device, also can arrange according to actual needs, such as, it is 10 seconds that this sense cycle is set under Normal Environmental Temperature, and under rugged surroundings, it is 1 second that this sense cycle is set; Present embodiment is not done restriction to the concrete time span of preset time period.

When detecting, USB device utilizes the tally function of timer internal and capture function that the system clock of USB device is calibrated.Clock setting module 01 is with the system clock of the USB device clock source as USB device timer tally function after the first default divide ratio carries out frequency division; With the low-speed clock of the USB device trigger source as USB device timer capture function.

The low-speed clock of described USB device comprises: GPIO clock, LSI or LSE; In the present embodiment, clock setting module 01 is with the LSE of the USB device trigger source as USB device timer capture function after the second default divide ratio carries out frequency division.According to the residing actual environment of described USB device and concrete condition, the described first default divide ratio and the second default divide ratio can be the same or different.Present embodiment is not done restriction to the concrete span of the described first default divide ratio and the second default divide ratio.

In a preferred embodiment, clock setting module 01 also can be directly with the low speed external clock of the described USB device of the frequency division not trigger source as described USB device timer capture function.

Numerical value acquisition module 02 for the hopping edge of continuous capturing trigger source, obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area; According to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

Clock alignment module 03 is used for calibrating described system clock according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows.

Numerical value acquisition module 02 utilizes the capture function of timer by the hopping edge of twice trigger source of continuous capturing, obtains respectively corresponding timer count value V1 and V2, calculates the vector difference twice again, obtains the count value V between capture area; At this moment, if V2 greater than V1, then the value of V is the difference of V2 and V1; If V2, represents then that timer carries out counting to get again V2 after count value overflows less than V1, then this moment V value be (0xffff – V1+V2+1).

Numerical value acquisition module 02 is according to the count value V between the first default divide ratio and capture area, and obtaining the actual count value T_CNT of USB device system clock between described capture area is the product that count value V and first presets divide ratio.Calculate actual count value T_CNT and the theoretical count value S_CNT of the described system clock of presetting and the error range that described system clock allows according to numerical value acquisition module 02, the described system clock of clock alignment module 03 calibration.

In a preferred embodiment, in order to obtain more accurately timer actual count value T_CNT, numerical value acquisition module 02 is with the benchmark of LSE as calibration, and the actual count value T_CNT that obtains the USB device timer can also be in the following way:

The hopping edge of N+1 trigger source of numerical value acquisition module 02 continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3; Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, obtain the mean value of timer count value Mean value according to the timer count value of obtaining

With the described first default divide ratio, obtain the actual count value T_CNT of USB device system clock.

Clock alignment module 03 is according to according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, the system clock of calibration USB device.

In a preferred embodiment, the system clock frequency scope that the system clock frequency after clock alignment module 03 will be calibrated is corresponding with the error range that described system clock allows compares; When the system clock frequency of the USB device after the calibration did not still satisfy the said system reference clock frequency, the corresponding data that utilizes described numerical value acquisition module 02 to obtain continued to calibrate the system clock of described USB device.

In a preferred embodiment, when if USB device reaches default calibration number of times at the calibration number of times, its system clock frequency is still outside default system clock frequency scope, then clock alignment module 03 stops to continue calibration, with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

The below will describe again with concrete use scenes the implementation process of the calibration steps of present embodiment USB device system clock.

Clock alignment module 03 adopts timer tally function and capture function that system clock is calibrated, the tally function clock source of timer derives from system clock SYSCLK, through AHB/APB frequency division (SOC (system on a chip) clock division) and timer frequency division, enable 0 ~ 0xffff cycle count.The SYSCLK clock is through AHB/APB and timer frequency division, and its divide ratio is respectively PRE1 and PRE2, and then timer tally function clock source TIMERCLK value is:

TIMERCLK?=?SYSCLK/(PRE1*PRE2)；

The trigger source of USB device timer capture function can be GPIO(General Purpose Input Output, universal input/output) or LSI or LSE, select the RTC clock source of LSE as the trigger source of capture function herein; Clock setting module 01 is carried out frequency division with LSE according to the second default divide ratio PRE3, obtain more low-frequency signal through behind the frequency division, numerical value acquisition module 02 is by the hopping edge of twice trigger source of continuous capturing, obtain respectively corresponding timer count value V1 and V2, calculate again the vector difference twice, obtain the count value V between capture area; At this moment, if V2 greater than V1, then the V value obtained of numerical value acquisition module 02 is the difference of V2 and V1; If V2, represents then that timer carries out counting to get again V2 after count value overflows less than V1, the V value that then this moment, numerical value acquisition module 02 obtained is (0xffff – V1+V2+1).Clock alignment module 03 is according to the count value V that obtains timer, and the first default divide ratio (PRE1*PRE2), obtains the actual count value of USB device timer.

In a preferred embodiment, in order to obtain more level and smooth and stable data, can add filter function, such as, the hopping edge of N+1 trigger source of numerical value acquisition module 02 continuous capturing obtains respectively N interval corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; At this moment, the 02 pair of N that obtains count value of numerical value acquisition module sorts, and removes mxm. and minimum, remaining (N-2) individual numerical value is averaged obtains mean value again

In the present embodiment, the value of described N is the integer greater than 3.

At this moment, the system clock SYSCLK actual count value T_CNT that obtains of numerical value acquisition module 02 is:

$T\_\mathrm{CNT}=\stackrel{\‾}{V}*\mathrm{PRE}1*\mathrm{PRE}2$

Take RTC clock source RTCCLK as 32.768Khz as example, then the value as the trigger source CAPCLK of capture function is behind the second default divide ratio PRE3 frequency division:

CAPCLK?=RTCCLK?/?PRE3；

In between a capture area, numerical value acquisition module 02 obtains the theoretical count value S_CNT of timer and is:

S_CNT?=?32Mhz/CAPCLK；

If the maximum deviation that the USB device system clock allows is X%, then count value upper lower limit value H_CNT and the L_CNT between this capture area is respectively:

H_CNT?=?S_CNT?*(1+?X%)；

L_CNT?=?S_CNT?*(1-?X%)；

Actual count value T_CNT is within the theoretical count value bound that (L_CNT＜T_CNT＜H_CNT), then system clock is within the maximum deviation scope that USB allows between capture area; Otherwise exceed error range, clock alignment module 03 will be carried out compensation for calibrating errors to the HSI clock, repeat above-mentioned steps after the compensation again, and whether the clock source that calculates after calibrating meets the demands.If reach default calibration number of times (such as 5 times), the system clock frequency of USB device still can not satisfy default system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, clock alignment module 03 is sent the information that calibration makes mistakes simultaneously.

In a preferred embodiment, clock alignment module 03 also can constantly be carried out the system clock calibration according to the actual requirements, until this USB device system clock frequency satisfies default system clock frequency scope.

Tally function and the capture function of present embodiment by utilizing the USB device timer, with behind the system clock frequency division of USB device as the clock source of described USB device timer tally function, with the low-speed clock of the described USB device trigger source as described USB device timer capture function; Catch the hopping edge of trigger source, obtain the system clock actual count value between corresponding capture area; According to the actual count value of obtaining, default theoretical count value and the error range that allows, the system clock frequency of calibration USB device, have when deviation appears in the system clock frequency of USB device, the beneficial effect of in time this system clock frequency being calibrated, and then USB device can normally be used; Further, because this USB device is only used the HSI crystal oscillator, therefore, reduced the cost of USB device.

Based on the specific descriptions of the described embodiment of Fig. 3, please referring again to Fig. 3.As shown in Figure 3, in the calibrating installation of USB device system clock of the present invention, clock alignment module 03 also is used for:

According to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency.

Clock alignment module 03 is calibrated HSI according to the system clock frequency of calibration; And the HSI after the calibration is as benchmark, calibration USB device hardware engine clock frequency.

In the present embodiment, USB device with HSI as clock source, behind the inner frequency multiplication of phase locked loop of USB device, carry out again frequency division, can be modulated into the signal of certain frequency value as system clock SYSCLK, and the signal of another frequency values is as the clock source USBCLK of USB hardware engine; Take the HSI of 16Mhz as example, behind the inner frequency multiplication of phase locked loop of USB device, carry out again frequency division, can be modulated into the signal of 32Mhz as system clock SYSCLK, and the signal of 48Mhz is as the clock source USBCLK of USB hardware engine.SYSCLK and USBCLK all derive from again frequency division of HSI clock source frequency multiplication, and HSI clock jitter value is the deviate of SYSCLK and USBCLK clock.Clock alignment module 03 is calculated SYSCLK clock jitter value, can obtain HSI clock jitter value and USBCLK clock jitter value.In like manner, 03 pair of HSI clock source of clock alignment module carries out clock jitter compensation, can reach SYSCLK and USBCLK compensates, and reaches the stability of USBCLK.

Present embodiment is by the system clock frequency calibration HSI according to the USB device after the calibration, and take the calibration after HSI as reference calibration USB device hardware engine clock frequency, beneficial effect with each clock frequency of calibration USB device, further, make the USB interface of USB device can be with more accurately frequency work.

The above only is the preferred embodiments of the present invention; be not so limit its claim; every equivalent structure or equivalent flow process conversion that utilizes instructions of the present invention and accompanying drawing content to do; directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.

Claims (12)

1. the calibration steps of a USB device system clock is characterized in that, may further comprise the steps:

Utilize tally function and the capture function of USB device timer, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

The hopping edge of continuous capturing trigger source obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area;

According to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

According to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, calibrate described system clock.

2. the method for claim 1 is characterized in that, the low-speed clock of described USB device comprises: GPIO clock, LSI or LSE;

Described low-speed clock with described USB device comprises as the trigger source of described USB device timer capture function: with described low-speed clock directly as described trigger source;

Perhaps,

With described low-speed clock trigger source as described USB device timer capture function behind the second default divide ratio frequency division.

3. the method for claim 1 is characterized in that, the hopping edge of described continuous capturing trigger source obtains respectively the count value of described timer, and according to the count value of described timer, the count value V that obtains between capture area comprises:

The hopping edge of twice trigger source of continuous capturing obtains respectively the count value V of described timer ₁And V ₂, calculate the timer count value V that obtains ₂And V ₁The vector difference, as the count value V between capture area;

Perhaps,

The hopping edge of N+1 trigger source of continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3;

Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, with the mean value of described vector difference as the count value V between capture area.

4. such as claim 1 or 3 described methods, it is characterized in that, described according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, also comprise after calibrating described system clock:

System clock frequency scope corresponding to error range that system clock frequency and the described system clock of the USB device after the calibration allowed compares;

When the system clock frequency of the USB device after the calibration does not still satisfy described system clock frequency scope, continue the system clock of the described USB device of calibration.

5. method as claimed in claim 4 is characterized in that, also comprises:

When the calibration number of times reaches default calibration number of times, if the system clock frequency of USB device does not still satisfy described system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

6. such as claim 1,2,3 or 5 described methods, it is characterized in that, described according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows, also comprise after calibrating described system clock:

According to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency.

7. the calibrating installation of a USB device system clock is characterized in that, comprising:

The clock setting module, utilize tally function and the capture function of USB device timer, with the system clock of the USB device clock source as described USB device timer tally function behind the first default divide ratio frequency division, with the low-speed clock of the described USB device trigger source as described USB device timer capture function;

The numerical value acquisition module for the hopping edge of continuous capturing trigger source, obtains respectively the count value of described timer, according to the count value of described timer, obtains the count value V between capture area; According to the count value V between the described first default divide ratio and capture area, the actual count value T_CNT of the system clock that obtains USB device between described capture area;

The clock alignment module is used for calibrating described system clock according to the theoretical count value S_CNT of described actual count value T_CNT, default described system clock and the error range that described system clock allows.

8. device as claimed in claim 7 is characterized in that, the low-speed clock of described USB device comprises: GPIO clock, LSI or LSE;

Described clock setting module also is used for:

With described low-speed clock directly as described trigger source; Perhaps,

With described low-speed clock trigger source as described USB device timer capture function behind the second default divide ratio frequency division.

9. device as claimed in claim 7 is characterized in that, described numerical value acquisition module also is used for:

The hopping edge of twice trigger source of continuous capturing obtains respectively the count value V of described timer ₁And V ₂, calculate the timer count value V that obtains ₂And V ₁The vector difference, as the count value V between capture area;

Perhaps,

The hopping edge of N+1 trigger source of continuous capturing obtains respectively N+1 corresponding timer count value V ₁To V _N+1, calculate the timer count value V that obtains ₁To V _N+1The vector difference of every adjacent two count values obtains N the vector difference between capture area; Wherein, described N is the integer greater than 3;

Mxm. and the minimum of the N that removal is obtained a described vector difference calculate and obtain the mean value of the vector difference between remaining (N-2) individual capture area, with the mean value of described vector difference as the count value V between capture area.

10. such as claim 7 or 9 described devices, it is characterized in that described clock alignment module also is used for:

System clock frequency scope corresponding to error range that system clock frequency and the described system clock of the USB device after the calibration allowed compares;

When the system clock frequency of the USB device after the calibration does not still satisfy described system clock frequency scope, continue the system clock of the described USB device of calibration.

11. device as claimed in claim 10 is characterized in that, described clock alignment module also is used for:

When the calibration number of times reaches default calibration number of times, if the system clock frequency of USB device does not still satisfy described system clock frequency scope, then with the system clock frequency of the error minimum described system clock frequency after as calibration, send simultaneously the information that calibration makes mistakes.

12., it is characterized in that described clock alignment module also is used for such as claim 7,8,9 or 11 described devices:

According to the system clock frequency of the USB device after the calibration, calibration USB device hardware engine clock frequency.

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