CN103149970A - Clock calibration method and system - Google Patents

Clock calibration method and system Download PDF

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Publication number
CN103149970A
CN103149970A CN2013100910939A CN201310091093A CN103149970A CN 103149970 A CN103149970 A CN 103149970A CN 2013100910939 A CN2013100910939 A CN 2013100910939A CN 201310091093 A CN201310091093 A CN 201310091093A CN 103149970 A CN103149970 A CN 103149970A
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China
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signal
clock
time interval
sof
unit
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CN2013100910939A
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胡向军
蔡秉铨
刘杰
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Zhuhai Jieli Technology Co Ltd
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Zhuhai Jieli Technology Co Ltd
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Priority to CN2013100910939A priority Critical patent/CN103149970A/en
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Abstract

The invention discloses a clock calibration method, which comprises the following steps of: receiving a start-of-frame (SOF) signal of a universal serial bus (USB) host of any personal computer (PC) as a reference clock signal; starting to count synchronously with the received SOF signal, and setting a numerical value of a counting time interval to be the same as that of a time interval of the SOF signal; performing comparison and calculation to obtain a difference value between the actual counting time interval and the time interval of the SOF value; and calibrating a clock according to the difference value. The invention also discloses a clock calibration method-based clock calibration system. An accurate clock of the PC is taken as a reference clock, and any PC is connected to achieve a clock calibration effect; and a user can introduce the SOF signal of the USB host of the PC through a signal detection unit to automatically fulfill the aim of clock calibration, so that a convenient and quick calibration way is provided for clock calibration, and convenience is brought to the user.

Description

The method and system of clock alignment
Technical field
The present invention relates to the clock alignment field, particularly relate to a kind of method and system of clock alignment.
Background technology
Clock can be used for the consistance of synchronous each system and software and hardware in whole system, or an important operational factor, and the mark of system file, the operation of program all need the participation of clock.
General clock uses inner RC oscillator as clock, because the discreteness of resistance and electric capacity in the RC oscillator is very large, therefore, in the single-chip microcomputer that inner RC oscillator is arranged, be provided with the calibration register of OSCCAL by name in its internal RAM, finely tune the oscillation frequency of RC oscillator by implanting different numerical value, thereby clock is calibrated.Because the oscillation frequency of RC oscillator is built-in frequency, the centre frequency of easily using with system produces error, and the while oscillation frequency of RC oscillator is unstable, causes clock relatively accurately not high.And when clock was relatively accurately not high, it is very inconvenient that the user calibrates clock voluntarily.
Summary of the invention
Based on this, be necessary when relatively accurately high for clock, the problem of calibration clock inconvenience, provide a kind of can the automatic calibration clock and keep clock correcting method and the system of degree of precision.
A kind of method of clock alignment comprises step:
Receive the SOF signal of usb host of any PC end as the reference clock signal;
Synchronize with the described SOF signal that receives and begin counting, and it is identical with the time interval numerical value of described SOF signal that time interval of counting is set;
Comparing calculation draws the deviate in the time interval of time interval of counting and described SOF signal;
According to described deviate calibration clock.
In embodiment, a kind of system of clock alignment comprises detecting signal unit, timer, comparing calculation unit and carries out alignment unit therein;
Described timer is connected by the usb host of described detecting signal unit and PC end, the described comparing calculation unit described timer of connection and described detecting signal unit, the described execution alignment unit described comparing calculation of connection unit;
the SOF signal of the usb host of described detecting signal unit reception PC end is as the reference clock signal, and described SOF signal is transferred to described comparing calculation unit, described timer is synchronizeed with the described SOF signal of reception and is begun counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, described timer also transfers to described comparing calculation unit with the time interval of counting, described comparing calculation unit receives the time interval of described SOF signal and described timer counting, and comparing calculation draws the deviate in the time interval of time interval of counting and described SOF signal, described execution alignment unit is according to described deviate calibration clock.
Above-mentioned clock correcting method and system, can receive the SOF signal of usb host of any PC end as the reference clock signal, synchronize with the described SOF signal that receives simultaneously and begin counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, comparing calculation draws the deviate in the time interval with the time interval of described SOF signal of actual counting again, calibrates clock according to described deviate.described clock correcting method is connected with system and is connected by detecting signal unit the SOF signal that pc port receives the usb host of PC end, and with described SOF signal as the reference clock signal, automatically calculate the deviate in the time interval of time interval of counting and described SOF signal, according to the deviate information calibration clock that calculates, take the more accurate clock of PC end as reference clock, connect any PC end and all can reach the effect of clock alignment, the SOF signal that the user introduces the usb host of PC end by detecting signal unit can reach the purpose of calibrating clock voluntarily, for calibration of clock provides the approach of conveniently calibrating, also brought facility to the user.
Description of drawings
Fig. 1 is the method method flow diagram of a kind of embodiment wherein of a kind of clock alignment of figure of the present invention;
Fig. 2 is the method method flow diagram of another kind of embodiment wherein of a kind of clock alignment of figure of the present invention;
Fig. 3 is the system module figure of a kind of embodiment wherein of system of a kind of clock alignment of figure of the present invention;
Fig. 4 is the system module figure of another kind of embodiment wherein of system of a kind of clock alignment of figure of the present invention.
Embodiment
As shown in Figure 1, a kind of method of clock alignment comprises step:
Step S110 receives the SOF signal of usb host of any PC end as the reference clock signal.In the present embodiment, SOF (Start-of-Frame, frame begins bag) signal can be that the usb host of any PC end sends frame with nominal rated speed and begins bag, adopt the PC end comparatively accurately the SOF signal as the reference clock signal of clock alignment, can obtain clock reference signal accurately.In the present embodiment, thereby the client can connect any PC end by detecting signal unit and obtains comparatively easily the SOF signal.In the present embodiment, the SOF signal of the usb host of introducing PC end is as the reference clock signal, and the SOF signal of the usb host of PC end goes for equipment at full speed, also goes for high-speed equipment.
Step S120 is synchronizeed with the described SOF signal that receives and is begun counting, and it is identical with the time interval numerical value of described SOF signal that time interval of counting is set.in the present embodiment, can receive the SOF signal of the usb host of any PC end of identification, the timer of control system is synchronizeed with the described SOF signal of reception and is begun counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, if there is deviation in internal system clock to be calibrated, system arranges the time interval of technology and the time interval numerical value of SOF signal, actually can the life period error, if there is not deviation in internal system clock to be calibrated, or exist deviation not affect client's the system that uses operation, the client can not need to introduce the SOF signal of the usb host of PC end.
Step S130, comparing calculation draw the deviate in the time interval of time interval of actual counting and described SOF signal; In the present embodiment, can according to system, the time interval of technology and the time interval numerical value of SOF signal be set by the comparing calculation unit, the time error that can exist actually calculates the deviate in the time interval of time interval of counting and described SOF signal.
Step S140 is according to described deviate calibration clock.In the present embodiment, carry out alignment unit and can calculate the deviate in the time interval with the time interval of described SOF signal of counting according to the comparing calculation unit, calibrate clock.Execution calibration in this enforcement can be the time interval of regulating timer, can be also to regulate RC oscillator inner parameter according to described deviate, guarantees the accuracy of system clock.
Above-mentioned clock correcting method, can receive the SOF signal of usb host of any PC end as the reference clock signal, synchronize with the described SOF signal that receives simultaneously and begin counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, comparing calculation draws the deviate in the time interval of time interval of counting and described SOF signal again, according to described deviate calibration clock.described clock correcting method can pass through the SOF signal of the usb host of reception PC end, and with described SOF signal as the reference clock signal, automatically calculate the deviate in the time interval of time interval of actual counting and described SOF signal, according to the deviate information calibration clock that calculates, take the more accurate clock of PC end as reference clock, connect any PC end and all can reach the effect of clock alignment, the SOF signal that the user introduces the usb host of PC end by detecting signal unit can reach the purpose of calibrating clock voluntarily, for calibration of clock provides the approach of conveniently calibrating, also brought facility to the user.
Therein in embodiment, the method for described clock alignment, described step according to described deviate calibration clock concrete steps is: adjust frequency multiplication of phase locked loop parametric calibration USB equipment clock at full speed according to described deviate.In this enforcement, clock alignment can adopt adjusts frequency multiplication of phase locked loop parametric calibration USB equipment clock at full speed, system can calculate by the comparing calculation unit deviate in the time interval of time interval of counting and described SOF signal, thereby regulate by described deviate again and adjust the effect that the frequency multiplication of phase locked loop parameter reaches the calibration clock, select the clock system of calibration can be the full speed device systems in this enforcement.
As shown in Figure 2, in embodiment, the SOF signal that the method for described clock alignment, described step receive the usb host of PC end specifically comprises step as the reference clock signal therein:
Step S210, the inner SOF signal that detects of interrupt clock; In this enforcement, the SOF signal of interrupt system clock inside is convenient to introduce the SOF signal of the usb host of exterior PC end.
Step S220, the SOF signal of the usb host of reception PC end; In the present embodiment, can connect the PC end by connecting interface, receive the SOF signal of the usb host of PC end by connecting interface.
Step S230, with the SOF signal of the usb host of described PC end as the reference clock signal.
One more specifically in embodiment therein, the method for described clock alignment, the time interval numerical value of the time interval of described counting and described SOF signal is 1ms.System can arrange according to concrete accuracy requirement different time interval numerical value, in the present embodiment, and the clock accuracy that adopts 1ms namely can obtain relatively to be suitable for.
As shown in Figure 3, in an embodiment therein, a kind of system of clock alignment comprises detecting signal unit 310, timer 320, comparing calculation unit 330 and execution alignment unit 340;
Described timer 320 connects the usb host of PC end by described detecting signal unit 310, described comparing calculation unit 330 connects described timer 320 and described detecting signal units 310, and described execution alignment unit 340 connects described comparing calculation unit 330;
the SOF signal of the usb host of described detecting signal unit 310 reception PC ends is as the reference clock signal, and described SOF signal is transferred to described comparing calculation unit 330, described timer 320 is synchronizeed with the described SOF signal that receives and is begun counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, described timer 320 also transfers to described comparing calculation unit 330 with the time interval of counting, described comparing calculation unit 330 receives the time interval of described SOF signal and described timer 320 countings, and comparing calculation draws the deviate in the time interval of time interval of actual counting and described SOF signal, described execution alignment unit 340 is according to described deviate calibration clock.
Above-mentioned clock alignment system, can receive the SOF signal of usb host of any PC end by detecting signal unit as the reference clock signal, start simultaneously timer synchronize with the described SOF signal of reception begin the counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, drawn again the deviate in the time interval with the time interval of described SOF signal of actual counting by comparing calculation unit comparing calculation, finally calibrate clock by carrying out alignment unit according to described deviate.described clock alignment system can connect the SOF signal that pc port receives the usb host of PC end by detecting signal unit, and with described SOF signal as the reference clock signal, automatically calculate the deviate in the time interval of time interval of counting and described SOF signal, according to the deviate information calibration clock that calculates, take the more accurate clock of PC end as reference clock, connect any PC end and all can reach the effect of clock alignment, the SOF signal that the user introduces the usb host of PC end by detecting signal unit can reach the purpose of calibrating clock voluntarily, for calibration of clock provides the approach of conveniently calibrating, also brought facility to the user.
In conjunction with Fig. 3 and as shown in Figure 4, therein in embodiment, the system of described clock alignment, described execution alignment unit 340 comprises deviate scaling unit 342 and frequency multiplication of phase locked loop parameter regulon 344.Described deviate scaling unit 342 can convert according to the deviate in time interval of the time interval and the described SOF signal of counting and obtain frequency multiplication of phase locked loop adjusting parameter.Thereby described frequency multiplication of phase locked loop parameter regulon 344 can be regulated parameter regulating phase-locked loop frequency multiplication calibration clock according to frequency multiplication of phase locked loop.
In conjunction with Fig. 3 and as shown in Figure 4, therein in embodiment, the system of described clock alignment, described detecting signal unit 310 comprises inner interrupt location 312, signal receiving unit 314 and the reference signal indexing unit 316 of detecting.
Therein in embodiment, the system of described clock alignment, described timer is to be the timer of 1ms in the time interval.
Because other part technical characterictics of system of described clock alignment are identical with said method, do not repeat them here.
The above embodiment has only expressed several embodiment of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to the scope of the claims of the present invention.Should be pointed out that for the person of ordinary skill of the art, without departing from the inventive concept of the premise, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.

Claims (8)

1. the method for a clock alignment, is characterized in that, comprises step:
Receive the SOF signal of usb host of any PC end as the reference clock signal;
Synchronize with the described SOF signal that receives and begin counting, and it is identical with the time interval numerical value of described SOF signal that time interval of counting is set;
Comparing calculation draws the deviate in the time interval of time interval of actual counting and described SOF signal:
According to described deviate calibration clock.
2. the method for clock alignment according to claim 1, is characterized in that, described step according to described deviate calibration clock concrete steps is: adjust frequency multiplication of phase locked loop parametric calibration USB equipment clock at full speed according to described deviate.
3. the method for clock alignment according to claim 1 and 2, is characterized in that, the SOF signal that described step receives the usb host of PC end specifically comprises step as the reference clock signal:
The inner SOF signal that detects of interrupt clock;
Receive the SOF signal of the usb host of PC end;
With the SOF signal of the usb host of described PC end as the reference clock signal.
4. the method for clock alignment according to claim 1 and 2, is characterized in that, the time interval numerical value of the time interval of described counting and described SOF signal is 1ms.
5. the system of a clock alignment, is characterized in that, comprises detecting signal unit, timer, comparing calculation unit and carry out alignment unit;
Described timer is connected by the usb host of described detecting signal unit and PC end, the described comparing calculation unit described timer of connection and described detecting signal unit, the described execution alignment unit described comparing calculation of connection unit;
the SOF signal of the usb host of described detecting signal unit reception PC end is as the reference clock signal, and described SOF signal is transferred to described comparing calculation unit, described timer is synchronizeed with the described SOF signal of reception and is begun counting, and the time interval that counting is set is identical with the time interval numerical value of described SOF signal, described timer also transfers to described comparing calculation unit with the time interval of counting, described comparing calculation unit receives the time interval of described SOF signal and described timer counting, and comparing calculation draws the deviate in the time interval of time interval of actual counting and described SOF signal, described execution alignment unit is according to described deviate calibration clock.
6. the system of clock alignment according to claim 5, is characterized in that, described execution alignment unit comprises deviate scaling unit and frequency multiplication of phase locked loop parameter regulon.
7. the system of according to claim 5 or 6 described clock alignments, is characterized in that, described detecting signal unit comprises inner interrupt location, signal receiving unit and the reference signal indexing unit of detecting.
8. the system of according to claim 5 or 6 described clock alignments, is characterized in that, described timer is to be the timer of 1ms in the time interval.
CN2013100910939A 2013-03-20 2013-03-20 Clock calibration method and system Pending CN103149970A (en)

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Cited By (7)

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CN103714365A (en) * 2013-12-30 2014-04-09 深圳中科讯联科技有限公司 Method for calibrating timer in radio frequency SIM card
CN104901687A (en) * 2015-05-20 2015-09-09 珠海市杰理科技有限公司 Method and system for calibrating clock frequency
CN104977978A (en) * 2015-07-17 2015-10-14 上海无线电设备研究所 Acquiring and processing method for non-synchronizing signals of system clock
CN105790756A (en) * 2016-03-17 2016-07-20 杭州晟元数据安全技术股份有限公司 Method and device for calibrating clock by utilizing UART communication
CN106484155A (en) * 2015-08-25 2017-03-08 原相科技(槟城)有限公司 Navigation system and its clock correcting method
CN112015691A (en) * 2020-08-20 2020-12-01 中国科学院微电子研究所 Clock calibration method and calibration circuit of serial bus equipment and electronic equipment
CN113434449A (en) * 2021-07-15 2021-09-24 兆讯恒达科技股份有限公司 Method and device for calibrating USB chip clock and chip

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CN102331979A (en) * 2011-09-28 2012-01-25 成都市芯锐微电子有限公司 Dynamic clock frequency calibration method applied to universal serial bus (USB) equipment
CN102945061A (en) * 2012-11-19 2013-02-27 四川和芯微电子股份有限公司 Circuit and method for generating USB (universal serial bus) peripheral clock
CN203117837U (en) * 2013-03-20 2013-08-07 珠海市杰理科技有限公司 Clock calibration system

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US7058838B2 (en) * 2002-12-17 2006-06-06 Hewlett-Packard Development Company, L.P. System and method for synchronizing a plurality of processors in a multiprocessor computer platform employing a global clock counter
CN102331979A (en) * 2011-09-28 2012-01-25 成都市芯锐微电子有限公司 Dynamic clock frequency calibration method applied to universal serial bus (USB) equipment
CN102945061A (en) * 2012-11-19 2013-02-27 四川和芯微电子股份有限公司 Circuit and method for generating USB (universal serial bus) peripheral clock
CN203117837U (en) * 2013-03-20 2013-08-07 珠海市杰理科技有限公司 Clock calibration system

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103714365A (en) * 2013-12-30 2014-04-09 深圳中科讯联科技有限公司 Method for calibrating timer in radio frequency SIM card
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CN104901687A (en) * 2015-05-20 2015-09-09 珠海市杰理科技有限公司 Method and system for calibrating clock frequency
CN104901687B (en) * 2015-05-20 2018-04-24 珠海市杰理科技股份有限公司 Clock frequency calibration method and system
CN104977978A (en) * 2015-07-17 2015-10-14 上海无线电设备研究所 Acquiring and processing method for non-synchronizing signals of system clock
CN104977978B (en) * 2015-07-17 2018-04-17 上海无线电设备研究所 A kind of collection and processing method for the asynchronous signal of system clock
CN106484155A (en) * 2015-08-25 2017-03-08 原相科技(槟城)有限公司 Navigation system and its clock correcting method
CN105790756A (en) * 2016-03-17 2016-07-20 杭州晟元数据安全技术股份有限公司 Method and device for calibrating clock by utilizing UART communication
CN105790756B (en) * 2016-03-17 2019-02-12 杭州晟元数据安全技术股份有限公司 A kind of method and device communicating calibration clock using UART
CN112015691A (en) * 2020-08-20 2020-12-01 中国科学院微电子研究所 Clock calibration method and calibration circuit of serial bus equipment and electronic equipment
CN112015691B (en) * 2020-08-20 2022-02-08 中国科学院微电子研究所 Clock calibration method and calibration circuit of serial bus equipment and electronic equipment
CN113434449A (en) * 2021-07-15 2021-09-24 兆讯恒达科技股份有限公司 Method and device for calibrating USB chip clock and chip

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Application publication date: 20130612