CN103347157A - Method and device for real-time input digital image mirroring storage - Google Patents
Method and device for real-time input digital image mirroring storage Download PDFInfo
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Abstract
The invention provides a method and device for real-time input digital image mirroring storage. The method comprises the steps that digital image data are provided, wherein the digital image data comprise a plurality of rows, and each row comprises a plurality of pixel data; every BL pixel data in each row of pixel data are sorted according to inverted order, and the initial address of the BL pixel data is marked as a first address, wherein BL is the burst length of DMA; the BL pixel data which are sorted according to the inverted order are written into a first in first out storage; the BL pixel data which are arranged according to the inverted order are read from the first in first out storage in a DMA mode and stored, the storing initial address is marked as a second address, and the second address and the first address are in a horizontal mirroring relationship. By means of the method and device for real-time input digital image mirroring storage, horizontal mirroring operation can be realized through small cache space.
Description
Technical field
The present invention relates to the video acquisition technical field, relate in particular to a kind of method and device of real-time input digital image mirrored storage.
Background technology
Shown in Fig. 1 a to Fig. 1 d, view data is carried out mirror image operation comprise horizon glass picture and vertical mirror, wherein Fig. 1 a is original image, and Fig. 1 b is horizontal mirror image, and Fig. 1 c is the vertical mirror image, and Fig. 1 d is for doing the image of level and vertical mirror simultaneously.
Say from mathematical description, establish original image and be ORG_IMG (x, y), the width of image is designated as Width, highly is designated as Height, the horizontal mirror image of definition be HOR_MIR_IMG (x, y), the vertical mirror image be VER_MIR_IMG (x, y).The image of doing level and vertical mirror simultaneously be HOR_VER_MIR_IMG (x y), then has:
HOR_MIR_IMG(x,y)=ORG_IMG(Width-x,y)，0=<x<Width,0=<y<Height
VER_MIR_IMG(x,y)=ORG_IMG(x,Height-y)，0=<x<Width,0=<y<Height
HOR_VER_MIR_IMG(x,y)=ORG_IMG(Width-x,Height-y),0=<x<Width,0=<y<Height
Use for video acquisition, the for example realtime image data collection in the video monitoring, need be with the digital picture real-time storage of photo-sensitive cell (as cmos image sensor etc.) output in the memory space of acquisition system, so that processing such as follow-up video coding, intellectual analysis.
Be generally rectangle such as sensor devices shapes such as cmos image sensors, when in system, laying, the situation that level may occur and/or vertically put upside down.After installation is put upside down, in order to obtain normal picture displayed, need carry out level and/or vertical mirror processing to the digital picture of cmos sensor output, thereby be corrected.This mirror image processing process is namely carried out storing external memory space (as SDRAM etc.) into normally in the process of handling in real time before.
The current images transducer is usually with the order output pixel data of line scanning, and as shown in Figure 2, imageing sensor 20 is with the output of lining by line scan of multirow pixel data.For this pixel order, vertical mirror is handled and can be realized by the mode of row address conversion, the capable data integral body of i that is about to input is written to memory space Central Plains corresponding to the position of (Height-1-i) row, and the order of the pixel data of row inside need not to change.
For horizontal mirror image processing, owing to need to adjust the pixel order of delegation inside, need to increase extra buffer usually and keep in, use two kinds of implementations usually: order writes buffer, and inverted order is read; Perhaps inverted order writes buffer, calls over.No matter take above-mentioned which kind of mode, all need being written among the buffer of an entire row of pixels data integrity considered that simultaneously also having data in the sense data process writes, therefore need extra delaying one-row device space carry out ping-pong operation.For high-resolution image, the resolution of 1920x1080 for example, the required ram in slice of two row pixel datas is 3840bytes.
When not considering horizontal mirror image processing, the buffer that is used for real-time input pixel data buffer memory is generally pushup storage (FIFO, First In First Out).Fig. 3 shows the real-time input image data acquisition structure of a kind of FIFO of employing in the prior art, mainly comprises: imageing sensor 31, data write control module 32, FIFO33, data and read control module 34.Because FIFO33 has the characteristic of first in first out, when writing the certain number of pixels data, can start the read operation of pixel data, and needn't wait until that the one-row pixels data all write, thus in this structure employed FIFO33 storage depth can much smaller than two the row image pixels number.
But, the excessive problem of required spatial cache when image data acquiring structure shown in Figure 3 still solve to realize horizontal mirror image processing.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of method and device of real-time input digital image mirrored storage, can realize horizontal mirror image operation with less spatial cache.
For solving the problems of the technologies described above, the invention provides a kind of method of real-time input digital image mirrored storage, comprising:
DID is provided, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas;
Carry out the inverted order ordering for every BL pixel data in each row pixel data, the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length;
Described BL pixel data of inverted order ordering write pushup storage;
Read BL pixel data of this inverted order ordering and store from described pushup storage with dma mode, the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
According to one embodiment of present invention, this first address is Base_addr+BL * i, and wherein Base_addr is the base address of current line, the DMA burst operation numbering of i for current line is carried out, and i is the integer more than or equal to 0; This second address is Base_addr+width-BL * i, and wherein width is the width of each row.
According to one embodiment of present invention, carrying out the inverted order ordering for every BL pixel data in each row pixel data comprises:
With BL pixel data of preceding once input and after BL pixel data once importing alternately write first spatial cache and second spatial cache;
Mode with inverted order is alternately read BL pixel data from this second spatial cache and first spatial cache, wherein, described first spatial cache and second spatial cache read and write ping-pong operation each other.
According to one embodiment of present invention, the degree of depth of described first memory space and second memory space all equals BL.
The present invention also provides a kind of device of real-time input digital image mirrored storage, comprising:
Imageing sensor is used for DID is provided, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas;
Local data's module that reorders is carried out inverted order for every BL pixel data in each row pixel data and is sorted, and the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length;
Pushup storage;
Data write control module, and described BL the pixel data that inverted order is sorted writes pushup storage;
Data are read control module, read BL pixel data of this inverted order ordering and store from described pushup storage with dma mode, and the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
According to one embodiment of present invention, this first address is Base_addr+BL * i, and wherein Base_addr is the base address of current line, the DMA burst operation numbering of i for current line is carried out, and i is the integer more than or equal to 0; This second address is Base_addr+width-BL * i, and wherein width is the width of each row.
According to one embodiment of present invention, the described local data module that reorders comprises first spatial cache and second spatial cache, before once input BL pixel data and after BL pixel data once importing alternately write this first spatial cache and second spatial cache, and alternately read BL pixel data from this second spatial cache and first spatial cache in the mode of inverted order, wherein, described first spatial cache and second spatial cache reads and writes ping-pong operation each other.
According to one embodiment of present invention, the degree of depth of described first memory space and second memory space all equals BL.
Compared with prior art, the present invention has the following advantages:
In the method for the real-time input digital image mirrored storage of the embodiment of the invention and the device, at first every BL pixel data in each row carried out the inverted order ordering, also namely BL pixel data carried out local inverted order; Afterwards BL pixel data after the inverted order ordering write FIFO, then BL the pixel data of reading from FIFO stored, the original initial address of initial address and this BL pixel data of storage becomes horizontal mirror, also i.e. realization horizon glass picture in the full line scope.
Further, when BL pixel data carried out local inverted order, needed spatial cache only was the twice of DMA burst length, thereby had effectively reduced taking memory space.
Description of drawings
Original image when Fig. 1 a is the view data mirror image operation;
Fig. 1 b is the horizontal mirror image of Fig. 1 a;
Fig. 1 c is the vertical mirror image of Fig. 1 a;
Fig. 1 d is level and the vertical mirror image of Fig. 1 a;
Fig. 2 is the line scanning sequential schematic of the pixel data of imageing sensor output in the prior art;
Fig. 3 is the schematic diagram of a kind of real-time input image data acquisition structure in the prior art;
Fig. 4 is the schematic flow sheet of method of the real-time input digital image mirrored storage of the embodiment of the invention;
Dma operation decomposing schematic representation when Fig. 5 is one-row pixels data normal storage;
Dma operation decomposing schematic representation when Fig. 6 is the storage of one-row pixels data horizon glass picture;
Fig. 7 is the structured flowchart of device of the real-time input digital image mirrored storage of the embodiment of the invention.
Embodiment
In the image data acquiring system that adopts FIFO, adopt the mode of direct memory visit (DMA, Direct Memory Access) that pixel data is read from FIFO usually, be written in the system storage by bus then.Generally speaking, the required parameter of dma operation comprises initial address and burst length (burst length), wherein burst length is the number of continuous sense data in the dma operation, furthermore, the individual pixel data of burst length (being designated as BL herein) that dma operation is read from FIFO is written in the connected storage that initial address begins.
The present invention is for the horizontal mirrored storage of the pixel data of real-time input, characteristics in conjunction with dma operation, the scheme of pixel data order will be adjusted in the full line scope in the prior art, be revised as the order adjustment of in a burst length scope, carrying out pixel data, the horizontal mirror transformation of the dma operation original position when being engaged in storage in addition, can adopt the less buffer of the degree of depth to realize the horizontal mirrored storage of entire row of pixels data, wherein being used for the local buffer degree of depth minimum of adjusting the pixel data order only is the twice of burst length.
The invention will be further described below in conjunction with specific embodiments and the drawings, but should not limit protection scope of the present invention with this.
With reference to figure 4, the method for the real-time input digital image mirrored storage of present embodiment comprises the steps:
Step S41 provides DID, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas;
Step S42 carries out the inverted order ordering for every BL pixel data in each row pixel data, and the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length;
Step S43, described BL the pixel data that inverted order is sorted writes pushup storage;
Step S44 reads BL pixel data of this inverted order ordering and stores from described pushup storage with dma mode, and the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
In step S41, DID can come from imageing sensor, for example cmos image sensor, ccd image sensor etc.
In step S42, for each row pixel data of input, be unit with BL pixel data, this BL pixel data is carried out local order adjustment, also be the inverted order ordering.
Being preferably the mode that adopts ping-pong operation in the present embodiment realizes the inverted order of BL pixel data is sorted, specifically comprise: with BL pixel data of preceding once input and after BL pixel data once importing alternately be written to first spatial cache and second spatial cache, the process that writes writes for order, wherein first spatial cache and second spatial cache can be the different spaces in the same buffer, also can be arranged in different buffers; Alternately read wherein BL pixel data of storage from second spatial cache and first spatial cache then, just from the first spatial cache reads pixel data time, the new pixel data of current input writes second spatial cache, and from the second spatial cache reads pixel data time, the new pixel data of current input writes first spatial cache, the two is ping-pong operation each other, when just one of them spatial cache being carried out read operation, the pixel data of new input writes another spatial cache, and vice versa.In addition, during from first spatial cache and the second spatial cache reads pixel data, order is inverted order.
Further, in one example, the address of supposing first spatial cache is 0 to BL-1, the address of second spatial cache is BL to 2 * BL-1, when the pixel data of real-time input be written to first spatial cache 0 behind the BL-1 address, read from first spatial cache from the mode (just from BL-1 to 0) that subtracts 1 with mode and the address of inverted order; When reading pixel data from first spatial cache, the pixel data of new input is written in BL to the 2 * BL-1 address of second spatial cache; Behind the pixel data in running through address BL-1 to 0, from address 2 * BL-1, with the pixel data of address from subtract 1 mode, reading from 2 * BL-1 to the BL address; In the process that data are read, the pixel data of new input is written in 0 to the BL-1 address; So circulation can realize that local data's inverted order of full line data is reset, and realizes that just the inverted order of every BL pixel data is reset.
Employing is with upper type, and the degree of depth of first spatial cache and second spatial cache only needs BL to get final product, and amounts to just that only to need the degree of depth be the local inverted order rearrangement that the buffer of 2 * BL just can be realized BL pixel data.
In step S43, BL pixel data after the inverted order ordering is written among the FIFO, write the fashionable extra order adjustment of not carrying out, can adopt the conventional control method that writes FIFO and sequential to realize.
In step S44, from the FIFO reads pixel data, because what before write FIFO is the pixel data of inverted order ordering, what therefore read also is the pixel data of inverted order ordering with dma mode, burst length when DMA reads also is BL, takes out BL pixel data when also namely a DMA reads.Afterwards, the pixel data of reading from FIFO is stored, the address during storage becomes horizontal mirror with the original address of this BL pixel data.
Furthermore, the original initial address (initial address before the inverted order ordering just) of this BL pixel data is designated as Base_addr+BL * i, wherein Base_addr is the base address of current line, i is the numbering of DMA burst operation that current line is carried out, if with every BL pixel data as an operating unit, a so current BL pixel data is exactly i+1 operating unit in the current line, wherein i is the integer more than or equal to 0, when a so current BL pixel data is stored after reading from FIFO, its initial address is Base_addr+width-BL * i, and wherein width is the width of each row.
To sum up, before pixel data writes FIFO, every BL pixel data in the one-row pixels data being carried out the inverted order ordering, also is that local inverted order is reset; BL pixel data of inverted order ordering writes FIFO, adopt the dma operation mode to read from FIFO then, initial address when the corresponding DMA of every BL the pixel data of reading stores, the original initial address of initial address during this storage and this BL pixel data has horizontal mirror, realized with BL pixel data being the whole inverted order rearrangement of operating unit, thereby realized the horizontal mirrored storage of entire row of pixels data.
Reset and whole inverted order is reset illustrates further and please refer to Fig. 5 and Fig. 6 about local inverted order, wherein Fig. 5 shows the dma operation decomposition of one-row pixels data normal storage, reads BL pixel data at every turn, and with its sequential storage to the target memory space.And Fig. 6 shows the dma operation in one-row pixels data horizon glass picture when storage and decomposes, wherein Inv_BLi obtains after resetting through local inverted order for the pixel data among the corresponding BLi, and for example Inv_BL0 obtains after BL pixel data inverted order among the BL0 sorts; And Inv_BLi and the corresponding initial address of BLi when DMA store also become horizontal mirror, also is that the Inv_BLi that obtains after the local inverted order ordering carries out whole inverted order rearrangement again, thereby realized the horizontal mirrored storage of entire row of pixels data.Need to prove that Fig. 5 and Fig. 6 illustrate according to time sequencing, though BLi and Inv_BLi align outwardly, reset through inverted order the base address during its storage.
Be elaborated below in conjunction with an example.
As a non-limiting instance, this example is that the video data of 1920 * 1080 real-time input carries out horizon glass as stores processor to the resolution of cmos image sensor output.The width width=1920 of image, each pixel data represent that with the 8bit binary number burst length of a dma operation is 128, also are BL=128, and then the storage of one-row pixels data needs 15 dma operations, and the degree of depth of FIFO is chosen as 1K(1024).The degree of depth that is used for carrying out the buffer of the ping-pong structure that local data's inverted order resets is 2 times of 256(BL).
The detailed process that local inverted order is reset (inverted order ordering in other words) is as follows: after the video pixel data of real-time input writes 0 to 127 address of buffer, mode (being address from 127 to 0) with inverted order, certainly subtract 1 mode, sense data from buffer according to the address; The video pixel data of new input is written in 128 to 255 addresses of buffer in the process that data are read.After the data that run through address 127 to 0, from the address 255, from subtracting 1 mode, read from the address 255 to 128 data with the address; The data of new input are written in the address 0 to 127 of buffer in the process that data are read.So circulation, thus the local data that realizes the full line data reorders.
With after the ordering of 128 pixel data inverted orders, it is write to FIFO again, next from FIFO with the dma mode reads pixel data, one time the DMA burst operation reads 128 pixel datas.The pixel data that reads out carries out whole inverted order and resets.Particularly, the initial address of the i time dma operation is: Base_addr+128 * i, and wherein Base_addr is the base address of the row under these 128 pixel datas, 128 is the DMA burst length; When 128 pixel datas that storage is read, the initial address of the i time corresponding DMA storage operation is Base_addr+1920-128 * i, wherein Base_addr is the base address of the row under these 128 pixel datas, with previous being consistent, 128 is the DMA burst length, 1920 is picture traverse, also is the pixel data number that delegation comprises.
To sum up, operating process for the horizontal mirrored storage of video data of real-time input specifically comprises: data write before the FIFO, per 128 pixel datas in the one-row pixels data are reordered (inverted order ordering), then 128 pixel datas after the inverted order ordering are write among the FIFO; Read pixel data from FIFO afterwards, whenever read the initial address of the corresponding DMA of 128 pixel datas, and the horizon glass that carries out the DMA initial address is as conversion process.By the local reordering to 128 pixel datas, in conjunction with the address mapping (horizon glass picture) of dma operation, realized that the horizon glass of the pixel data that full line is imported in real time is as stores processor like this.
Adopt the scheme of present embodiment, required storage resources is that FIFO adds that the degree of depth that reorders for local data is the buffer of BL * 2, and its degree of depth is far smaller than the required buffer degree of depth of storage two line data pixels in the prior art, has saved resource.
With reference to figure 7, present embodiment also provides a kind of device of real-time input digital image mirrored storage, comprising: reorder module 72, data of imageing sensor 71, local data writes control module 73, FIFO74, data and reads control module 75.
Wherein, imageing sensor 71 is used for DID is provided, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas; Local data's module 72 that reorders is carried out inverted order for every BL pixel data in each row pixel data and is sorted, and the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length; Data write control module 73 described BL the pixel data that inverted order sorts are write FIFO74; Data are read control module 75 and are read BL pixel data of this inverted order ordering and store from FIFO74 with dma mode, and the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
Furthermore, this first address is Base_addr+BL * i, and wherein Base_addr is the base address of current line, the DMA burst operation numbering of i for current line is carried out, and i is the integer more than or equal to 0; This second address is Base_addr+width-BL * i, and wherein width is the width of each row.
In addition, this local data module 72 that reorders can comprise first spatial cache and second spatial cache, adopts the mode of ping-pong operation to realize the inverted order ordering of the pixel data imported.Particularly, before once input BL pixel data and after BL pixel data once importing alternately write this first spatial cache and second spatial cache, and alternately read BL pixel data from this second spatial cache and first spatial cache in the mode of inverted order, thereby the inverted order that realizes BL pixel data sorts.Preferably, first spatial cache can be the different memory spaces of same buffer with second spatial cache, and its degree of depth all is BL, and also namely the total depth of this buffer minimum is BL * 2.
About more detailed contents of this device, please refer in the previous embodiment associated description about the method for real-time input digital image mirrored storage, repeat no more here.
The above only is preferred embodiment of the present invention, is not the present invention is done any pro forma restriction.Therefore, every content that does not break away from technical solution of the present invention, just any simple modification of above embodiment being made according to technical spirit of the present invention, the conversion that is equal to all still belong in the protection range of technical solution of the present invention.
Claims (8)
1. the method for a real-time input digital image mirrored storage is characterized in that, comprising:
DID is provided, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas;
Carry out the inverted order ordering for every BL pixel data in each row pixel data, the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length;
Described BL pixel data of inverted order ordering write pushup storage;
Read BL pixel data of this inverted order ordering and store from described pushup storage with dma mode, the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
2. method according to claim 1 is characterized in that, this first address is Base_addr+BL * i, and wherein Base_addr is the base address of current line, the DMA burst operation numbering of i for current line is carried out, and i is the integer more than or equal to 0; This second address is Base_addr+width-BL * i, and wherein width is the width of each row.
3. method according to claim 1 is characterized in that, carries out the inverted order ordering for every BL pixel data in each row pixel data and comprises:
With BL pixel data of preceding once input and after BL pixel data once importing alternately write first spatial cache and second spatial cache;
Mode with inverted order is alternately read BL pixel data from this second spatial cache and first spatial cache, wherein, described first spatial cache and second spatial cache read and write ping-pong operation each other.
4. method according to claim 3 is characterized in that, the degree of depth of described first memory space and second memory space all equals BL.
5. the device of a real-time input digital image mirrored storage is characterized in that, comprising:
Imageing sensor is used for DID is provided, and this DID comprises a plurality of row, and each row comprises a plurality of pixel datas;
Local data's module that reorders is carried out inverted order for every BL pixel data in each row pixel data and is sorted, and the initial address of this BL pixel data is designated as first address, and wherein BL is the DMA burst length;
Pushup storage;
Data write control module, and described BL the pixel data that inverted order is sorted writes pushup storage;
Data are read control module, read BL pixel data of this inverted order ordering and store from described pushup storage with dma mode, and the initial address of storage is designated as second address, and this second address becomes horizontal mirror with first address.
6. device according to claim 5 is characterized in that, this first address is Base_addr+BL * i, and wherein Base_addr is the base address of current line, the DMA burst operation numbering of i for current line is carried out, and i is the integer more than or equal to 0; This second address is Base_addr+width-BL * i, and wherein width is the width of each row.
7. device according to claim 5, it is characterized in that, the described local data module that reorders comprises first spatial cache and second spatial cache, before once input BL pixel data and after BL pixel data once importing alternately write this first spatial cache and second spatial cache, and alternately read BL pixel data from this second spatial cache and first spatial cache in the mode of inverted order, wherein, described first spatial cache and second spatial cache reads and writes ping-pong operation each other.
8. device according to claim 7 is characterized in that, the degree of depth of described first memory space and second memory space all equals BL.
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| CN105491281A (en) * | 2015-11-24 | 2016-04-13 | 北京天诚盛业科技有限公司 | Method and device for increasing image acquisition speed |
| CN105491281B (en) * | 2015-11-24 | 2019-01-25 | 深圳眼神智能科技有限公司 | The method and apparatus for improving image acquisition speed |
| CN107493439A (en) * | 2017-08-16 | 2017-12-19 | 珠海全志科技股份有限公司 | Video image spinning solution, rotating device and computer-readable storage medium |
| CN111475123A (en) * | 2019-01-24 | 2020-07-31 | 西安诺瓦电子科技有限公司 | Image mirroring processing method, device and system and display system |
| CN112532894A (en) * | 2019-09-18 | 2021-03-19 | 西安诺瓦星云科技股份有限公司 | Image processing method, device and system |
| CN111696024A (en) * | 2020-06-02 | 2020-09-22 | 武汉华景康光电科技有限公司 | FPGA-based infrared image mirroring method and device |
| CN111696024B (en) * | 2020-06-02 | 2023-04-25 | 武汉华景康光电科技有限公司 | Infrared image mirroring method and device based on FPGA |
| CN111757036A (en) * | 2020-07-08 | 2020-10-09 | 深圳市洲明科技股份有限公司 | Horizontal mirror image display method and device based on FPGA |
| CN112950456A (en) * | 2021-02-25 | 2021-06-11 | 合肥宏晶微电子科技股份有限公司 | Image processing method and device, electronic equipment and computer readable medium |
| CN113298690A (en) * | 2021-07-28 | 2021-08-24 | 浙江华睿科技股份有限公司 | Image data processing method and device and electronic equipment |
| CN115103208A (en) * | 2022-08-26 | 2022-09-23 | 广州市保伦电子有限公司 | Line caching method, line reading method and processing system for video data |
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