CN103337456B - Improve the method for breakdown voltage of capacitor - Google Patents
Improve the method for breakdown voltage of capacitor Download PDFInfo
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- CN103337456B CN103337456B CN201310265059.9A CN201310265059A CN103337456B CN 103337456 B CN103337456 B CN 103337456B CN 201310265059 A CN201310265059 A CN 201310265059A CN 103337456 B CN103337456 B CN 103337456B
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Abstract
The present invention relates to ic manufacturing technology field; particularly relate to a kind of method improving breakdown voltage of capacitor; by after etching forms top crown protective layer; and formed before top crown in etching; increase the removal step of reacting metal product of polymerization; remain with the metal-containing polymer removing capacitor surface, and then the generation of the phenomenon avoiding the capacitor element prepared to cause puncture voltage on the low side because metallic compound remains, increase performance and the yield of product.
Description
Technical field
The present invention relates to ic manufacturing technology field, particularly relate to a kind of method improving breakdown voltage of capacitor.
Background technology
Capacitor is under electric field action, and what occur instantaneously punctures as voltage breakdown, and the free electron namely in condenser dielectric is under electric field action, collision neutral particle, makes it to ionize the new free electron of generation, sharply carrying out of this ionization process, form the electron stream of avalanche type, cause dielectric breakdown.
The generation of above-mentioned voltage breakdown and the microstructure of capacitor dielectric have close relationship, and especially at the edge of capacitor, the distortion due to fringe field more easily causes the generation of capacitor breakdown phenomenon.
Fig. 1 is the structural representation of MIM capacitor; As shown in Figure 1, in mim capacitor structure, because upper bottom crown is uneven in length, the distortion of electric field will inevitably be caused, that is:
Gauss law calculates: S1 district: Q1=S5* δ=D1*S1
S2 district: Q2=S4* δ=D3*S2*COS θ
When S4=S5: D1*S1=D3*S2*COS θ is another: D=ε E
E2/E1=(D3*COSθ)/D1=S1/S2
During electric field strength due to computationally pole plate edge, the enough little i.e. S1 of S2 can be supposed " S2;
So available conclusion is: E2 " electric field strength of E1(and capacitor element marginal zone will much larger than flat area);
Wherein, Q is free charge amount, and δ is bottom crown charge density, and D is the electric displacement vector in electric field, and S is battery lead plate area, and θ is the angle in S3 face and S2 face, and E is electric field strength, and ε is dielectric constant.
In addition, in integrated circuit fabrication process, capacitor element etching process can produce metal polymerization product, if these metal-containing polymers remain in device edge, under the effect of edge highfield, remaining metal ions ionization can be caused, and then cause breakdown voltage of capacitor to tolerate hydraulic performance decline, thus affect properties of product.
At present, remove in the residual technical scheme of above-mentioned metal-containing polymer, mainly after capacitor element etching, removed the metal-containing polymer of device surface by the technological process of wet-cleaned silicon chip surface, Fig. 2-4 is flowage structure schematic diagrames of tradition preparation capacitor element, as in Figure 2-4, in the technique of preparation capacitor element, in the etching technics of SiN film, adopt photoresistance as mask etching SiN film to the surface of TiAlN thin film, to form protective layer, namely after SiN film etch step, form semiconductor structure as shown in Figure 2, and this semiconductor structure dielectric layer 14 is positioned at the top of bottom electrode 15, TiAlN thin film 13 is positioned at the top of dielectric layer 14, remaining part after protective layer 12(above-mentioned etching SiN film) part covers the surface of TiAlN thin film 13, and the upper surface of photoresist barrier layer 11 protective mulch 12, and reacting metal polymer 16 is remained on the sidewall on protective layer 12 and photoresist barrier layer 11.
Continue; after removing photoresist barrier layer 11; be in mask etching TiAlN thin film 13 to dielectric layer 14 with protective layer 12; after removing photoresist barrier layer 11; form the semiconductor structure with top electrode 131 as shown in Figure 3, and can the nonmetal product of polymerization 17 of forming reactions on the upper surface of protective layer 12 and the surface of remaining dielectric layer 141 exposure.
Finally, adopt wet clean process, remove the nonmetal product of polymerization 17 of above-mentioned reaction, form structure as shown in Figure 4; Wherein, the surface that remaining dielectric layer 141 exposes can continue to remain metal-containing polymer 18.
But, when carrying out above-mentioned processing step, following problem can be there is:
1) in SiN hard mask technique (forming protective layer 12), be adopt CF
4process gas etches this hard mask (SiN film), and stops at the surface of TiAlN thin film 13, and can react with the metal (Ti) in lower floor's (TiAlN thin film 13) containing the gas of F in over etching technique in this step and form Ti
xf
ymetallic compound residual 16, and still can remain on wafer after TiAlN thin film 13 etches.
2) polymer residue after TiAlN thin film 13 etching is removed by wet-cleaned, and the organic liquid of alkalescent adopted in current wet clean process is more weak to metallic compound cleaning performance, and be subject to cleaning fluid can cause damage restriction to capacitor dielectric (ONO), the wet-cleaned time can not excessively be lengthened, and then it is not thorough to make metallic compound clean, easily residual (as shown in Figure 4).
Due to the existence of the problems referred to above, make to adopt the capacitor element prepared of traditional handicraft often can occur because metallic compound remains the phenomenon causing puncture voltage on the low side, and then the performance of the product reduced and yield.
Chinese patent (CN102473596A) describes and a kind of highly punctures the embedded MIM capacitor structure of power supply, and comprise grid material, it is embedded in insulator; Multiple metal contact element, and multiple capacitor; Its multiple capacitor comprises: lower electrode, covers the dielectric of this lower electrode and covers this dielectric upper electrode.
Chinese patent (CN1441319A) describes a kind of residual polymer remover and using method thereof, is applied in rear metal removal technique, effectively to remove the residual polymer on base material; This remover primarily of alkanolamine, sugar alcohol and 20% water formed.Using method is, the base material containing residual polymer to be removed is invaded the composition about 5-15 minute being placed in temperature about 60 DEG C-70 DEG C.The initial moisture content of residual polymer remover is increased to of the present invention 20% from 15%, and the life cycle of residual polymer remover can be made to extend 48 hours from 12 hours.
Summary of the invention
This invention describes a kind of method (oneimprovemethodtocapacitorsresistbreakdownvoltage) improving breakdown voltage of capacitor, be applied in the preparation technology of capacitor element, wherein, comprise the following steps:
There is provided one from bottom to up along seeking the semiconductor structure successively with the first metal layer, dielectric layer and the second metal level, and the surface coverage of this semiconductor structure there is ganoine thin film;
Ganoine thin film described in partial etching to the surface of described the first metal layer, and to respond metal-containing polymer in the left on surfaces of the described the first metal layer exposed;
After removing described reacting metal polymer, to continue with remaining ganoine thin film as mask, etch in described the first metal layer to described dielectric layer;
After cleaning, form capacitance structure.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, adopts the gas with strong side direction etching characteristic to remove described reacting metal polymer.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, adopts N
2described reacting metal polymer is removed as main etching gas.
The method of above-mentioned improvement breakdown voltage of capacitor wherein, is 160mT-220mT in reaction pressure, adopts the N of 300sccm-400sccm
2carry out described removal reacting metal polymer process step.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, the material of described the first metal layer and the second metal level is TiN.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, the material SiN of described ganoine thin film.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, adopts photoetching, etching technics with ganoine thin film described in partial etching
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, adopts CF
4etched portions etches the surface of described ganoine thin film to described the first metal layer.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, described dielectric layer is ONO structure.
The method of above-mentioned improvement breakdown voltage of capacitor, wherein, described cleaning is wet clean process, to remove the nonmetal product of polymerization of reaction residual in processing step in described etching first metal layer to described dielectric layer.
In sum; owing to have employed technique scheme; a kind of method improving breakdown voltage of capacitor of the present invention; by after etching forms top crown protective layer; and formed before top crown in etching, increase the removal step of reacting metal product of polymerization, remain with the metal-containing polymer removing capacitor surface; and then the generation of the phenomenon avoiding the capacitor element prepared to cause puncture voltage on the low side because metallic compound remains, increase performance and the yield of product.
Accompanying drawing explanation
Fig. 1 is the structural representation of MIM capacitor;
Fig. 2-4 is flowage structure schematic diagrames of tradition preparation capacitor element;
Fig. 5-8 is a kind of flowage structure schematic diagrames improving the method for breakdown voltage of capacitor in embodiment;
Fig. 9 is the voltage-withstand test distribution map of the method adopting the application to improve the breakdown voltage of capacitor electric capacity prepared and the electric capacity adopting traditional technique to prepare.
Embodiment
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is further described:
Fig. 5-8 is a kind of flowage structure schematic diagrames improving the method for breakdown voltage of capacitor in embodiment; As viewed in figures 5-8, a kind of method improving breakdown voltage of capacitor, first, a substrate (not indicating in figure) is prepared the first metal layer 25, dielectric layer 24, second metal level 23 and ganoine thin film successively; Preferably, the material of the first metal layer 25 and the second metal level 23 is TiN, and the material of ganoine thin film is SiN, and dielectric layer is ONO(oxidenitride oxide) structure.
Secondly, spin coating photoresist covers the surface of above-mentioned ganoine thin film, after exposure, developing process, remove unnecessary photoresist, form the photoresistance 21 with top electrode pattern, and continue with this photoresistance 21 for mask, the surface of partial etching ganoine thin film to the second metal level 23, forms top electrode protective layer 22(as shown in Figure 5 and remaining ganoine thin film); In this process step, CF is adopted
4as etching gas to carry out etching technics to hard mask, and carrying out in over etching technical process, because F can react with the metal Ti in the second metal level 23, generating Ti
xf
y, namely cover the reacting metal product of polymerization 26 on photoresistance 21 and top electrode protective layer 22 sidewall, and the upper surface of this reacting metal product of polymerization 26 cover part second metal level 23.
Afterwards, the gas adopting higher reaction pressure (HighPressure) and large discharge to have a strong side direction etching characteristic if N2 etc. is as main etching gas, and utilizes lower vertical bombarding voltage, to remove Ti
xf
yand above-mentioned etching gas can not react with TiN or SiN, and then can in etching process cleaning reaction metal polymerization product 26, namely be 160mT-220mT(as 160mT, 180mT, 200mT or 220mT are equivalent in reaction pressure) condition under, adopt 300sccm-400sccm(as equivalent in 300sccm, 330sccm, 360sccm, 390sccm or 400sccm) N
2, to remove reacting metal product of polymerization 26, form structure as shown in Figure 6, thus before capacitor element etch, remove metal-containing polymer remain, avoid the problem that metal-containing polymer remains the reduction of caused puncture voltage tolerance performance.
Then, ashing is removed after photoresistance 21, and above electrode protecting layer 22 be in mask etching second metal level 23 to dielectric layer 24, and formation has top electrode 231(and remaining second metal level as shown in Figure 7) structure; And at the moment after etching technique step, to respond nonmetal product of polymerization 27 in the remained on surface of the surface of protective layer 22 and remaining media layer 241.
Finally, adopt wet clean process to remove above-mentioned nonmetal product of polymerization 27, form structure as shown in Figure 8, and continue follow-up capacitor element preparation technology.
Fig. 9 is the voltage-withstand test distribution map of the method adopting the application to improve the breakdown voltage of capacitor electric capacity prepared and the electric capacity adopting traditional technique to prepare; At employing LamFlex_DD, under the condition that pressure (Pressure) is 160mT, to the N adopting 300sccm
2the electric capacity of preparation carries out voltage-withstand test with the electric capacity adopting prior art to prepare, adopting stepping to increase voltage when namely carrying out testing electrical property tests in 0 ~ 30v interval, whether capacitor element is breakdown, characterizes the withstand voltage properties of electric capacity with this, and then obtain datagram as shown in Figure 9.Known with reference to figure 9, the electric capacity adopting the method for the improvement breakdown voltage of capacitor of the application to prepare has been stopped to cause puncture voltage to tolerate the problem of performance because metal-containing polymer remains.
Preferably, a kind of method improving breakdown voltage of capacitor of the present embodiment, on the technology nodes such as 65/55nm or 90nm, can be applicable to the technology platforms such as Logic.
In sum; owing to have employed technique scheme; the present invention proposes a kind of method improving breakdown voltage of capacitor; by after etching forms top crown protective layer; and formed before top crown in etching, increase the removal step of reacting metal product of polymerization, remain with the metal-containing polymer removing capacitor surface; and then the generation of the phenomenon avoiding the capacitor element prepared to cause puncture voltage on the low side because metallic compound remains, increase performance and the yield of product.
By illustrating and accompanying drawing, giving the exemplary embodiments of the ad hoc structure of embodiment, based on the present invention's spirit, also can do other conversion.Although foregoing invention proposes existing preferred embodiment, but these contents are not as limitation.
For a person skilled in the art, after reading above-mentioned explanation, various changes and modifications undoubtedly will be apparent.Therefore, appending claims should regard the whole change and correction of containing true intention of the present invention and scope as.In Claims scope, the scope of any and all equivalences and content, all should think and still belong to the intent and scope of the invention.
Claims (9)
1. improve a method for breakdown voltage of capacitor, be applied in the preparation technology of capacitor element, it is characterized in that, comprise the following steps:
There is provided the semiconductor structure that has the first metal layer, dielectric layer and the second metal level from bottom to up successively, and the surface coverage of this semiconductor structure there is ganoine thin film;
Ganoine thin film described in partial etching to the surface of described second metal level, and to respond metal-containing polymer in the left on surfaces of described second metal level exposed;
After removing described reacting metal polymer, to continue with remaining ganoine thin film as mask, etch in described the first metal layer to described dielectric layer, the remained on surface of remaining described dielectric layer responds nonmetal product of polymerization;
Adopt cleaning to remove the nonmetal product of polymerization of described reaction, form capacitance structure.
2. the method improving breakdown voltage of capacitor according to claim 1, is characterized in that, adopts the gas with strong side direction etching characteristic to remove described reacting metal polymer, adopts N
2described reacting metal polymer is removed as main etching gas.
3. the method improving breakdown voltage of capacitor according to claim 2, is characterized in that, is under the condition of 160mT-220mT in reaction pressure, adopts the N of 300sccm-400sccm
2carry out described removal reacting metal polymer process step.
4. the method improving breakdown voltage of capacitor according to claim 1, is characterized in that, the material of described the first metal layer and the second metal level is TiN.
5. the method improving breakdown voltage of capacitor according to claim 1, is characterized in that, the material SiN of described ganoine thin film.
6. the method improving breakdown voltage of capacitor according to claim 5, is characterized in that, adopts photoetching, etching technics with ganoine thin film described in partial etching.
7. the method improving breakdown voltage of capacitor according to claim 6, is characterized in that, adopts CF
4etched portions etches the surface of described ganoine thin film to described second metal level.
8. the method improving breakdown voltage of capacitor according to claim 1, is characterized in that, described dielectric layer is ONO structure.
9. the method improving breakdown voltage of capacitor according to claim 1, it is characterized in that, described cleaning is wet clean process, to remove the nonmetal product of polymerization of reaction residual in the processing step in described etching second metal level to described dielectric layer.
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CN104392897A (en) * | 2014-04-30 | 2015-03-04 | 上海华力微电子有限公司 | Production method of MIM capacitor |
CN108002342B (en) * | 2016-10-31 | 2020-02-11 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and manufacturing method thereof |
CN109698070A (en) * | 2018-12-06 | 2019-04-30 | 张志琪 | One kind being used for the anti-breakdown cleaning plant of power capacitor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6228739B1 (en) * | 1998-05-15 | 2001-05-08 | Samsung Electronics Co., Ltd. | Pre-treatment method performed on a semiconductor structure before forming hemi-spherical grains of capacitor storage node |
CN1815714A (en) * | 2004-12-30 | 2006-08-09 | 美格纳半导体有限会社 | Semiconductor device and method for fabricating the same |
CN102339869A (en) * | 2010-07-16 | 2012-02-01 | 美格纳半导体有限公司 | Semiconductor device with MIM capacitor and method for manufacturing the same |
CN103021813A (en) * | 2012-12-21 | 2013-04-03 | 上海宏力半导体制造有限公司 | MIM (metal-insulator-metal) capacitor and manufacturing method thereof |
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KR100390833B1 (en) * | 2000-12-28 | 2003-07-10 | 주식회사 하이닉스반도체 | A method for forming capacitor in semiconductor device |
US8282842B2 (en) * | 2007-11-29 | 2012-10-09 | United Microelectronics Corp. | Cleaning method following opening etch |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6228739B1 (en) * | 1998-05-15 | 2001-05-08 | Samsung Electronics Co., Ltd. | Pre-treatment method performed on a semiconductor structure before forming hemi-spherical grains of capacitor storage node |
CN1815714A (en) * | 2004-12-30 | 2006-08-09 | 美格纳半导体有限会社 | Semiconductor device and method for fabricating the same |
CN102339869A (en) * | 2010-07-16 | 2012-02-01 | 美格纳半导体有限公司 | Semiconductor device with MIM capacitor and method for manufacturing the same |
CN103021813A (en) * | 2012-12-21 | 2013-04-03 | 上海宏力半导体制造有限公司 | MIM (metal-insulator-metal) capacitor and manufacturing method thereof |
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