CN103337257A - NAND flash memory equipment and operation method thereof - Google Patents
NAND flash memory equipment and operation method thereof Download PDFInfo
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- CN103337257A CN103337257A CN2013102474652A CN201310247465A CN103337257A CN 103337257 A CN103337257 A CN 103337257A CN 2013102474652 A CN2013102474652 A CN 2013102474652A CN 201310247465 A CN201310247465 A CN 201310247465A CN 103337257 A CN103337257 A CN 103337257A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3436—Arrangements for verifying correct programming or erasure
- G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
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Abstract
The invention belongs to the field of a structural design of an NAND flash memory and provides NAND flash memory equipment and an operation method thereof. The NAND flash memory equipment and the operation method thereof dynamically adjust actual working voltage of an NAND flash memory chip according to erasing times of the NAND flash memory chip to enable the actual working voltage of the corresponding NAND flash memory chip to have a high value in an allowed range, so as to guarantee the reliable work of the NAND flash memory chip and improve execution speeds of erasing operation and writing-in operation; and therefore, the NAND flash memory chip has the high performance in the process of executing the erasing operation and the writing-in operation and the use experience of a user is improved.
Description
Technical field
The invention belongs to the structural design field of nand flash memory, relate in particular to a kind of nand flash memory equipment and method of operating thereof.
Background technology
Along with the progress of semiconductor technology, the price of nand flash memory equipment descends steadily, and its application also is expanded.
Known ground, each storage unit in the nand flash memory chip structurally adopts the floating boom transistor, operation to nand flash memory chip can be erase operation, write operation or read operation, by the charge/discharge to floating empty grid, realize the storage/release of data, and then realize the write/erase of data in the nand flash memory chip.At length, each nand flash memory chip comprises the piece of some, each piece is divided into the page or leaf of some again, to data in the nand flash memory chip to wipe with the piece be that unit carries out, to data in the nand flash memory chip to write and read with the page or leaf be that unit carries out, and before carrying out write operation, must carry out erase operation earlier.
In the prior art, because write operation and erase operation to nand flash memory chip relate to the transistorized charge/discharge of floating boom, and nand flash memory chip is operated under the rated operational voltage, therefore the speed of write operation and erase operation of carrying out wants slow more than carrying out read operation, thereby influenced the performance of nand flash memory chip, reduced the experience property that the user uses.For example, for a kind of typical, every page data size multi-level cell memory that is the 4K byte (Multi-level Cell, MLC), the execution time of its erase operation is 3000 microseconds, the execution time of its write operation is 1300 microseconds, and the execution time of read operation only is 25 microseconds.Particularly for write operation, because the operation that writes, wipes and read can not executed in parallel and can only serial carry out, so the execution speed of write operation becomes the bottleneck of restriction nand flash memory chip memory property.
Summary of the invention
The object of the present invention is to provide a kind of nand flash memory equipment, be intended to solve existing nand flash memory chip because write operation and erase operation relate to the transistorized charge/discharge of floating boom, and nand flash memory chip is operated under the rated operational voltage, therefore the speed of write operation and erase operation is slow, influence the performance of nand flash memory chip and reduces the problem of the experience property of user's use.
The present invention realizes like this, a kind of nand flash memory equipment, described nand flash memory equipment comprises the flash memory set that at least one is made of at least one nand flash memory chip, the nand flash memory controller that is connected with described flash memory set, and to the voltage regulator circuit of described nand flash memory chip output real work voltage, described nand flash memory controller comprises:
Governor circuit is used for to the erasing instruction of described nand flash memory chip transmission piece;
At least one counter is used for after described governor circuit sends the erasing instruction of piece, according to the counting instruction of described governor circuit the erasing times of relevant block is counted, and obtains the mean value of erasing times afterwards according to the count results statistics;
At least one voltage dynamic calculation unit, the mean value that is used for the described erasing times that the described counters count according to correspondence obtains, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains described erasing times, and export corresponding control signal to described voltage regulator circuit, described voltage regulator circuit is to the corresponding nand flash memory chip output real work voltage corresponding with described control signal.
Another object of the present invention is to provide a kind of method of operating of aforesaid nand flash memory equipment, described method comprises:
Governor circuit sends the erasing instruction of piece to the nand flash memory chip in the flash memory set;
After the erasing instruction of described of described governor circuit transmission, counter is counted the erasing times of relevant block according to the counting instruction of described governor circuit, obtains the mean value of erasing times afterwards according to the count results statistics;
The mean value of the described erasing times that voltage dynamic calculation unit obtains according to the described counters count of correspondence, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains described erasing times, and export corresponding control signal to voltage regulator circuit;
Described voltage regulator circuit is exported corresponding real work voltage according to described control signal to the nand flash memory chip of correspondence.
Nand flash memory equipment and method of operating thereof that the present invention proposes are dynamically to adjust the real work voltage of nand flash memory chip according to the nand flash memory chip erasing times, can make the real work voltage of corresponding nand flash memory chip have high value in allowed limits, thereby when guaranteeing the nand flash memory chip reliably working, improve the execution speed of erase operation and write operation, make nand flash memory chip when carrying out erase operation and write operation, have higher performance, promoted the experience property that the user uses.
Description of drawings
Fig. 1 is the structural drawing of the nand flash memory equipment that provides of first embodiment of the invention;
Fig. 2 is the structural drawing of the nand flash memory equipment that provides of second embodiment of the invention;
Fig. 3 is the flow chart of the nand flash memory equipment that provides of third embodiment of the invention;
Fig. 4 is in the third embodiment of the invention, and the process flow diagram that obtains real work voltage and export control signal is searched in voltage dynamic calculation unit.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the present invention is further elaborated.Should be appreciated that specific embodiment described herein only in order to explaining the present invention, and be not used in restriction the present invention.
Carry out the slow problem of write/erase operating speed in order to solve existing nand flash memory equipment, from the semiconductor technology angle, can be by improving the transistorized real work voltage of floating boom to improve charge/discharge speed, therefore, the nand flash memory equipment of the present invention's proposition is the real work voltage of dynamically adjusting nand flash memory chip according to the nand flash memory chip erasing times.
Fig. 1 shows the structure of the nand flash memory equipment that first embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with first embodiment of the invention.
At length, the nand flash memory equipment that first embodiment of the invention provides comprises the flash memory set 2 that at least one is made of at least one nand flash memory chip, the nand flash memory controller 1 that is connected with flash memory set 2, and in the flash memory set 2 voltage regulator circuit 3 of each nand flash memory chip output real work voltage.Wherein, nand flash memory controller 1 comprises: governor circuit 11 is used for to the erasing instruction of the nand flash memory chip transmission piece of flash memory set 2; At least one counter 12 is used for after governor circuit 11 sends the erasing instruction of piece, according to the counting instruction of governor circuit 11 erasing times of relevant block is counted, and obtains the mean value of erasing times afterwards according to the count results statistics; At least one the voltage dynamic calculation unit 13 that connects one to one respectively with each counter 12, be used for adding up the mean value of the erasing times that obtains according to the counter 12 of correspondence, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains this erasing times, and to the corresponding control signal of voltage regulator circuit 3 outputs, voltage regulator circuit 3 is to the corresponding nand flash memory chip output real work voltage corresponding with described control signal.
In the first embodiment of the invention, voltage regulator circuit 3 can comprise at least one Control of Voltage chip; At least one counter 12 can be at least one corresponding with each nand flash memory chip respectively counter, also can be at least one corresponding with each flash memory set 2 respectively counter, can also be a counter corresponding with whole flash memory set 2.If at least one counter 12 is at least one corresponding with each nand flash memory chip respectively counter, then the mean value of the erasing times that obtains of counter 12 statistics is the mean value of the erasing times of each piece in the corresponding nand flash memory chip, and the control signal of corresponding voltage dynamic calculation unit 13 outputs is in order to adjust the real work voltage of corresponding nand flash memory chip; At least one counter 12 is at least one corresponding with each flash memory set 2 respectively counter, then the mean value of the erasing times that obtains of counter 12 statistics is the mean value of the erasing times of each piece in the corresponding flash memory set 2, and the control signal of corresponding voltage dynamic calculation unit 13 outputs is in order to adjust the real work voltage of each nand flash memory chip in the corresponding flash memory set 2; If at least one counter 12 is counters corresponding with whole flash memory set 2, then the mean value of the erasing times that obtains of counter 12 statistics is the mean value of the erasing times of each piece in whole flash memory set 2, and the control signal of corresponding voltage dynamic calculation unit 13 outputs is in order to adjust the real work voltage of each nand flash memory chip in whole flash memory set 2.
Suppose that the real work voltage of nand flash memory chip and the difference of rated operational voltage are Δ Vpp, the mean value of erasing times is N, then has: Δ Vpp=μ * λ
N, wherein, μ and λ are constant and λ＜1.According to the requirement of nand flash memory chip, need Δ Vpp to be no more than 10% of rated operational voltage, for example, be the nand flash memory chip of 3.3v for rated operational voltage, its Δ Vpp is no more than 0.3v, is the nand flash memory chip of 1.8v for rated operational voltage, and its Δ Vpp is no more than 0.15v.Accordingly, in the first embodiment of the invention, voltage dynamic calculation unit 13 stores a contingency table in advance, this contingency table has characterized when μ and λ one timing, corresponding relation between the real work voltage of the value range of erasing times and nand flash memory chip, voltage dynamic calculation unit 13 by searching this contingency table, can obtain corresponding real work voltage under the situation of the mean value of known erasing times.For example, if the mean value of erasing times is to the maximum 3000 times, it then is the nand flash memory chip of 3.3v for rated operational voltage, can be by editing contingency table in advance, make: when the value range of erasing times is 0-500 time, corresponding real work voltage is 3.6v, when the value range of erasing times is 500-1000 time, corresponding real work voltage is 3.45v or 3.5v, and when the value range of erasing times was 1000-1500 time, corresponding real work voltage was 3.4v, when the value range of erasing times is 1500-2500 time, corresponding real work voltage is 3.35v, and the value range of erasing times is for 2500 times and when above, and corresponding real work voltage is 3.3v.
The nand flash memory equipment that first embodiment of the invention proposes is the real work voltage of dynamically adjusting nand flash memory chip according to the nand flash memory chip erasing times, can make the real work voltage of corresponding nand flash memory chip have high value in allowed limits, thereby when guaranteeing the nand flash memory chip reliably working, improve the execution speed of erase operation and write operation, make nand flash memory chip when carrying out erase operation and write operation, have higher performance, promoted the experience property that the user uses.
Because in practice, raising along with the real work voltage of nand flash memory chip, nand flash memory chip is when carrying out write operation, the error rate of storage data also improves thereupon, for this reason, second embodiment of the invention has proposed a kind of nand flash memory equipment, as shown in Figure 2, for convenience of explanation, only show the part relevant with second embodiment of the invention.
Different with first embodiment, in a second embodiment, nand flash memory controller 1 also comprises: at least one error detection and correction unit 14, be used for to adopt a certain algorithm (for example ECC algorithm etc.), the corresponding nand flash memory chip of carrying out write operation and read operation is carried out data detection and correction, thereby guaranteed the integrality of data transmission.
In the second embodiment of the invention, according to data throughput and error detection and correction ability, at least one error detection and correction unit 14 can be at least one corresponding with each flash memory set 2 respectively error detection and correction unit 14, also can be at least one corresponding with a plurality of flash memory set 2 respectively error detection and correction unit 14.
The nand flash memory equipment utilization error detection and correction unit 14 that second embodiment of the invention proposes, avoided nand flash memory chip to cause the raising of the error rate of storage data owing to the raising of real work voltage, thereby in the execution speed that improves the nand flash memory chip erase operation, also further guarantee the integrality of data when data are carried out read operation and write operation, further promoted the performance of nand flash memory chip and the experience property that the user uses.
Fig. 3 shows the method for operating flow process of Fig. 1 that third embodiment of the invention provides or nand flash memory equipment shown in Figure 2.
At length, the method for operating of Fig. 1 of providing of third embodiment of the invention or nand flash memory equipment shown in Figure 2 comprises:
Step S1: governor circuit sends the erasing instruction of piece to the nand flash memory chip in the flash memory set.
Step S2: send the erasing instruction of piece at governor circuit after, counter is counted the erasing times of relevant block according to the counting instruction of governor circuit, obtains the mean value of erasing times afterwards according to the count results statistics.
Step S3: the mean value of the erasing times that voltage dynamic calculation unit obtains according to the counters count of correspondence, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains this erasing times, and export corresponding control signal to voltage regulator circuit.
Further, as shown in Figure 4, step S3 can comprise:
Step S31: the contingency table that prestores is searched in voltage dynamic calculation unit, obtains the corresponding real work voltage of mean value of the erasing times that obtains with corresponding counters count.
In the third embodiment of the invention, contingency table has characterized the corresponding relation between the real work voltage of the value range of erasing times and nand flash memory chip.
Step S32: voltage dynamic calculation unit is exported corresponding control signal according to the real work voltage that finds to voltage regulator circuit.
Step S4: voltage regulator circuit is exported corresponding real work voltage according to control signal to the nand flash memory chip of correspondence.
In sum, nand flash memory equipment and method of operating thereof that the present invention proposes are dynamically to adjust the real work voltage of nand flash memory chip according to the nand flash memory chip erasing times, can make the real work voltage of corresponding nand flash memory chip have high value in allowed limits, thereby when guaranteeing the nand flash memory chip reliably working, improve the execution speed of erase operation and write operation, make nand flash memory chip when carrying out erase operation and write operation, have higher performance, promoted the experience property that the user uses.In addition, in the nand flash memory equipment that the present invention proposes, also the error detection and correction unit can be set in nand flash memory controller, to guarantee the data integrity in write operation and the read operation process, reduce owing to real work voltage improves the error rate that causes.
The above only is preferred embodiment of the present invention, not in order to limiting the present invention, all any modifications of doing within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. nand flash memory equipment, it is characterized in that, described nand flash memory equipment comprises the flash memory set that at least one is made of at least one nand flash memory chip, the nand flash memory controller that is connected with described flash memory set, and to the voltage regulator circuit of described nand flash memory chip output real work voltage, described nand flash memory controller comprises:
Governor circuit is used for to the erasing instruction of described nand flash memory chip transmission piece;
At least one counter is used for after described governor circuit sends the erasing instruction of piece, according to the counting instruction of described governor circuit the erasing times of relevant block is counted, and obtains the mean value of erasing times afterwards according to the count results statistics;
At least one voltage dynamic calculation unit, the mean value that is used for the described erasing times that the described counters count according to correspondence obtains, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains described erasing times, and export corresponding control signal to described voltage regulator circuit, described voltage regulator circuit is to the corresponding nand flash memory chip output real work voltage corresponding with described control signal.
2. nand flash memory equipment as claimed in claim 1, it is characterized in that, described at least one counter is at least one corresponding with each described nand flash memory chip respectively counter, the mean value of the described erasing times that described counters count obtains is the mean value of the erasing times of each piece in the corresponding nand flash memory chip, and the described control signal of corresponding described voltage dynamic calculation unit output is in order to adjust the real work voltage of described corresponding nand flash memory chip.
3. nand flash memory equipment as claimed in claim 1, it is characterized in that, described at least one counter is at least one corresponding with each described flash memory set respectively counter, the mean value of the described erasing times that described counters count obtains is the mean value of the erasing times of each piece in the corresponding flash memory set, and the described control signal of corresponding described voltage dynamic calculation unit output is in order to adjust the real work voltage of each nand flash memory chip in the described corresponding flash memory set.
4. nand flash memory equipment as claimed in claim 1, it is characterized in that, described at least one counter is a counter corresponding with whole flash memory set, the mean value of the described erasing times that described counters count obtains is the mean value of the erasing times of each piece in described whole flash memory set, and the described control signal of corresponding described voltage dynamic calculation unit output is in order to adjust the real work voltage of each nand flash memory chip in described whole flash memory set.
5. nand flash memory equipment as claimed in claim 1 is characterized in that, described voltage regulator circuit comprises at least one Control of Voltage chip.
6. nand flash memory equipment as claimed in claim 1 is characterized in that, described at least one voltage dynamic calculation unit connects one to one with each described counter respectively.
7. nand flash memory equipment as claimed in claim 1 is characterized in that, described nand flash memory controller also comprises:
At least one error detection and correction unit is used for adopting a certain algorithm, and the corresponding nand flash memory chip of carrying out write operation and read operation is carried out data detection and correction.
8. nand flash memory equipment as claimed in claim 7 is characterized in that, described at least one error detection and correction unit is corresponding with each described flash memory set respectively, or corresponding with a plurality of described flash memory set respectively.
9. the method for operating as each described nand flash memory equipment of claim 1 to 8 is characterized in that, described method comprises:
Governor circuit sends the erasing instruction of piece to the nand flash memory chip in the flash memory set;
After the erasing instruction of described of described governor circuit transmission, counter is counted the erasing times of relevant block according to the counting instruction of described governor circuit, obtains the mean value of erasing times afterwards according to the count results statistics;
The mean value of the described erasing times that voltage dynamic calculation unit obtains according to the described counters count of correspondence, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains described erasing times, and export corresponding control signal to voltage regulator circuit;
Described voltage regulator circuit is exported corresponding real work voltage according to described control signal to the nand flash memory chip of correspondence.
10. the method for operating of nand flash memory equipment as claimed in claim 9, it is characterized in that, the mean value of the described erasing times that described voltage dynamic calculation unit obtains according to the described counters count of correspondence, search the real work voltage of the nand flash memory chip of the mean value correspondence that obtains described erasing times, and comprise to the step that voltage regulator circuit is exported corresponding control signal:
The contingency table that prestores is searched in voltage dynamic calculation unit, obtain the corresponding real work voltage of mean value of the described erasing times that obtains with corresponding described counters count, described contingency table has characterized the corresponding relation between the real work voltage of the value range of erasing times and nand flash memory chip;
Voltage dynamic calculation unit is exported corresponding control signal according to the described real work voltage that finds to voltage regulator circuit.
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| CN201310247465.2A CN103337257B (en) | 2013-06-20 | 2013-06-20 | NAND flash memory equipment and operation method thereof |
| PCT/CN2014/070544 WO2014201864A1 (en) | 2013-06-20 | 2014-01-13 | Nand flash memory device and operation method therefor |
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| WO2014201864A1 (en) * | 2013-06-20 | 2014-12-24 | 深圳市瑞耐斯技术有限公司 | Nand flash memory device and operation method therefor |
| CN105242871A (en) * | 2014-06-06 | 2016-01-13 | 华为技术有限公司 | Data writing method and apparatus |
| CN105302474A (en) * | 2014-07-31 | 2016-02-03 | 华为技术有限公司 | Method for controlling write operation of flash memory and controller of flash memory |
| CN105788637A (en) * | 2015-12-24 | 2016-07-20 | 北京兆易创新科技股份有限公司 | Erasing and writing recession compensation method and device for NAND FLASH |
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| CN108647111A (en) * | 2018-05-14 | 2018-10-12 | 联芸科技（杭州）有限公司 | Read control device, reading and control method thereof and Memory Controller for memory |
| CN109308161A (en) * | 2017-07-26 | 2019-02-05 | 北京兆易创新科技股份有限公司 | Parameter adjustment controls, method and apparatus for flash memory |
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| CN105302474A (en) * | 2014-07-31 | 2016-02-03 | 华为技术有限公司 | Method for controlling write operation of flash memory and controller of flash memory |
| CN105302474B (en) * | 2014-07-31 | 2018-03-16 | 华为技术有限公司 | Control the method for write operation and the controller of flash memory of flash memory |
| CN105989888A (en) * | 2015-03-19 | 2016-10-05 | 爱思开海力士有限公司 | Nonvolatile memory device, operating method thereof, and test system having the same |
| CN105989888B (en) * | 2015-03-19 | 2020-07-17 | 爱思开海力士有限公司 | Nonvolatile memory device, method of operating the same, and test system having the same |
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| CN106205714A (en) * | 2016-06-29 | 2016-12-07 | 联想(北京)有限公司 | A kind of data processing method, storage device, electronic equipment |
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| CN107958686B (en) * | 2016-10-17 | 2021-06-15 | 爱思开海力士有限公司 | Memory system of 3D NAND flash memory and operation method thereof |
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| CN108647111A (en) * | 2018-05-14 | 2018-10-12 | 联芸科技（杭州）有限公司 | Read control device, reading and control method thereof and Memory Controller for memory |
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| Publication number | Publication date |
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| WO2014201864A1 (en) | 2014-12-24 |
| CN103337257B (en) | 2017-05-24 |
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