CN103326700A

CN103326700A - Bootstrap sampling switch circuit

Info

Publication number: CN103326700A
Application number: CN2013101931379A
Authority: CN
Inventors: 刘雄
Original assignee: SUZHOU SUERDA INFORMATION TECHNOLOGY Co Ltd
Current assignee: SUZHOU SUERDA INFORMATION TECHNOLOGY Co Ltd
Priority date: 2013-05-23
Filing date: 2013-05-23
Publication date: 2013-09-25

Abstract

The invention discloses a bootstrap sampling switch circuit which is provided with a charge pump. A sampling clock CK and a main switch pipe are connected to the charge pump in parallel; a capacitor is connected between the sampling clock CK and the charge pump in series; an inverted amplifier CKB is connected between the main switch pipe and the charge pump in series; the main switch pipe comprises a COMS pipe M11, an output end and an input end, the output end is connected with a source electrode of the COMS pipe M11, and the input end is connected with a drain electrode of the COMS pipe M11; a grid electrode of the COMS pipe M11 is connected between the charge pump and the capacitor. A node is fast charged through the bootstrap sampling switch circuit, charge injection is the same no matter when the switch pipe is closed, the input-related sampling errors are small and the linearity of a system is improved.

Description

A kind of bootstrapping sampling switch circuit

Technical field

The present invention relates to the sampling switch of booting, relate in particular to a kind of bootstrapping sampling switch circuit.

Background technology

Resistance during for the switching tube conducting reduces decay, increases bandwidth, and the grid voltage that increases switching tube is an effective way.In order to guarantee the linearity, wish that usually when switch conduction, it is constant that the grid of switching tube and the voltage difference between the source electrode keep.This technology is called as " sampling switch bootstrapping " technology.The circuit working waveform of the bootstrapping sampling switch that therefore, usually needs.Shown in Fig. 1, when switch need to cut out, the voltage of the grid G of main switch was 0, and when switch need to be opened, the grid voltage of main switch was the voltage that input signal adds a Vdd.

Its operation principle is as follows: when the switch clock was low, sampling clock CK voltage was 0, and sampling clock paraphase CKB voltage is Vdd, and COMS pipe M7 and COMS pipe M10 conducting are moved the grid G point voltage of main switch to 0; Simultaneously, COMS pipe M12 and COMS pipe M3 conducting, the two ends of capacitor C 3 are connected to voltage Vdd and ground, are recharged.That capacitor C 3 will as a kind of battery, produce the voltage difference of Vdd at switch conduction between input and switch gate.COMS pipe M8 and COMS pipe M9 close, and the two ends of assurance capacitor C 3 do not have and other circuit link up, and cause electric leakage.When the switch clock was low, sampling clock CK voltage was Vdd, and sampling clock paraphase CKB voltage is 0, and COMS pipe M5 drags down the grid of COMS pipe M8, and the grid G point voltage of main switch is moved height to, so that main switch and the equal conducting of COMS pipe M9.Grid G point voltage and the input of COMS pipe M9 conducting assurance main switch are followed, and keep the voltage difference of the Vdd of storage on the capacitor C 3.

The turn on process of COMS pipe M8, main switch and COMS pipe M9 need to be to the respectively successively charging of several nodes in the above-mentioned technology, and speed is slow, causes this circuit can't apply in very at a high speed the sample circuit; Different the conducting voltage of the grid of main switch is different constantly, and is relevant with input, but closing voltage is 0, and switching tube transfers to when closing from conducting, and the change in voltage of grid is different, and is relevant with input.Cause the charge injection when the different moment, switching tube was closed different, cause reducing the system linear degree with the relevant sampling error of input, increase error.

Summary of the invention

Technical problem to be solved by this invention is to provide a kind of and can reduce the bootstrapping sampling switch circuit that sampling error improves the system linear degree.

In order to solve the problems of the technologies described above, the present invention is achieved by the following technical solutions: a kind of bootstrapping sampling switch circuit, has charge pump, in parallel sampling clock CK and main switch on the described charge pump, the electric capacity of connecting between described sampling clock CK and the charge pump is in series with a phase inverter CKB between main switch and the charge pump; Described main switch comprises COMS pipe M11, output and input, and described output connects the source electrode of COMS pipe M11, and input connects the drain electrode of COMS pipe M11, and the grid of described COMS pipe M11 is connected between charge pump and the electric capacity.

Further, described charge pump comprises COMS pipe M1, M2, M3, M4, M5, M8, M9, M12, M13, capacitor C 1, C2, C3 and sampling clock CK, described COMS pipe M1, M2, M3 is in parallel, COMS manages M1, M2, the source electrode of M3 connects voltage Vdd, the grid of COMS pipe M1 connects the drain electrode of COMS pipe M2, the grid of COMS pipe M2 connects the drain electrode of COMS pipe M1, the grid of COMS pipe M3 is connected with the grid of COMS pipe M2, COMS manages M1, the drain electrode of M2 connects phase inverter CKB, the drain electrode of COMS pipe M3 connects the source electrode of COMS pipe M12, the grid of COMS pipe M12 is connected with phase inverter CKB, the grounded drain of COMS pipe M12; Described COMS pipe M8, M9 are connected in parallel between COMS pipe M3, the M12, the source electrode of COMS pipe M8 is connected with the drain electrode of COMS pipe M3, drain electrode is connected with electric capacity, grid is connected with the drain electrode of COMS pipe M9, the drain electrode of COMS pipe M9 is connected with the source electrode of COMS pipe M12, source electrode is connected with the drain electrode of COMS pipe M11, and grid is connected with the source electrode of COMS pipe M8.

Further, be in series with COMS pipe M13 between the grid of described COMS pipe M8 and the COMS pipe M9 drain electrode, wherein the source electrode of COMS pipe M13 connects the grid of COMS pipe M8, and drain electrode connects the drain electrode of COMS pipe M9, and grid is connected with the grid of COMS pipe M9.

Again further, be parallel with COMS pipe M4, the M5 that is cascaded on the described COMS pipe M13, the source electrode of COMS pipe M4 connects voltage Vdd, drain electrode connects the source electrode of COMS pipe M5, the drain electrode of COMS pipe M5 is connected with the drain electrode of COMS pipe M9, and the grid of described COMS pipe M4, M5 all is connected with sampling clock CK.

Further, be in series with between capacitor C 1, COMS pipe M2 and the phase inverter CKB between described COMS pipe M1 and the phase inverter CKB and be in series with capacitor C 2 and sampling clock CK, be in series with capacitor C 3 between COMS pipe M3 and the COMS pipe M12.

Compared with prior art, usefulness of the present invention is: this bootstrapping sampling switch circuit is fast to the charging rate of node, and the charge injection when the different moment, switching tube was closed is the same, and the sampling error relevant with input is little, has improved the system linear degree.

Description of drawings:

The present invention is further described below in conjunction with accompanying drawing.

Fig. 1 is the circuit diagram of prior art bootstrapping sampling switch circuit;

Fig. 2 is a kind of bootstrapping sampling switch circuit of the present invention block diagram;

Fig. 3 is the circuit diagram of a kind of sampling switch circuit of booting of the present invention.

Among the figure: 1, charge pump; 2, main switch; 21, output; 22, input.

Embodiment:

Describe the present invention below in conjunction with the drawings and specific embodiments.

Fig. 2 and a kind of bootstrapping sampling switch circuit shown in Figure 3, has charge pump 1, the electric capacity 3 of connecting between in parallel sampling clock CK and the main switch 2 on the described charge pump 1, described sampling clock CK and charge pump 1 is in series with a phase inverter CKB between main switch 2 and the charge pump 1; Described main switch 2 comprises COMS pipe M11, output 21 and input 22, and described output 21 connects the source electrode of COMS pipe M11, and input 22 connects the drain electrode of COMS pipe M11, and the grid of described COMS pipe M11 is connected between charge pump 1 and the electric capacity 3; Described charge pump 1 comprises COMS pipe M1, M2, M3, M4, M5, M8, M9, M12, M13, capacitor C 1, C2, C3 and sampling clock CK, described COMS pipe M1, M2, M3 is in parallel, COMS manages M1, M2, the source electrode of M3 connects voltage Vdd, the grid of COMS pipe M1 connects the drain electrode of COMS pipe M2, the grid of COMS pipe M2 connects the drain electrode of COMS pipe M1, the grid of COMS pipe M3 is connected with the grid of COMS pipe M2, COMS manages M1, the drain electrode of M2 connects phase inverter CKB, the drain electrode of COMS pipe M3 connects the source electrode of COMS pipe M12, the grid of COMS pipe M12 is connected with phase inverter CKB, the grounded drain of COMS pipe M12; And be in series with between capacitor C 1, COMS pipe M2 and the phase inverter CKB between described COMS pipe M1 and the phase inverter CKB and be in series with capacitor C 2 and sampling clock CK, be in series with capacitor C 3 between COMS pipe M3 and the COMS pipe M12; Described COMS pipe M8, M9 are connected in parallel between COMS pipe M3, the M12, the source electrode of COMS pipe M8 is connected with the drain electrode of COMS pipe M3, drain electrode is connected with electric capacity 3, grid is connected with the drain electrode of COMS pipe M9, the drain electrode of COMS pipe M9 is connected with the source electrode of COMS pipe M12, source electrode is connected with the drain electrode of COMS pipe M11, and grid is connected with the source electrode of COMS pipe M8; Be in series with COMS pipe M13 between the grid of described COMS pipe M8 and the COMS pipe M9 drain electrode, wherein the source electrode of COMS pipe M13 connects the grid of COMS pipe M8, and drain electrode connects the drain electrode of COMS pipe M9, and grid is connected with the grid of COMS pipe M9; Be parallel with COMS pipe M4, the M5 that is cascaded on the described COMS pipe M13, the source electrode of COMS pipe M4 connects voltage Vdd, drain electrode connects the source electrode of COMS pipe M5, and the drain electrode of COMS pipe M5 is connected with the drain electrode of COMS pipe M9, and the grid of described COMS pipe M4, M5 all is connected with sampling clock CK.

During work, electric capacity 3 will at switch by closing when transferring conducting to, be drawn high the grid of COMS pipe M11 fast.Switch transfers to when cutting out by conducting, fast the grid of COMS pipe M11 is dragged down; The conducting closing process of each pipe of Effective Raise, the bandwidth of increase circuit guarantees that circuit can high speed operation.

It is emphasized that: above only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, every foundation technical spirit of the present invention all still belongs in the scope of technical solution of the present invention any simple modification, equivalent variations and modification that above embodiment does.

Claims

One kind the bootstrapping sampling switch circuit, it is characterized in that: have charge pump (1), described charge pump (1) upper in parallel sampling clock (CK) and main switch (2), the electric capacity (3) of connecting between described sampling clock (CK) and the charge pump (1) is in series with a phase inverter (CKB) between main switch (2) and the charge pump (1); Described main switch (2) comprises COMS pipe (M11), output (21) and input (22), described output (21) connects the source electrode of COMS pipe (11), input (22) connects the drain electrode of COMS pipe (11), and the grid of described COMS pipe (11) is connected between charge pump (1) and the electric capacity (3).
2. bootstrapping sampling switch circuit according to claim 1, it is characterized in that: described charge pump (1) comprises COMS pipe (M1, M2, M3, M4, M5, M8, M9, M12, M13), electric capacity (C1, C2, C3) and sampling clock (CK), described COMS pipe (M1, M2, M3) parallel connection, COMS manages (M1, M2, M3) source electrode connects voltage (Vdd), the grid of COMS pipe (M1) connects the drain electrode of COMS pipe (M2), the grid of COMS pipe (M2) connects the drain electrode of COMS pipe (M1), the grid of COMS pipe (M3) is connected with the grid of COMS pipe (M2), COMS manages (M1, M2) drain electrode connects phase inverter (CKB), the drain electrode of COMS pipe (M3) connects the source electrode of COMS pipe (M12), the grid of COMS pipe (M12) is connected with phase inverter (CKB), the grounded drain of COMS pipe (M12); Described COMS pipe (M8, M9) is connected in parallel between the COMS pipe (M3, M12), the source electrode of COMS pipe (M8) is connected with the drain electrode of COMS pipe (M3), drain electrode is connected with electric capacity (3), grid is connected with the drain electrode of COMS pipe (M9), the drain electrode of COMS pipe (M9) is connected with the source electrode of COMS pipe (M12), source electrode is connected with the drain electrode of COMS pipe (M11), and grid is connected with the source electrode of COMS pipe (M8).
3. bootstrapping sampling switch circuit according to claim 2, it is characterized in that: be in series with COMS pipe (M13) between the grid of described COMS pipe (M8) and COMS pipe (M9) drain electrode, wherein the source electrode of COMS pipe (M13) connects the grid of COMS pipe (M8), drain electrode connects the drain electrode of COMS pipe (M9), and grid is connected with the grid of COMS pipe (M9).
4. bootstrapping sampling switch circuit according to claim 3, it is characterized in that: be parallel with the COMS pipe (M4, M5) that is cascaded on the described COMS pipe (M13), the source electrode of COMS pipe (M4) connects voltage (Vdd), drain electrode connects the source electrode of COMS pipe (M5), the drain electrode of COMS pipe (M5) is connected with the drain electrode of COMS pipe (M9), and the grid of described COMS pipe (M4, M5) all is connected with sampling clock (CK).
5. bootstrapping sampling switch circuit according to claim 2, it is characterized in that: be in series with between described COMS pipe (M1) and the phase inverter (CKB) between electric capacity (C1), COMS pipe (M2) and the phase inverter (CKB) and be in series with electric capacity (C2) and sampling clock (CK), be in series with electric capacity (C3) between COMS pipe (M3) and the COMS pipe (M12).