CN103324768A - Quickly marking method of schematic circuit diagram - Google Patents
Quickly marking method of schematic circuit diagram Download PDFInfo
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- CN103324768A CN103324768A CN2012100755074A CN201210075507A CN103324768A CN 103324768 A CN103324768 A CN 103324768A CN 2012100755074 A CN2012100755074 A CN 2012100755074A CN 201210075507 A CN201210075507 A CN 201210075507A CN 103324768 A CN103324768 A CN 103324768A
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Abstract
The invention relates to a quickly marking method of a schematic circuit diagram. The method comprises the following steps: at first, a parameter module is manufactured by parameters needing to be marked, wherein the parameter module comprises parameter information and parameter port information, then related devices corresponding to the parameter module as well as the connection relations of the related devices in the schematic circuit diagram are deleted, next, the parameter module is added in the schematic circuit diagram, and finally, the connection information of the parameter module is added in the schematic circuit diagram to realize the quick marking to the schematic circuit diagram. Through the adoption of the quickly marking method, the hand-manipulated workload of a designer can be reduced, the marking efficiency of the schematic circuit diagram can be improved greatly, and the quickly marking method has good compatibility, and is simple and easy to operate.
Description
Technical field
The present invention relates to a kind of quick mask method of circuit theory diagrams, especially in the design process of radio frequency integrated circuit.
Background technology
Radio frequency integrated circuit refers to use the radio circuit of semiconductor integrated circuit technique fabrication techniques, has a volume little, low in energy consumption, the reliability high.Common radio circuit has: low noise amplifier, power amplifier, oscillator, frequency mixer etc., frequency of operation from hundreds of MHz to several GHz, tens GHz do not wait, and are the very important signal processing modules of Wireless Telecom Equipment, its performance quality directly affects product quality.
In recent years, the wireless communication technology development is rapid, and wireless product is widely used in the various aspects of people's life, and radio frequency integrated circuit is also had higher requirement, and requires to have more excellent signal handling capacity and shorter product development cycle.
Radio frequency integrated circuit mainly is made of passive devices such as transistor active device and inductance capacitances, according to traditional method for designing, the deviser at first formulates the performance parameter of radio frequency integrated circuit according to system requirements, determine circuit structure picture schematic diagram, the parameter designing of determining schematic diagram with circuit simulation is correct, again according to circuit theory picture domain, finishing the contrast that needs to carry out domain and schematic diagram after the domain verifies, to determine the correctness of domain, then extract the parasitic parameter of domain and do post-simulation, if the result of post-simulation is undesirable, then return the schematic diagram optimal design parameter, revise simultaneously corresponding domain, then continue to extract the parasitic parameter of domain and do post-simulation, just send foundries to make chip if the result of post-simulation reaches the Expected Results of design.
Yet traditional method for designing is subject to the variation that it can't the Consideration of Three-dimensional electromagnetic field, so in the high frequency field, be difficult to provide accurate simulation result.So a lot of devisers improve the design that adopts integrated circuit (IC) design to combine with 3 D electromagnetic field simulation analysis in the method for traditional radio frequency integrated circuit design.After domain was finished, the extracting section that needs are done Three-Dimensional Electromagnetic Field Analysis out was made into three-dimensional model, then carries out emulation by electromagnetic field analysis, simulation result is marked in the original design verify at last.
This method for designing can obtain the emulation degree of accuracy higher than traditional method for designing, but the parameter of simulated extraction marked needs in the primary circuit that the deviser is manual to derive the Parameter File that extracts from a software platform, then import to another software platform, and to revise primary circuit figure, this process is very loaded down with trivial details, not only increase deviser's workload, and reduced the design efficiency of integrated circuit.
Summary of the invention
Technical matters to be solved by this invention provides a kind ofly can save the manual workload of deviser, can greatly improve again the quick mask method of circuit theory diagrams of the mark efficient of circuit theory diagrams.
The present invention is in order to solve the problems of the technologies described above by the following technical solutions: the present invention has designed a kind of quick mask method of circuit theory diagrams, and the method comprises the steps:
(1) makes a parameter module according to obtaining parameter information behind the complete domain of emulation, comprise the s parameter, the annexation of port number and each port;
(2) in the deletion circuit theory diagrams with parameter module in corresponding relevant components and parts and the annexation between components and parts;
(3) according to the information of circuit theory diagrams, determine the position of parameter module in circuit theory diagrams, parameter module is added in the circuit theory diagrams;
(4) according to the annexation of each port in the parameter module, in circuit theory diagrams, find corresponding annexation, and create a corresponding annexation at each port.
As a kind of optimal technical scheme of the present invention: in described step (2) deletion circuit theory diagrams, before the related device corresponding with parameter module, under the catalogue of current circuit theory diagrams, preserve the backup copies of a circuit theory diagrams.
The quick mask method of a kind of circuit theory diagrams of the present invention adopts above technical scheme compared with prior art, has following technique effect:
(1) in the situation that do not change circuit theory diagrams, realized the fast work of mark of electrical schematic diagram, thereby improved the efficient of circuit design;
(2) have good compatibility between the quick mask method of circuit theory diagrams of the present invention design and the traditional design cycle, and operate simple and easy.
Description of drawings
Fig. 1 is method flow diagram of the present invention.
Embodiment
Below in conjunction with Figure of description the specific embodiment of the present invention is described in further detail.
As shown in Figure 1, the present invention has designed a kind of quick mask method of circuit theory diagrams, and the method comprises the steps:
(1) makes a parameter module according to obtaining parameter information behind the complete domain of emulation, comprise the s parameter, the annexation of port number and each port;
(2) in the deletion circuit theory diagrams with parameter module in corresponding relevant components and parts and the annexation between components and parts;
(3) according to the information of circuit theory diagrams, determine the position of parameter module in circuit theory diagrams, parameter module is added in the circuit theory diagrams;
(4) according to the annexation of each port in the parameter module, in circuit theory diagrams, find corresponding annexation, and create a corresponding annexation at each port.
As a kind of optimal technical scheme of the present invention: in described step (2) deletion circuit theory diagrams, before the related device corresponding with parameter module, under the catalogue of current circuit theory diagrams, preserve the backup copies of a circuit theory diagrams.
In concrete integrated circuit (IC) design, the deviser at first formulates the performance parameter of radio frequency integrated circuit according to system requirements, determine circuit structure and draw circuit theory diagrams, whether the parameter designing of determining circuit theory diagrams with circuit simulation is correct, draw domain according to circuit theory diagrams again, then, the extracting section that the deviser can make needs Three-Dimensional Electromagnetic Field Analysis out, be made into three-dimensional model, and carry out emulation by electromagnetic field analysis, need at last simulation result marked in the circuit theory diagrams of original design and verify, at this moment, the mark process adopts the quick mask method of circuit theory diagrams of the present invention's design to carry out, extract the parameter in the simulation result, and parameter is made into a parameter module, this parameter module comprises the port information of parameter information and parameter, then preserve the backup copies of a circuit theory diagrams, can guarantee like this has a circuit theory diagrams can not be modified because of mark, be convenient to after using simulation result to carry out the overall circuit performance simulating, verifying, circuit is made amendment or redesign by the backup copies of circuit theory diagrams.Behind the backup copies of having preserved a circuit theory diagrams, circuit theory diagrams are made amendment, the related device corresponding with parameter module in the deletion circuit theory diagrams, then, parameter module is added in the circuit theory diagrams, last link information of in circuit theory diagrams, adding parameter module, owing to having comprised the port information of parameter in the parameter module, so can realize the exact connect ion of parameter module and circuit, thereby finished the mark work of circuit theory diagrams, afterwards, just can carry out simulating, verifying to overall circuit performance, according to the result of simulating, verifying, the backup copies of the circuit theory diagrams preserved is made amendment or redesigned.
The quick mask method of a kind of circuit theory diagrams of the present invention's design can be saved the manual workload of deviser, can greatly improve the mark efficient of circuit theory diagrams again, and have good compatibility, and operate simple and easy.
The above has done detailed description to embodiments of the present invention by reference to the accompanying drawings, but the present invention is not limited to above-mentioned embodiment, in the ken that those of ordinary skills possess, can also make a variety of changes under the prerequisite that does not break away from aim of the present invention.
Claims (2)
1. the quick mask method of circuit theory diagrams, it is characterized in that: the method comprises the steps:
(1) makes a parameter module according to obtaining parameter information behind the complete domain of emulation, comprise the s parameter, the annexation of port number and each port;
(2) in the deletion circuit theory diagrams with parameter module in corresponding relevant components and parts and the annexation between components and parts;
(3) according to the information of circuit theory diagrams, determine the position of parameter module in circuit theory diagrams, parameter module is added in the circuit theory diagrams;
(4) according to the annexation of each port in the parameter module, in circuit theory diagrams, find corresponding annexation, and create a corresponding annexation at each port.
2. the quick mask method of described a kind of circuit theory diagrams according to claim 1, it is characterized in that: before described step (2) is deleted related device corresponding with parameter module in the circuit theory diagrams, under the catalogue of current circuit theory diagrams, preserve the backup copies of a circuit theory diagrams.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100755074A CN103324768A (en) | 2012-03-21 | 2012-03-21 | Quickly marking method of schematic circuit diagram |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012100755074A CN103324768A (en) | 2012-03-21 | 2012-03-21 | Quickly marking method of schematic circuit diagram |
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| CN103324768A true CN103324768A (en) | 2013-09-25 |
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| CN2012100755074A Pending CN103324768A (en) | 2012-03-21 | 2012-03-21 | Quickly marking method of schematic circuit diagram |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105740487A (en) * | 2014-12-09 | 2016-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for verifying consistency between layout and schematic on basis of process design kit |
| CN112199918A (en) * | 2020-10-20 | 2021-01-08 | 芯和半导体科技(上海)有限公司 | Method for reconstructing physical connection relation of general EDA model layout |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1858751A (en) * | 2005-11-08 | 2006-11-08 | 华为技术有限公司 | Method for printed circuit board power completeness simulation |
| CN1924872A (en) * | 2005-09-01 | 2007-03-07 | 北京中电华大电子设计有限责任公司 | Back marking/analyzing flow for integrated circuit drawing parasitic parameter |
| US7386823B2 (en) * | 2005-07-20 | 2008-06-10 | Springsoft, Inc. | Rule-based schematic diagram generator |
| CN101663665A (en) * | 2008-04-18 | 2010-03-03 | 英赛特半导体有限公司 | Method of deriving an integrated circuit schematic diagram |
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2012
- 2012-03-21 CN CN2012100755074A patent/CN103324768A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7386823B2 (en) * | 2005-07-20 | 2008-06-10 | Springsoft, Inc. | Rule-based schematic diagram generator |
| CN1924872A (en) * | 2005-09-01 | 2007-03-07 | 北京中电华大电子设计有限责任公司 | Back marking/analyzing flow for integrated circuit drawing parasitic parameter |
| CN1858751A (en) * | 2005-11-08 | 2006-11-08 | 华为技术有限公司 | Method for printed circuit board power completeness simulation |
| CN101663665A (en) * | 2008-04-18 | 2010-03-03 | 英赛特半导体有限公司 | Method of deriving an integrated circuit schematic diagram |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105740487A (en) * | 2014-12-09 | 2016-07-06 | 中芯国际集成电路制造(上海)有限公司 | Method for verifying consistency between layout and schematic on basis of process design kit |
| CN105740487B (en) * | 2014-12-09 | 2019-08-23 | 中芯国际集成电路制造(上海)有限公司 | Domain and schematic diagram consistency verification method based on Process design kit |
| CN112199918A (en) * | 2020-10-20 | 2021-01-08 | 芯和半导体科技(上海)有限公司 | Method for reconstructing physical connection relation of general EDA model layout |
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Application publication date: 20130925 |