CN103314362B - 用于数据流的基于向量的匹配电路 - Google Patents
用于数据流的基于向量的匹配电路 Download PDFInfo
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- CN103314362B CN103314362B CN201180060627.0A CN201180060627A CN103314362B CN 103314362 B CN103314362 B CN 103314362B CN 201180060627 A CN201180060627 A CN 201180060627A CN 103314362 B CN103314362 B CN 103314362B
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2757—Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Human Computer Interaction (AREA)
- Complex Calculations (AREA)
- Mobile Radio Communication Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP10195792.6 | 2010-12-17 | ||
EP10195792A EP2466472A1 (en) | 2010-12-17 | 2010-12-17 | Vector-based matching circuit for data streams |
US201161432824P | 2011-01-14 | 2011-01-14 | |
US61/432,824 | 2011-01-14 | ||
PCT/EP2011/073098 WO2012080484A1 (en) | 2010-12-17 | 2011-12-16 | Vector-based matching circuit for data streams |
Publications (2)
Publication Number | Publication Date |
---|---|
CN103314362A CN103314362A (zh) | 2013-09-18 |
CN103314362B true CN103314362B (zh) | 2016-09-21 |
Family
ID=43923362
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201180060627.0A Active CN103314362B (zh) | 2010-12-17 | 2011-12-16 | 用于数据流的基于向量的匹配电路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9058108B2 (zh) |
EP (1) | EP2466472A1 (zh) |
CN (1) | CN103314362B (zh) |
WO (1) | WO2012080484A1 (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9405538B2 (en) * | 2012-12-28 | 2016-08-02 | Intel Corporation | Functional unit having tree structure to support vector sorting algorithm and other algorithms |
US10879936B2 (en) * | 2018-08-23 | 2020-12-29 | Keysight Technologies, Inc. | Methods, systems, and computer readable media for de-interleaving data in a communication system |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0282070A2 (en) * | 1987-03-13 | 1988-09-14 | Fujitsu Limited | Vector access to memories |
CN1595910A (zh) * | 2004-06-25 | 2005-03-16 | 中国科学院计算技术研究所 | 一种网络处理器的数据包接收接口部件及其存储管理方法 |
CN1914869A (zh) * | 2004-06-16 | 2007-02-14 | Lg电子株式会社 | 用于处理无线协议层的数据单元的系统 |
CN101043284A (zh) * | 2007-04-10 | 2007-09-26 | 中兴通讯股份有限公司 | 一种宽带码分多址系统中turbo编码器内的交织器 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1989003091A1 (en) | 1987-09-25 | 1989-04-06 | Hitachi, Ltd. | Method of sorting vector data and a vector processor adapted thereto |
US5822557A (en) * | 1991-12-27 | 1998-10-13 | Fujitsu Limited | Pipelined data processing device having improved hardware control over an arithmetic operations unit |
US6434587B1 (en) | 1999-06-14 | 2002-08-13 | Intel Corporation | Fast 16-B early termination implementation for 32-B multiply-accumulate unit |
US7116663B2 (en) | 2001-07-20 | 2006-10-03 | Pmc-Sierra Ltd. | Multi-field classification using enhanced masked matching |
US8135897B2 (en) * | 2006-05-16 | 2012-03-13 | St-Ericsson Sa | Memory architecture |
US9207738B2 (en) | 2008-02-25 | 2015-12-08 | St-Ericsson Sa | Data processing device with adjustable performance level and method of operating such device |
EP2283578A1 (en) | 2008-05-21 | 2011-02-16 | Nxp B.V. | A data handling system comprising memory banks and data rearrangement |
WO2009141787A1 (en) | 2008-05-21 | 2009-11-26 | Nxp B.V. | A data handling system comprising a rearrangement network |
US8209525B2 (en) | 2008-08-15 | 2012-06-26 | Apple Inc. | Method and apparatus for executing program code |
-
2010
- 2010-12-17 EP EP10195792A patent/EP2466472A1/en not_active Withdrawn
-
2011
- 2011-12-16 WO PCT/EP2011/073098 patent/WO2012080484A1/en active Application Filing
- 2011-12-16 CN CN201180060627.0A patent/CN103314362B/zh active Active
- 2011-12-16 US US13/992,837 patent/US9058108B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0282070A2 (en) * | 1987-03-13 | 1988-09-14 | Fujitsu Limited | Vector access to memories |
CN1914869A (zh) * | 2004-06-16 | 2007-02-14 | Lg电子株式会社 | 用于处理无线协议层的数据单元的系统 |
CN1595910A (zh) * | 2004-06-25 | 2005-03-16 | 中国科学院计算技术研究所 | 一种网络处理器的数据包接收接口部件及其存储管理方法 |
CN101043284A (zh) * | 2007-04-10 | 2007-09-26 | 中兴通讯股份有限公司 | 一种宽带码分多址系统中turbo编码器内的交织器 |
Also Published As
Publication number | Publication date |
---|---|
WO2012080484A1 (en) | 2012-06-21 |
US20130305001A1 (en) | 2013-11-14 |
EP2466472A1 (en) | 2012-06-20 |
US9058108B2 (en) | 2015-06-16 |
CN103314362A (zh) | 2013-09-18 |
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Effective date of registration: 20160825 Address after: Stockholm Applicant after: Telefonaktiebolaget LM Ericsson (publ) Address before: Stockholm Applicant before: Ericsson, Inc. Effective date of registration: 20160825 Address after: Stockholm Applicant after: Ericsson, Inc. Address before: Swiss Grand saconnex Applicant before: ST-ERICSSON S.A. Effective date of registration: 20160825 Address after: Swiss Grand saconnex Applicant after: ST-ERICSSON S.A. Address before: Swiss Prang Eli Ute Applicant before: Italian-French Ericsson Limited (in liquidation) |
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