CN103280431A - Method for preparing ultrahigh-density monolayer nanocrystalline memorizer - Google Patents
Method for preparing ultrahigh-density monolayer nanocrystalline memorizer Download PDFInfo
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
- C23C16/0281—Deposition of sub-layers, e.g. to promote the adhesion of the main coating of metallic sub-layers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
- C23C16/45523—Pulsed gas flow or change of composition over time
- C23C16/45525—Atomic layer deposition [ALD]
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- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Semiconductor Memories (AREA)
Abstract
The invention discloses a method for preparing an ultrahigh-density monolayer nanocrystalline memorizer. The method includes the steps that first, a high-dielectric-permittivity tunneling layer with a thickness of 3-10nm is grown on a clean semiconductor substrate with the method of ALD to form a high-dielectric-permittivity film; then, the high-dielectric-permittivity film is dip-coated or spin-coated with controllable metal nanoparticles which are good in monodispersity, and an orderly-arranged monolayer nanoparticle lattice is formed through self-assembly, wherein the particle size of the metal nanoparticles is 3-8nm; at last, the surface of the monolayer nanoparticle lattice is covered with a high-dielectric-permittivity material control layer with a thickness of 10-30nm with the method of ALD. According to the method for preparing the ultrahigh-density monolayer nanocrystalline memorizer, advantages of a wet chemistry method in compounding the metal nanoparticles which are controllable in size and good in monodispersity are utilized, the orderly-arranged monolayer metal nanoparticle lattice is formed through self-assembly with the low-cost method of dip coating or spin coating, then the high-dielectric-permittivity material control layer with the thickness of 10-30nm is grown with the method of ALD, and then preparation of the ultrahigh-density monolayer nanocrystalline memorizer is achieved.
Description
Technical field
The present invention relates to super-high density nonvolatile storage technologies field, specifically be a kind of preparation method of super-high density individual layer nano-crystal memory, the approach that this method utilizes the self assembly of the synthetic nano particle of wet chemistry method to combine with technique for atomic layer deposition, prepare orderly individual layer nano particle and high dielectric material laminated film, thereby realize nanocrystalline memory function.
Background technology
Progress along with science and technology, nonvolatile memory (Non Volatile Memeries, NVM) in various electronic products, serving as indispensable role because of it still preserving data after the outage, be found everywhere in the portable electric appts such as PC, mobile phone, in-vehicle electronic system, MP3.Wherein, floating-gate memory (Flash) becomes main product and representative art in the storage market with its advantage on memory capacity, manufacturing cost and power consumption.But traditional floating-gate memory is under the situation of the continuous miniaturization of semiconductor technology, and the device stacking,vertical is faced with formidable challenges.Especially exist very big contradiction between tunnel oxide layer thickness and the electric charge hold facility.Device carry out repeatedly erasable after, will inevitably in tunnel oxide, produce defective, if oxide layer is too thin, these defectives make that with regard to leakage path of easy formation the information be stored in the multi-crystal silicon floating bar all runs off.In addition, dwindling of size also can allow the distance between the consecutive storage unit more and more nearer, and allow between the multi-crystal silicon floating bar influence each other more obvious.
As a kind of improvement technical scheme, the concept of discrete electric charge capture storage (Discrete Charge Trapping Storage) is suggested, and has solved the technical bottleneck that traditional floating-gate memory faces.Charge storage in the discrete trapped-charge memory disperses, even form the loss that a leak channel also only can cause local storage information in the tunnel oxide, makes that reduction of device size becomes possibility by attenuate tunnel oxide layer thickness.
Nano-crystal memory is the representative structure of discrete electric charge capture storage, by introducing discrete nano-crystalline granule stored charge to realize the mutual isolation of memory node.Since the S. of IBM Corporation Tiwari after proposing this structure first in 1996, nano-crystal memory is owing to its excellent data retention characteristics becomes traditional floating-gate memory replacer likely.Up to the present, the nanocrystalline material with different band structures has been studied shape and the degree of depth in order to modulated charge storage trap widely, as semiconductor nano, metallic nano crystal, compound nano is brilliant and heterogeneous nanocrystalline etc.
On the one hand, metallic nano crystal is density of states height near Fermi level, has wide work function range of choice, there is not the multidimensional effect of carrier confinement, with raceway groove stronger coupling is arranged, have the band structure extremely close with metallic body materials, come balanced programming and retention at tunnel layer and nanocrystalline the asymmetric potential barrier of easier realization.Thereby the flash memory that substitutes continuous floating boom with metallic nano crystal becomes hot research in recent years.The main technique that metallic nano crystal forms has to separate out with the codeposition afterreaction behind thermal annealing behind the thin metal layer, the codeposition to be separated out.These methods or be difficult to form discrete fully nanocrystalline, or are difficult to control the size of particle and distribute.
On the other hand, all the time, the gate oxide of basic unit's circuit is all selected the silicon dioxide (perhaps silica nitrogen) of heat growth.Yet in order to keep the scaled down of gate capacitance, the silicon dioxide gate oxide thickness is faced with physics limit.For the application of flash memory, want to guarantee the data holding ability in 10 years, for the generation of avoiding direct tunnelling with overcome repeatedly the electric leakage that stress causes in the program/erase operations (SILC), tunnel oxide must have certain physical thickness.So ITRS (ITRS) has been introduced high-k (high-k) material in 2005, be used for replacing silicon dioxide.
(Atomic layer deposition ALD), is a kind of just new material deposition technique in flourish to technique for atomic layer deposition, and it can be used for accurately controlling the growth of high dielectric constant material layer.Since calendar year 2001 international semiconductor TIA with ALD and metal organic chemical vapor deposition (MOCVD), plasma enhanced CVD side by side as with the candidate technologies of microelectronic technique compatibility since, the ALD recent years comes growth momentum powerful.Why technique for atomic layer deposition is subjected to the favor of microelectronics industry and field of nano material preparation, and these growing principle and characteristics with its uniqueness are inseparable.Ald is to react film forming a kind of method by the pulse of gas phase presoma alternately being fed reactor and at the deposition matrix surface chemisorbed taking place, because its surface reaction has the characteristics from restriction (Self-limiting), so ALD has excellent three-dimensional stickiness (Conformality) and large-area uniformity; Accurately, simple film thickness monitoring (only relevant with the reaction cycle number of times); Low depositing temperature (room temperature~400 oC); The layer structure (Nanolaminates) that is fit to many group members of modifying interface and preparation nanoscale; Low deposition rate (1~2 nm/min); Have stable process window, between this window region, deposition is insensitive to temperature, changes in flow rate.The ALD technology is now in fields such as microelectronics, photoelectron, catalysis, flat-panel monitors, and the structure that particularly relates to nanoscale prepares huge advantage and application prospect, and the research of ALD vigorously launches with application.
Summary of the invention
Technical problem to be solved by this invention is at the bottleneck problem in the nano-crystal memory preparation in the past, a kind of preparation method of nano-crystal memory of innovation has been proposed, this method utilizes the self assembly of the synthetic nano particle of wet chemistry method to combine with technique for atomic layer deposition, prepare the nano-crystal memory of super-high density, excellent memory property, and this method technology is simple, with low cost, application prospect is good.
The preparation method of a kind of super-high density individual layer nano-crystal memory of the present invention, it may further comprise the steps:
1) uses the ALD method at the clean thick high dielectric tunnel layer of Semiconductor substrate growth one deck 3 ~ 10 nm earlier, form high dielectric thin film;
2) then 3~8 nm particle diameters are controlled, single scattered metal nanoparticle immersion coating or be spin-coated on the high dielectric thin film is self-assembled into the individual layer nano particle dot matrix of orderly arrangement;
3) last recycling ALD method is at the high dielectric material key-course of individual layer nano particle dot matrix surface coverage one deck 10 ~ 30 nm thickness.
The described Semiconductor substrate of step 1) is Si, Ge or GaAs substrate, and high dielectric tunnel layer is Al2O3, HfO2, ZrO2, Y2O3, La2O3 or Gd2O3 tunnel layer.
Step 2) described metal nanoparticle is FePt, Au or Ag.
Self assembly and the ALD low temperature depositing dielectric film technology of the single dispersion metal nano particle that the present invention is synthetic with wet chemistry method organically combine, utilize wet chemistry method in synthetic controlled amount, the advantage of the metal nanoparticle aspect that monodispersity is good, by the immersion coating of cheapness or the method for spin coating, the orderly metal nanoparticle of self-assembled monolayer (size 3-8 nanometer) dot matrix on the ultra-thin high dielectric film layer of ALD deposition, and then the ALD layer thickness of growing is the high dielectric thin film key-course of 10~30 nanometers, realizes a kind of preparation of super-high density individual layer nano-crystal memory.By using this technology, obtained to comprise the high dielectric laminated film nano-crystal storage capacitor device of individual layer high-density metal nano-particle layer, show excellent memory property, bigger operation window, storage density can reach the Tbit magnitude.This preparation method, technology is simple, for combine application in the nanocrystalline storage of super-high density individual layer of the synthetic single dispersion metal nano particle of wet chemistry method and ALD, provides a kind of feasible path.
Description of drawings
Fig. 1 is the flow chart of nano-crystal memory preparation technology embodiment, and this embodiment is example with metal FePt nano particle and Al2O3 film composite structure nano-crystal memory.
Fig. 2 is self assembly FePt nano particle on the ALD depositing Al 2O3 ultrathin membrane substrate, the atomic force microscope AFM photo of 500 oC annealing after 5 minutes in oxygen atmosphere.
Fig. 3 is that (Fig. 3 a) and high-resolution-ration transmission electric-lens (HRTEM) plane picture (Fig. 3 b) for the transmission electron microscope (TEM) that self assembly forms individual layer FePt nano particle on ALD depositing Al 2O3 ultrathin membrane; The 500 oC annealing after 5 minutes in oxygen atmosphere of self assembly FePt nano particle, ALD sectional view transmission electron microscope picture (Fig. 3 c) and the high-resolution-ration transmission electric-lens figure (Fig. 3 d) of the formed laminated film of 22 nanometer Al2O3 key-courses that grow again.
Fig. 4 is the memory window (capacitance voltage scanning loop line) of Al2O3/ FePt/ Al2O3/Si nano-crystal memory.
Embodiment
The invention will be further described below in conjunction with embodiment.
Embodiment 1:
Idiographic flow is as shown in Figure 1:
The deposition of the high dielectric tunnel layer of step 1): utilize reported in literature ALD sedimentary condition high dielectric Al2O3 tunnel layer of depositing ultrathin (3 ~ 10 nm) on the n type Si substrate that cleans up of maturation.Common ALD depositing Al 2O3 parameter is:
Reaction chamber temperature: 150 oC ~ 300 oC;
Reaction source: depositing Al 2O3 adopts Al (CH3) 3 and H2O, and source temperature Al (CH3) 3 and H2O are room temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.1 ~ 0.3 s; After each source metal pulse, all and then clean 4 ~ 10 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
Step 2) the FePt metal nanoparticle is synthetic: utilize reported in literature ripe chemical solution synthetic method prepare controlled, the single scattered FePt nano particle of particle diameter.Here we adopt the most frequently used " alcoholysis method ", and with raw material acetylacetone,2,4-pentanedione platinum, iron pentacarbonyl is dissolved in the solvent diphenyl ether; oleic acid is surfactant; oleic acid amine is stabilizer, and 220~250 ° of C are under nitrogen protection, and reaction forms even, the single scattered FePt nano particle of particle diameter.
The self assembly of step 3) FePt nano particle: on the Si substrate of clean ALD growth Al2O3 ultrathin membrane, can adopt common immersion coating method or spin-coating method to realize the self assembly of FePt nano particle, by control process conditions (as spin coating rotating speed, solvent, metal nanoparticle solution concentration etc.), be self-assembled into the orderly dot matrix of highdensity individual layer FePt nano particle at substrate.As adopting the immersion coating method, concrete steps are as follows: the mixed liquor (volume ratio is 0/2~1/2) of preparation hexane/octane, in mixed liquor, it is 1~6 mg/mL that the mixed liquor of this moment contains the FePt concentrations of nanoparticles with the FePt nanoparticulate dispersed.Recycling immersion coating legal system is equipped with the oldered array of FePt nano particle.Behind the immersion coating, substrate needs to keep 5~10 minutes under 80~120 ° of C, guarantees that solvent volatilizees fully.
Fig. 2 is self assembly FePt nano particle on the ALD depositing Al 2O3 ultrathin membrane substrate, the atomic force microscope AFM photo of 500 oC annealing after 5 minutes in oxygen atmosphere.The sweep limits of image is 1 * 1 square micron.The variation of vertical direction height illustrates that the FePt nano particle of immersion coating has the structure of individual layer in 6 nanometers.Planar the FePt nano particle is closely arranged uniformly, the individual layer nano particle rete clear in structure of self assembly.Nanocrystalline density is up to 2 * 1012/ centimetre 2.
Fig. 3 is that self assembly forms (a) transmission electron microscope (TEM) of individual layer FePt nano particle and (b) high-resolution-ration transmission electric-lens (HRTEM) plane picture on ALD depositing Al 2O3 ultrathin membrane; The 500 oC annealing after 5 minutes in oxygen atmosphere of self assembly FePt nano particle, grow sectional view (c) transmission electron microscope picture of the formed laminated film of 22 nanometer Al2O3 key-courses and (d) high-resolution-ration transmission electric-lens figure of ALD again.The individual layer FePt nano particle of finding out self assembly from (a) figure has large-area uniformity; (b) figure is the amplification of the individual layer FePt nano particle plane picture of self assembly, and nano particle is arranged closely and evenly, the subregion shows orderly arrangement in the plane, also reflects the FePt nano particle crystallization that wet chemistry method is synthetic simultaneously; (c) cross-sectional image of figure laminated film, rete comprise the tunnel layer of 4 ~ 5 nm, the individual layer FePt nano particle of self assembly and the key-course of 22 nm, and laminated film thickness is even; (d) HRTEM shows FePt nano particle arrangement (fine pitch only is 2 ~ 3 nm between the particle), illustrates that 500 ℃ of annealing in the oxygen atmosphere do not destroy the self-assembled structures of FePt nano particle and verify that again the individual layer FePt nano particle of self assembly is compact arranged in layer.
The thermal anneal process of step 4) oven dry back FePt nano particle: the substrate that self assembly is contained the FePt nano particle had been connected with under the environment of oxygen atmosphere, 500 ° of C rapid thermal annealings 5 minutes.The purpose of rapid thermal annealing is to remove after the self assembly residual organic on the nano particle, comprises surfactants such as oleic acid.
The preparation of the high dielectric key-course of step 5) (barrier layer): thermal anneal process is crossed the substrate that contains the FePt nano particle put into the ALD reative cell, at the Al2O3 key-course of substrate surface ALD growth 10 ~ 30 nanometers that comprise the ultra-thin Al2O3 film of individual layer FePt/.The ALD sedimentary condition is identical with the condition of deposition during tunnel layer.
The preparation of step 6) top electrode and back electrode: in order to finish the measurement of electrical properties, by metal mask plate on composite film sputtering sedimentation one deck Pt (100 ~ 150 nm) as top electrode.Use the oxide on hydrofluoric acid flush away surface at the back side of substrate, be coated with again and be covered with conductive silver glue, dry to obtain good back of the body contact then.
Embodiment 2:
1, ALD growth HfO2 tunnel layer: 1.0 * 1.0 square centimeters Si substrate cleans through standard RCA, then with the deionized water of HF(1:20 volume ratio of dilution) soak the oxide of removing silicon chip surface in 3 minutes, the substrate that has cleaned is put into the ALD reative cell, at its surface deposition one deck 4 nanometer HfO2 films, form tunnel layer.The ALD deposition parameter of setting is:
Reaction chamber temperature: 250 ℃;
Reaction source: deposition HfO2 adopts Hf[N (CH3) 2] 4 (TDMAH) and H2O reaction, wherein to be 75 ℃ be room temperature with H2O source temperature to TDMAH source temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.1 s; After each source metal pulse, all and then clean 6 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
2, preparation individual layer FePt nano particle dot matrix: the 4.5nm iron platinum grain that will prepare in advance, dispersion liquid is octane, it is 2 mg/mL that the octane of this moment contains FePt.At room temperature, utilize the immersion coating method to form the individual layer FePt nano particle dot matrix of self assembly, then 100 ° of C bakings 5 minutes, 500 ° of C rapid thermal annealings 5 minutes in oxygen atmosphere at last.
3, ALD growth Al2O3 key-course: have the HfO2/Si substrate of FePt particle to put into the ALD reative cell surperficial self assembly, again at its surface deposition one deck 20 nanometer Al2O3 films, form key-course.The ALD deposition parameter of setting is:
Reaction chamber temperature: 200 ° of C;
Reaction source: depositing Al 2O3 adopts Al (CH3) 3 and H2O reaction, and wherein Al (CH3) 3 and H2O source temperature are room temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.1 s; After each source metal pulse, all and then clean 4 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
4, the preparation of top electrode and back electrode: by metal mask plate on composite film sputtering sedimentation one deck Pt (100 nm) as top electrode.Use the oxide on hydrofluoric acid flush away surface at the back side of substrate, be coated with again and be covered with conductive silver glue, dry to obtain good back of the body contact then.
Embodiment 3:
1, ALD growth Al2O3 tunnel layer: 1.0 * 1.0 square centimeters Si substrate cleans through standard RCA, then with the deionized water of HF(1:20 volume ratio of dilution) soak the oxide of removing silicon chip surface in 3 minutes, the substrate that has cleaned is put into the ALD reative cell, at its surface deposition one deck 4 nanometer Al2O3 films, form tunnel layer.The ALD deposition parameter of setting is:
Reaction chamber temperature: 300 ° of C;
Reaction source: depositing Al 2O3 adopts Al (CH3) 3 and H2O reaction, and wherein Al (CH3) 3 and H2O source temperature are room temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.1 s; After each source metal pulse, all and then clean 4 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
2, the Au metal nanoparticle is synthetic: utilize the chemical solution synthetic method of reported in literature to prepare controlled, the single scattered Au nano particle of particle diameter.The raw material chlorauride is dissolved in didodecyldimethylammbromide bromide (DDAB) solution, and toluene is dissolved in lauryl amine wherein as solvent again, mixes with the DDAB solution that has dissolved tetrabutyl ammonium borohydride (TBAB) then.DDAB is surfactant, and lauryl amine is stabilizer, and reaction forms even, the single scattered Au nano particle of particle diameter.
3, preparation individual layer Au nano particle dot matrix: the 4nm gold grain that will prepare in advance, dispersion liquid are toluene, and it is 2 mg/mL that the toluene of this moment contains Au.At room temperature, utilize the immersion coating method to form the individual layer Au nano particle dot matrix of self assembly, then 100 ° of C bakings 5 minutes, 500 ° of C rapid thermal annealings 5 minutes in nitrogen atmosphere at last.
4, ALD growth Al2O3 key-course: have the Al2O3/Si substrate of Au particle to put into the ALD reative cell surperficial self assembly, again at its surface deposition one deck 30 nanometer Al2O3 films, form key-course.The same first step of setting of ALD deposition parameter.
5, the preparation of top electrode and back electrode: by metal mask plate on composite film sputtering sedimentation one deck Pt (115 nm) as top electrode.Use the oxide on hydrofluoric acid flush away surface at the back side of substrate, be coated with again and be covered with conductive silver glue, dry to obtain good back of the body contact then.
Embodiment 4:
1, ALD growth ZrO2 tunnel layer: 1.0 * 1.0 square centimeters Si substrate cleans through standard RCA, then with the deionized water of HF(1:20 volume ratio of dilution) soak the oxide of removing silicon chip surface in 3 minutes, the substrate that has cleaned is put into the ALD reative cell, at its surface deposition one deck 4 nanometer ZrO2 films, form tunnel layer.The ALD deposition parameter of setting is:
Reaction chamber temperature: 300 ° of C;
Reaction source: deposition ZrO2 adopts Zr[N (CH3) 2] 4 (TDMAZ) and H2O reaction, wherein to be 75 ℃ be room temperature with H2O source temperature to TDMAZ source temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.2 s; After each source metal pulse, all and then clean 6 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
2, the Au metal nanoparticle is synthetic: utilize the chemical solution synthetic method of reported in literature to prepare controlled, the single scattered Au nano particle of particle diameter.The raw material chlorauride is dissolved in didodecyldimethylammbromide bromide (DDAB) solution, and toluene is dissolved in lauryl amine wherein as solvent again, mixes with the DDAB solution that has dissolved tetrabutyl ammonium borohydride (TBAB) then.DDAB is surfactant, and lauryl amine is stabilizer, and reaction forms even, the single scattered Au nano particle of particle diameter.
3, preparation individual layer Au nano particle dot matrix: the 4nm gold grain that will prepare in advance, dispersion liquid are toluene, and it is 2 mg/mL that the toluene of this moment contains Au.At room temperature, utilize the immersion coating method to form the individual layer Au nano particle dot matrix of self assembly, then 100 ° of C bakings 5 minutes, 500 ° of C rapid thermal annealings 5 minutes in nitrogen atmosphere at last.
4, ALD growth Al2O3 key-course: have the ZrO2/Si substrate of Au particle to put into the ALD reative cell surperficial self assembly, again at its surface deposition one deck 20 nanometer Al2O3 films, form key-course.The ALD deposition parameter of setting is:
Reaction chamber temperature: 300 ° of C;
Reaction source: depositing Al 2O3 adopts Al (CH3) 3 and H2O reaction, and wherein Al (CH3) 3 and H2O source temperature are room temperature;
Pulse and scavenging period: the pulse at source metal and water source all is 0.1 s; After each source metal pulse, all and then clean 4 s with high pure nitrogen, wash out byproduct of reaction and residual reaction source;
5, the preparation of top electrode and back electrode: by metal mask plate on composite film sputtering sedimentation one deck Pt (150 nm) as top electrode.Use the oxide on hydrofluoric acid flush away surface at the back side of substrate, be coated with again and be covered with conductive silver glue, dry to obtain good back of the body contact then.
Fig. 4 is the memory window (capacitance voltage scanning loop line) of Al2O3/ FePt/ Al2O3/Si nano-crystal memory.As seen, the wiping when programming when lower voltage just can make positive voltage and negative voltage all has the skew of bigger flat band voltage, obtained the big memory window of 8.1V under ± 8V voltage scanning.
The concrete application approach of the present invention is a lot, and the above only is preferred implementation of the present invention, should be understood that; for those skilled in the art; under the prerequisite that does not break away from the principle of the invention, can also make some improvement, these improvement also should be considered as protection scope of the present invention.
Claims (4)
1. the preparation method of a super-high density individual layer nano-crystal memory is characterized in that may further comprise the steps:
1) uses the ALD method at the clean thick high dielectric tunnel layer of Semiconductor substrate growth one deck 3 ~ 10 nm earlier, form high dielectric thin film;
2) adopt synthetic 3~8 metal nanoparticles that the nm particle diameter is controlled, monodispersity is good of wet chemistry method;
3) follow the metal nanoparticle immersion coating or be spin-coated on the high dielectric thin film, be self-assembled into the individual layer nano particle dot matrix of orderly arrangement;
4) last recycling ALD method is at the high dielectric material key-course of individual layer nano particle dot matrix surface coverage one deck 10 ~ 30 nm thickness.
2. the preparation method of super-high density individual layer nano-crystal memory according to claim 1 is characterized in that, the described Semiconductor substrate of step 1) is Si, Ge or GaAs substrate.
3. the preparation method of super-high density individual layer nano-crystal memory according to claim 1 is characterized in that, the described high dielectric tunnel layer of step 1) is Al
2O
3, HfO
2, ZrO
2, Y
2O
3, La
2O
3Or Gd
2O
3Tunnel layer.
4. the preparation method of super-high density individual layer nano-crystal memory according to claim 1 is characterized in that step 2) described metal nanoparticle is FePt, Au or Ag.
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US20070257297A1 (en) * | 2006-02-28 | 2007-11-08 | Kwang-Soo Seol | Memory device having nanocrystals and methods of manufacturing the same |
CN101575085A (en) * | 2009-06-12 | 2009-11-11 | 复旦大学 | Method for preparing gold nanocrystals with high density at room temperature and applications thereof |
CN102184848A (en) * | 2011-05-11 | 2011-09-14 | 复旦大学 | Metal nanocrystalline storage capacitor and preparation method thereof |
CN103094355A (en) * | 2011-10-28 | 2013-05-08 | 中国科学院微电子研究所 | Nanocrystalline memory and manufacturing method thereof |
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US20070257297A1 (en) * | 2006-02-28 | 2007-11-08 | Kwang-Soo Seol | Memory device having nanocrystals and methods of manufacturing the same |
CN101575085A (en) * | 2009-06-12 | 2009-11-11 | 复旦大学 | Method for preparing gold nanocrystals with high density at room temperature and applications thereof |
CN102184848A (en) * | 2011-05-11 | 2011-09-14 | 复旦大学 | Metal nanocrystalline storage capacitor and preparation method thereof |
CN103094355A (en) * | 2011-10-28 | 2013-05-08 | 中国科学院微电子研究所 | Nanocrystalline memory and manufacturing method thereof |
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