CN103257875A - Method and system for reading configuration information of hardware - Google Patents
Method and system for reading configuration information of hardware Download PDFInfo
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- CN103257875A CN103257875A CN2013101568385A CN201310156838A CN103257875A CN 103257875 A CN103257875 A CN 103257875A CN 2013101568385 A CN2013101568385 A CN 2013101568385A CN 201310156838 A CN201310156838 A CN 201310156838A CN 103257875 A CN103257875 A CN 103257875A
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Abstract
The invention provides a method and system for reading configuration information of hardware. When the system for reading the configuration information of the hardware is powered on, a reset device connected with a microprocessor sends a reset signal to the microcomputer, and the reset signal is controlled to become invalid after a first predetermined period of time; resetting is carried out on the microprocessor according to the reset signal after the reset signal is received by the microprocessor; programmable logic devices connected with all configuration pins of the microcomputer load a preset loading file containing the configuration information of the current hardware in a second predetermined period of time, and the configuration information of the current hardware is sent to configuration pins corresponding to the configuration information of the current hardware in a one-to-one mode so that the microprocessor can read the configuration information of the current hardware from the configuration pins when the reset signal becomes invalid. Therefore, the method and system for reading the configuration information of the hardware has the advantages that the configuration information, on the configuration pins, of the current hardware can be changed frequently on the premise that connection of the hardware does not need to be changed, and flexibility of the system is greatly improved.
Description
Technical field
The information of the present invention relates to reads technical field, relates to a kind of read method and system of hardware configuration information in particular.
Background technology
Nowadays, microprocessor has been widely applied to fields such as communication, automobile, robotization, household electrical appliance.In actual applications, when microprocessor is powered on, at first need resetting means to send reset signal to microprocessor, make this microprocessor be in reset mode, wait configuration information to be read; When the reset signal in the resetting means control microprocessor was invalid, this microprocessor read required configuration information with beginning, in order to finish self configuration.Wherein, the hardware configuration information that some in the configuration information are crucial, microprocessor normally reads from configuration pin.At present, the read method of existing hardware configuration information specifically is to handle or drop-down processing by drawing on the configuration pin of microprocessor is carried out, thereby provides required hardware configuration information " 1 " or " 0 " for this configuration pin.Wherein, draw on described to handle to refer to, configuration pin is linked to each other with the power supply positive voltage by pull-up resistor, thereby the hardware configuration information that makes microprocessor read this configuration pin is " 1 "; Described drop-down processing refers to, configuration pin is linked to each other with power supply ground by pull down resistor, thereby the hardware configuration information that makes microprocessor read this configuration pin is " 0 ".
In addition, because in the actual debugging of microprocessor is used, usually need change the hardware configuration information of configuration pin continually, for this reason, prior art is by each configuration pin is gone up drop-down processing simultaneously, thereby the configuration pin that makes microprocessor is compatible " 1 " and " 0 " two kinds of hardware configuration informations all, when microprocessor need change to " 0 " by " 1 " from the hardware configuration information that certain configuration pin reads, the pull-up resistor that only needs to link to each other with this configuration pin welds, and gets final product at this configuration pin welding pull down resistor simultaneously.But, in prior art, when the hardware configuration information of each change configuration pin, must change hardware and connect, it is very inconvenient to operate.
Summary of the invention
In view of this, the invention provides a kind of read method and system of hardware configuration information, solved in the prior art, when changing the current hardware configuration information of configuration pin of microprocessor at every turn, must change the technical matters that hardware connects, improve the dirigibility of operation.
For achieving the above object, the invention provides following technical scheme:
A kind of read method of hardware configuration information, be applied in the reading system of hardware configuration information, described system comprises the resetting means of exporting reset signal, the microprocessor that comprises at least one configuration pin, and the programmable logic device (PLD) that links to each other with all described configuration pin, when described system was powered on, described method comprised:
Described resetting means sends reset signal to described microprocessor, and behind first Preset Time, control described reset signal become invalid;
Described microprocessor receives described reset signal, and reset according to described reset signal, described programmable logic device (PLD) is in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information sent to respectively and described current hardware configuration information configuration pin one to one, wherein, described current hardware configuration information is to determine that according to the current demand of the configuration pin of correspondence described second Preset Time is not more than described first Preset Time;
When described reset signal becomes when invalid, described microprocessor reads the described current hardware configuration information on the described configuration pin.
Preferably, when needs were changed the described current hardware configuration information of described configuration pin, described method comprised:
When described system cut-off and when re-powering, described programmable logic device (PLD) is in described second Preset Time, reload the default load document that includes the hardware configuration information after the change, and with the hardware configuration information after the described change send to, with described change after hardware configuration information configuration pin one to one.
A kind of reading system of hardware configuration information comprises:
When this system powered on, the output reset signal behind first Preset Time, was controlled described reset signal and is become invalid resetting means;
Link to each other with described resetting means, the microprocessor that includes at least one configuration pin, when this system powers on, receive the described reset signal that described resetting means sends, and reset according to described reset signal, when the described reset signal that receives becomes when invalid, read the current hardware configuration information on the described configuration pin;
The programmable logic device (PLD) that links to each other with described configuration pin all in the described microprocessor, when this system powers on, in second Preset Time, loading includes the default load document of described current hardware configuration information, and with described current hardware configuration information send to, with described current hardware configuration information configuration pin one to one, wherein, described current hardware configuration information is to determine that according to the current demand of the configuration pin of correspondence described second Preset Time is not more than described first Preset Time.
Preferably, described programmable logic device (PLD) is specially CPLD.
Preferably, described programmable logic device (PLD) is specially field programmable gate array.
Via above-mentioned technical scheme as can be known, compared with prior art, the present invention openly provides a kind of read method and system of hardware configuration information.When described system powers on, send reset signal by resetting means to coupled microprocessor, and through behind first Preset Time, control described reset signal become invalid.Wherein, when described microprocessor receives described reset signal, to reset according to described reset signal, and, when this system powers on, the programmable logic device (PLD) that links to each other with all configuration pin of described microprocessor, will be in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information sent to and its configuration pin one to one, become when invalid with the described reset signal of box lunch, described microprocessor reads current hardware configuration information corresponding on the described configuration pin.Need to prove that among the present invention, in order to guarantee to become when invalid in reset signal, microprocessor can read the current hardware configuration information on the configuration pin reliably, described second Preset Time is not more than described first Preset Time.
Among the present invention, because the current required current hardware configuration information of configuration pin, be to be loaded in the programmable logic device (PLD) with the form of presetting load document, by described programmable logic device (PLD) described current hardware configuration information sent to corresponding configuration pin afterwards.Be that the present invention sends the current hardware configuration information that it needs by programmable logic device (PLD) to configuration pin, but not in the prior art by configuration pin being gone up drop-down processing, for this configuration pin provides required hardware configuration information.Therefore, when the current hardware configuration information on the needs change configuration pin, the present invention only needs programmable logic device (PLD) to reload to comprise the default load document of the hardware configuration information after the change to get final product, and need not to change hardware and connects, and has improved the dirigibility of operation greatly.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is embodiments of the invention, for those of ordinary skills, not
Pay under the prerequisite of creative work, other accompanying drawing can also be provided according to the accompanying drawing that provides.
Fig. 1 is the process flow diagram of the embodiment that reads transmission of a kind of hardware configuration information of the present invention;
Fig. 2 is the structural representation of the embodiment of the reading system of a kind of hardware configuration information of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
The embodiment of the invention discloses a kind of read method of hardware configuration information, be applied in a kind of reading system of hardware configuration information, described system can comprise the resetting means of exporting reset signal, the microprocessor that includes at least one configuration pin, and the programmable logic device (PLD) that links to each other with all described configuration pin.When this system powered on, described resetting means sent reset signal to described microprocessor, and through behind first Preset Time, the described reset signal of controlling described microprocessor is invalid.Wherein, when described microprocessor receives described reset signal, will reset according to described reset signal; And, when this system powers on, described programmable logic device (PLD) will be in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information sent to and described current hardware configuration information configuration pin one to one, so that when described reset signal becomes described invalid signals, described microprocessor reads the described hardware configuration information on the described configuration pin.
Wherein, need to prove that in order to guarantee that when reset signal is invalid microprocessor can reliably read the hardware configuration information on the configuration pin, described second Preset Time is not more than described first Preset Time.In addition, among the present invention, described current hardware configuration information is to determine according to the demand of configuration pin, when system powers on, by programmable logic device (PLD) current hardware configuration information is sent to the configuration pin corresponding with it.When needs are changed the current hardware configuration information of described configuration pin, only need programmable logic device (PLD) to reload to include the default load document of the hardware configuration information after the change, and the hardware configuration information after will changing resends to described configuration pin and gets final product, need not to change hardware and connect, improved the dirigibility of operation greatly.
With reference to Fig. 1, show the process flow diagram of embodiment of the read method of a kind of hardware configuration information of the present invention, described method is applied in a kind of reading system of hardware configuration information, described system comprises the resetting means of exporting reset signal, the microprocessor that includes at least one configuration pin, and the programmable logic device (PLD) that links to each other with all described configuration pin.When described system powered on, described method can comprise:
Step 101: described resetting means sends reset signal to described microprocessor, and behind first Preset Time, it is invalid to control described reset signal.
Need to prove that in the present embodiment, the described reset signal that described resetting means sends earlier is effective reset signal, what then follow-up microprocessor received also is effective reset signal.Also namely, in the present embodiment, under the situation of no specified otherwise, described reset signal is effective reset signal.
In the practical application, because microprocessor is before using, its internal part such as PLL(Phase Locked Loop, phaselocked loop), parts such as controller, register will carry out initialization earlier, with etc. the current hardware configuration information on the configuration pin to be read, thereby finish self configuration.Therefore, when system powered on, resetting means at first sent reset signal to described microprocessor; And, in order to reserve time enough to configuration pin, to obtain required current hardware configuration information, described resetting means is through behind first Preset Time, the described reset signal of just controlling described microprocessor is invalid, improved the reliability that microprocessor reads the current hardware configuration information of configuration pin greatly.Wherein, whether described first Preset Time reads the judged result of current hardware configuration information according to microprocessor, and the time length of regulating this first Preset Time is to improve dirigibility and the practicality of system.
Wherein, described resetting means can be the chip that resets of described microprocessor internal, also can be the resetting means of microprocessor outside.In actual applications, for the simple microprocessor of function, only need to receive the initialization that a reset signal can realize its internal part; And for the microprocessor of function complexity, as the serial processor of MPC82xx, the 83xx etc. of Freescale, because the parts of different range are resetted the reset signal difference required, thereby this microprocessor can receive three different reset signals, as reset signals such as PORESET, HRESET and SRESET.But, usually to microprocessor read configuration pin current hardware configuration information, that play a decisive role is the higher external reset signal PORESET of rank, namely when resetting means control PORESET become invalid, microprocessor just can carry out the follow-up operation of reading current hardware configuration information, at this moment, other external reset signal still hold reset can also be invalid, all do not influence follow-up read operation.
Step 102: described microprocessor receives described reset signal, and resets according to described reset signal.
Step 103: described programmable logic device (PLD) is in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information is sent to respectively and described current hardware configuration information configuration pin one to one.
Need to prove that described current hardware configuration information is to determine according to the current demand of configuration pin.Therefore, when the current demand of this configuration pin changed, the current hardware configuration information corresponding with it also can change accordingly, and be concrete, and present embodiment is to send the current hardware configuration information that configuration pin needs by programmable logic device (PLD).Wherein, in actual applications, usually when system powers on, microprocessor has carried out after a period of time resets, and programmable logic device (PLD) just begins to load the default load document that includes current hardware configuration information.
In addition, in order to guarantee that microprocessor is when described reset signal is invalid, successfully read the current hardware configuration information on all configuration pin, in the system unit function just often, usually need programmable logic device (PLD) from beginning to load default load document, to the time that current hardware configuration information is sent to all configuration pin, namely second Preset Time is not more than described first Preset Time.Certainly, in actual applications, can occur the problem that microprocessor can't accurately read the current hardware configuration information on all configuration pin unavoidably, at this moment, the operator only need readjust the reset time of resetting means, namely increases by first Preset Time and gets final product.
In the practical application of present embodiment, before system powers on, the operator usually hardware configuration information that all configuration pin of microprocessor are required be current hardware configuration information, be compiled into default load document, when described system powers on, load described default load document by described programmable logic device (PLD), and the current hardware configuration information that will preset in the load document sends to corresponding configuration pin.In addition, because when described configuration pin does not receive current hardware configuration information, even if it is invalid that the reset signal of microprocessor becomes, this microprocessor also can't read described current hardware configuration information, therefore, the embodiment of the invention is carried out reseting period at described microprocessor, and all configuration pin are finished and received and its operation of current hardware configuration information one to one.That is to say that microprocessor only need be carried out read operation one time, namely may be read into the described current hardware configuration information of all configuration pin, improved reading efficiency greatly.
Concrete is, when system powers on, described programmable logic device (PLD) will be in second Preset Time, load described default load document, and the current hardware configuration information in the described default load document sent to corresponding configuration pin, before guaranteeing that reset signal at microprocessor is invalid, all configuration pin have all received corresponding current hardware configuration information, to improve the reliability that microprocessor reads current hardware configuration information.
Step 104: when described reset signal becomes when invalid, described microprocessor reads the described current hardware configuration information on the described configuration pin.
In the present embodiment, described current hardware configuration information is that microprocessor starts required important parameter, usually all be that externally reset signal is that the position, hopping edge that described reset signal that resetting means sends finishes begins sampling, be that described reset signal becomes when invalid, microprocessor begins to read the current hardware configuration information of configuration pin.Wherein, described current hardware configuration information can include the loading position of reset configuration words, the parameter of phaselocked loop, the selection of debugging interface etc.Described reset configuration words specifically refers to the configuration information that microprocessor reads from External memory equipment, rather than the current hardware configuration information that reads from described configuration pin.When described current hardware configuration information includes the loading position of described reset configuration words, rising edge in the PORESET reset signal, the microprocessor current hardware configuration information on the configuration pin that begins to sample, determine the loading position of reset configuration words by this current hardware configuration information afterwards, and begin to load this reset configuration words accordingly.
Through above-mentioned analysis as can be known, in the present embodiment, because described first Preset Time is not less than described second Preset Time, thereby guaranteed reliably described reset signal become invalid before, all configuration pin have all received corresponding current hardware configuration information, have namely guaranteed the reliable execution of step 104.Certainly, in order further to improve the reliability that microprocessor reads current hardware configuration information, as another embodiment of the present invention, after step 104, can also comprise whether described microprocessor judges successfully reads the current hardware configuration information of all described configuration pin, if, process ends; If not, increase described first Preset Time, and re-execute described decision operation, successfully read until described microprocessor till the described current hardware configuration information of configuration pin.
Wherein, when the function of actual debug microprocessor, often need frequently to change the current hardware configuration information of configuration pin.In this enforcement, because the required current hardware configuration information of described configuration pin obtains by programmable logic device (PLD), and the described current hardware configuration information in the programmable logic device (PLD), be that form with default load document loads and obtains.Therefore, when needs are changed the current hardware configuration information of configuration pin, only need to include the default load document of the hardware configuration information after the change, be re-loaded in the described programmable logic device (PLD), and with the hardware configuration information after the described change send to its one to one configuration pin get final product, need not to change hardware and connect the dirigibility that has improved system greatly.Wherein, the process that programmable logic device (PLD) is reloaded the hardware configuration information after the change is well known to a person skilled in the art, will no longer describe in detail herein.
In the present embodiment, when system powered on, resetting means sent effective reset signal to microprocessor, so that described microprocessor resets according to the described reset signal that receives.Simultaneously, when system powers on, described programmable logic device (PLD) will be in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information sent to and its configuration pin one to one, so that described resetting means sends described reset signal, and behind first Preset Time, control described reset signal when invalid, described microprocessor reads the current hardware configuration information of described configuration pin correspondence.Because the described current hardware configuration information of described configuration pin, obtain by described programmable logic device (PLD), therefore, when needs are changed described current hardware configuration information, only needing that the hardware configuration information after the change is re-loaded to described programmable logic device (PLD) gets final product, need not to change hardware and connect the dirigibility that has improved system greatly.
With reference to Fig. 2, show the structural representation of the reading system of a kind of hardware configuration information of the present invention, described system can comprise: resetting means 201, microprocessor 202 and programmable logic device (PLD) 203, wherein,
Described resetting means 201 links to each other with described microprocessor 202, and when system powered on, this resetting means 201 sent reset signals to described microprocessor 202, behind first Preset Time, control described reset signal become invalid.
Wherein, in the present embodiment, described resetting means 201 can be the chip that resets of microprocessor internal, also can be the resetting means of microprocessor outside.
Described microprocessor 202 includes at least one configuration pin (the described microprocessor 202 that only drawn in the accompanying drawing in the present embodiment comprises the situation of 3 described configuration pin 204), when system powers on, receive the described reset signal that described resetting means 201 sends, and reset according to described reset signal; When the described reset signal that receives becomes when invalid, read the current hardware configuration information on the described configuration pin, so that finish self configuration accordingly.
Wherein, described microprocessor can be Power PC, be Performance Optimization With Enhanced RISC – Performance Computing, be called for short PPC, it is a kind of RISC(Reduced Instruction Set Computing, reduced instruction set computer) CPU of framework, its basic design is derived from IBM(International Business Machines, International Business Machine Corporation (IBM)) POWER(Power Optimization With Enhanced RISC) framework.Certainly, described microprocessor can also be the processor with other functions or framework.
Described programmable logic device (PLD) 203 links to each other with all configuration pin of described microprocessor 202, when system powers on, in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information is sent to and its configuration pin one to one.
Need to prove, described current hardware configuration information is to determine according to the current demand of the configuration pin of correspondence, and described second Preset Time is not more than described first Preset Time, with reliably guarantee described reset signal become invalid before, described configuration pin has received corresponding current hardware configuration information, thereby improves the reliability that microprocessor reads current hardware configuration information.
Wherein, described programmable logic device (PLD) will obtain the required current hardware configuration information of configuration pin after loading default load document, afterwards, more described current hardware configuration information is sent to and its configuration pin one to one, in order to carry out subsequent operation
In the practical application of present embodiment, after described system powers on end, be after current hardware configuration information on the described configuration pin is read, described programmable logic device (PLD) will no longer send hardware configuration information to described configuration pin, at this moment, described configuration pin is only used as common IO pin, and described programmable logic device (PLD) also only plays the effect of a connection, namely by described programmable logic device (PLD), realize the transmission of information between the pin of external devices and the described configuration pin.Therefore, as another embodiment of the present invention, when described configuration pin was used as the IO pin, can be directly carry out drop-down processing (described front end specifically referred to the position between the pin of the configuration pin of described microprocessor and described programmable logic device (PLD) in described programmable logic device (PLD) front end or rear end; Described rear end specifically refers to the position between the pin of the pin of described programmable logic device (PLD) and external devices).Need to prove that when programmable logic device (PLD) sent current hardware configuration information to configuration pin, the last drop-down processing on this configuration pin can't influence the correctness of described current hardware configuration information.For example, when the current hardware configuration information of described programmable logic device (PLD) transmission is low level " 0 ", draw processing even if receive the configuration pin of this current hardware configuration information on having carried out, microprocessor reads remains reliable low level, thus solved in the prior art configuration pin during as common IO pin on drop-down demand, with the afoul technical matters of hardware configuration information of this configuration pin.
Wherein, described programmable logic device (PLD) 203 can be CPLD (Complex Programmable Logic Device is called for short CPLD).Because the functional characteristic of CPLD self, at this moment, it is very short that CPLD loads the time of default load document, can ignore.That is to say that when described programmable logic device (PLD) was CPLD, described second Preset Time used second Preset Time of other programmable logic device (PLD) short relatively, can improve system effectiveness greatly.It should be noted that this moment, the reset time of resetting means, namely first Preset Time also needed correspondingly to shorten, but still will guarantee that it is not less than described second Preset Time.
Optionally, described programmable logic device (PLD) 203 can also be that field programmable gate array (Field Programmable Gate Array is called for short FPGA) and some storeies such as flash memory Flash Memory etc. constitute.When system powered on, in second Preset Time, this programmable logic device (PLD) that constitutes was similar to CPLD, and system effectiveness is very high; And when described programmable logic device (PLD) is traditional FPGA, will be through loading the loading procedure of default load document automatically, with the process of transmitting that the current hardware configuration information in the described default load document is sent to corresponding configuration pin, the required time is longer relatively.But no matter which kind of scheme all can realize purpose of the present invention, all belongs to protection scope of the present invention.
In the present embodiment, described system is the current hardware configuration information of the correspondence that configuration pin sends, described configuration pin is required of described microprocessor by programmable logic device (PLD), when needs are changed described current hardware configuration information, only need reload the default load document that includes the hardware configuration information after the change gets final product, need not to carry out the modification of any hardware, flexible to operation, needing to be particularly suitable for the frequent application scenario of changing the current hardware configuration information of configuration pin.And, because the present invention is not by configuration pin being gone up drop-down processing, coming for this configuration pin provides required current hardware configuration information, therefore, the present invention has saved pull-up resistor and the pull down resistor that hardware configuration information is provided greatly, thereby has improved the integrated level of system.In addition, described system of the present invention provides required current hardware configuration information by described programmable logic device (PLD) for configuration pin, therefore, people can not learn the particular content of current hardware configuration information intuitively as prior art, also just strengthened the confidentiality of the hardware configuration information of configuration pin greatly.
Each embodiment adopts the mode of going forward one by one to describe in this instructions, and what each embodiment stressed is and the difference of other embodiment that identical similar part is mutually referring to getting final product between each embodiment.For the disclosed device of embodiment, because it is corresponding with the embodiment disclosed method, so description is fairly simple, relevant part partly illustrates referring to method and gets final product.
To the above-mentioned explanation of the disclosed embodiments, make this area professional and technical personnel can realize or use the present invention.Multiple modification to these embodiment will be apparent concerning those skilled in the art, and defined General Principle can realize under the situation that does not break away from the spirit or scope of the present invention in other embodiments herein.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the wideest scope consistent with principle disclosed herein and features of novelty.
Claims (5)
1. the read method of a hardware configuration information, it is characterized in that, be applied in the reading system of hardware configuration information, described system comprises the resetting means of exporting reset signal, the microprocessor that comprises at least one configuration pin, and the programmable logic device (PLD) that links to each other with all described configuration pin, when described system was powered on, described method comprised:
Described resetting means sends reset signal to described microprocessor, and behind first Preset Time, control described reset signal become invalid;
Described microprocessor receives described reset signal, and reset according to described reset signal, described programmable logic device (PLD) is in second Preset Time, loading includes the default load document of current hardware configuration information, and described current hardware configuration information sent to respectively and described current hardware configuration information configuration pin one to one, wherein, described current hardware configuration information is to determine that according to the current demand of the configuration pin of correspondence described second Preset Time is not more than described first Preset Time;
When described reset signal becomes when invalid, described microprocessor reads the described current hardware configuration information on the described configuration pin.
2. method according to claim 1 is characterized in that, when needs were changed the described current hardware configuration information of described configuration pin, described method comprised:
When described system cut-off and when re-powering, described programmable logic device (PLD) is in described second Preset Time, reload the default load document that includes the hardware configuration information after the change, and with the hardware configuration information after the described change send to, with described change after hardware configuration information configuration pin one to one.
3. the reading system of a hardware configuration information is characterized in that, comprising:
When this system powered on, the output reset signal behind first Preset Time, was controlled described reset signal and is become invalid resetting means;
Link to each other with described resetting means, the microprocessor that includes at least one configuration pin, when this system powers on, receive the described reset signal of described resetting means output, and reset according to described reset signal, when the described reset signal that receives becomes when invalid, read the current hardware configuration information on the described configuration pin;
The programmable logic device (PLD) that links to each other with described configuration pin all in the described microprocessor, when this system powers on, in second Preset Time, loading includes the default load document of described current hardware configuration information, and with described current hardware configuration information send to, with described current hardware configuration information configuration pin one to one, wherein, described current hardware configuration information is to determine that according to the current demand of the configuration pin of correspondence described second Preset Time is not more than described first Preset Time.
4. system according to claim 3 is characterized in that, described programmable logic device (PLD) is specially CPLD.
5. system according to claim 3 is characterized in that, described programmable logic device (PLD) is specially field programmable gate array.
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| CN104461994A (en) * | 2014-11-12 | 2015-03-25 | 中国航空工业集团公司洛阳电光设备研究所 | FPGA-based embedded processor dynamic configuration circuit and method |
| CN106130844A (en) * | 2016-08-04 | 2016-11-16 | 轩脉家居科技（上海）有限公司 | A kind of embedded intelligent home thermoregulating system |
| CN107678909A (en) * | 2017-07-31 | 2018-02-09 | 郑州云海信息技术有限公司 | The circuit and method of monitoring chip configuration status in a kind of server |
| CN107678909B (en) * | 2017-07-31 | 2020-06-16 | 苏州浪潮智能科技有限公司 | Circuit and method for monitoring chip configuration state in server |
| CN108923977A (en) * | 2018-07-10 | 2018-11-30 | 郑州云海信息技术有限公司 | A kind of configuration method of server, device and server apparatus |
| CN112241141A (en) * | 2020-11-12 | 2021-01-19 | 上海电气风电集团股份有限公司 | Hardware configuration method, system, device and medium of PLC control system |
| CN112241141B (en) * | 2020-11-12 | 2022-08-09 | 上海电气风电集团股份有限公司 | Hardware configuration method, system, device and medium of PLC control system |
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Application publication date: 20130821 |