CN103229158A - Control circuit and control method for inter-integrated circuit bus - Google Patents
Control circuit and control method for inter-integrated circuit bus Download PDFInfo
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- CN103229158A CN103229158A CN2012800029333A CN201280002933A CN103229158A CN 103229158 A CN103229158 A CN 103229158A CN 2012800029333 A CN2012800029333 A CN 2012800029333A CN 201280002933 A CN201280002933 A CN 201280002933A CN 103229158 A CN103229158 A CN 103229158A
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Abstract
The invention relates to a control circuit and a control method for an inter-integrated circuit (I2C) bus. The circuit includes an I2C master device and a plurality of I2C device groups; the I2C device groups includes I2C drive devices and a plurality of I2C slave devices; the I2C interface of the I2C master device is connected with the I2C drive devices and the IO interfaces of the I2C master device are connected with the enabling terminals of the I2C drive devices; one ends of the I2C drive devices are connected with the plurality of I2C slave devices; the I2C master device sends enabling signals to the I2C drive devices; the I2C master device sends data to the I2C drive devices in an enabling state and the I2C drive devices process data which are then sent to each of the I2C slave devices; and if the device addresses of the I2C slave devices are identical with an address code, then the I2C slave devices communicate with the I2C master device. So the control circuit and the control method for the I2C bus enable the open or closed state of each I2C drive device to be controlled by the I2C master device so that the reliability of the control circuit of the I2C bus is improved.
Description
Technical field
The present invention relates to the communications field, relate in particular to a kind of internal integration bus of circuit control circuit and control method.
Background technology
Internal integration circuit (Inter-Integrated Circuit, I2C) bus is to use one of universal serial bus very widely in the current Electronic Design, be mainly used in voltage, monitoring temperature, EEPROM (Electrically Erasable Programmable Read Only Memo) (electrically erasable programable read-only memory, EEPROM) data write, the management of optical module etc.Wherein, can connect a plurality of I2C devices on an I2C bus.
In the prior art, when device is too much on the I2C bus, often adopt the I2C driver to strengthen the driving force of I2C bus, each I2C device all has a unique address of devices, and its length is generally 7.Preceding 4 type decided of this I2C address of devices by this I2C device, such as, preceding 4 of the EEPROM address of devices is 1010, preceding 4 of the temperature sensor address of devices is 1001, I/O (Input/Output, I/O) preceding 4 of the address of devices of interface device is 0100; Back 3 of this I2C address of devices, generally by the address pins A2 of this I2C device is set, A1, the high-low level state of A0 is realized.Such as, the I2C bus has the address of devices of 4 EEPROM devices to be respectively 1010100,1010101,1010110,1010111, wherein, back 3 address pins A2 that pass through at device of the address of devices of each EEPROM device, A1, A0 connects pull-up resistor or pull down resistor is controlled A2, A1, the high-low level state of A0.
But, if with address pins A2, when losing efficacy in pull-up resistor that A1, A0 are connected or the pull down resistor, then the address of devices of this I2C device just changes, and just might occur conflicting with the address of devices of other I2C devices.When this I2C device of I2C main device operation read-write, there are other I2C devices that conflict also can respond the operation of I2C main device with the address of devices of this I2C device, thereby cause the conflict that reads and writes data of I2C main device, reduced the reliability of this I2C bus control circuit.
Summary of the invention
The invention provides a kind of I2C bus control circuit and control method, solved in the prior art when I2C main device operation read-write I2C device, there are other devices that conflict also can respond the operation of I2C main device with the address of devices of this device, the problem of conflict appears thereby cause the I2C main device to read and write data, utilize the Enable Pin of the input/output interface control I2C driver of I2C main device, thereby realized that the I2C main device controls the state that opens or closes of each I2C driver, improved the reliability of this I2C bus control circuit.
In first aspect, the invention provides a kind of I2C bus control circuit, described circuit comprises: I2C main device, a plurality of I2C set of devices; Described I2C set of devices comprises that I2C driving element and a plurality of I2C are from device; The I2C interface of described I2C main device is connected with first end of each I2C driving element in described a plurality of I2C set of devices; Described I2C main device is that the input and output IO interface that distributes of described each I2C driving element is connected with the Enable Pin of corresponding described I2C driving element respectively; A plurality of I2C in the described I2C set of devices at second end of described each I2C driving element and described each I2C driving element place are connected from device; When described I2C main device need with the described I2C of arbitrary described I2C set of devices when device communicates, by described I2C main device is that the input and output IO interface that the described I2C driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state; Described I2C main device sends data by the I2C interface of described I2C main device to the I2C of described enabled state driving element, the I2C driving element of described enabled state is handled described data, and each described I2C in described I2C set of devices sends from device with the data after the described processing; Described each I2C compares address of devices of self and the address code the data after the described processing from device, if described I2C is identical with described address code from the address of devices of device, described I2C communicates from device and described I2C main device.
In first kind of first aspect possible implementation, each I2C in described a plurality of I2C set of devices is from the kind difference of device.
In conjunction with first kind of first aspect possible implementation, in second kind of possible implementation, each I2C all has 7 address of devices from device in the described I2C set of devices, described address of devices difference.
In second kind of possible implementation in conjunction with first kind of first aspect, first aspect possible implementation or first aspect, in the third possible implementation, described I2C main device specifically is used for sending enable signal to the I2C driving element of arbitrary I2C set of devices of described a plurality of I2C set of devices, makes described I2C driving element be in enabled state; The I2C driving element of other I2C set of devices is in closed condition.
In second aspect, the invention provides a kind of I2C bus control method, described method comprises: when described I2C main device need with the described I2C of arbitrary described I2C set of devices when device communicates, by described I2C main device is that the input and output IO interface that the described I2C driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state; Described I2C main device sends data by the I2C interface of described I2C main device to the I2C of described enabled state driving element, after the I2C driving element of described enabled state was handled described data, each described I2C in described I2C set of devices sent from device with the data after the described processing; When described each I2C from device with the address of devices of self and after the address code the data after the described processing compares, if described I2C is identical with described address code from the address of devices of device, described I2C communicates from device and described I2C main device.
In first kind of second aspect possible implementation, described described I2C driving element to described I2C set of devices sends enable signal, making described I2C driving element be in enabled state is specially: by described I2C main device is that the I/O I/O interface that the described driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state; When described I2C driving element low level triggering enables, then described I2C main device will be corresponding with described driving element input and output IO interface be changed to low level, the Enable Pin of then described I2C driving element is a low level also, thereby makes described I2C driving element be in enabled state; When described I2C driving element high level triggering enables, then described I2C main device will be corresponding with described driving element input and output IO interface be changed to high level, the Enable Pin of then described I2C driving element is a high level also, thereby makes described I2C driving element be in enabled state.
In conjunction with first kind of second aspect or second aspect possible implementation, in second kind of possible implementation, described described I2C driving element to described I2C set of devices sends enable signal, makes described I2C driving element be in enabled state and also comprises: the I2C driving element that described I2C main device control is described to be in other the described I2C set of devices outside the described I2C set of devices at I2C driving element place of enabled state is in closed condition.
In conjunction with first kind of second aspect or second aspect possible implementation, in the third possible implementation, described data are carried out level conversion and buffer memory.
By using above-mentioned I2C bus control circuit and I2C bus control method, utilize the Enable Pin of the IO interface control I2C driver of I2C main device, thereby realized that the I2C main device controls the state that opens or closes of each I2C driver, improved the reliability of this I2C bus control circuit.
Description of drawings
The synoptic diagram of the I2C bus control circuit that Fig. 1 provides for the embodiment of the invention one;
The process flow diagram of the I2C bus control method that Fig. 2 provides for the embodiment of the invention two.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer, below in conjunction with the accompanying drawing in the embodiment of the invention, technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
I2C bus control circuit and control method that the embodiment of the invention provides, by the I2C main device is that the input and output IO interface that the I2C driving element of I2C set of devices distributes sends enable signal to the I2C driving element, make the I2C driving element be in enabled state, and other I2C driving elements are in closed condition, I2C interface by the I2C main device sends data to the I2C of enabled state driving element, after the I2C driving element of enabled state is handled data, data each the different types of I2C in the I2C set of devices after handling is sent from device; After each I2C receives data after the processing from device, with I2C from the address of devices of device with handle after data address code compare; When I2C is identical with described address code from the address of devices of device, then I2C communicates from device and described I2C main device, thereby realized utilizing the I2C driving element that I2C main device and I2C are isolated from device, improved the driving force of I2C bus, also realized Enable Pin with an I2C driving element of an IO interface control, and the different types of I2C of I2C driving device drives is from device, thereby improved the reliability of this I2C bus control circuit greatly.
The synoptic diagram of the I2C bus control circuit that Fig. 1 provides for the embodiment of the invention one.As shown in the figure, the embodiment of the invention specifically comprises: I2C main device 11, a plurality of I2C set of devices 12.Wherein, each I2C set of devices comprises that I2C driving element and a plurality of I2C are from device.Wherein, each I2C in each I2C set of devices 12 is from the kind difference of device.Each I2C all has 7 address of devices from device, and this address of devices has nothing in common with each other.Such as, some is from preceding 4 kinds of representing this I2C from device of device, and each I2C in the then same I2C set of devices 12 is from preceding 4 differences of the address of devices of device.
I2C set of devices 12 with I2C driving element 121 places is the composition that example illustrates this I2C set of devices 12, and this I2C set of devices 12 comprises: I2C driving element 121 an and a I2C is from device.This a I2C from device be respectively I2C from device 11, I2C from device 12, I2C from device 13 ... and I2C is from device 1a.In addition, the composition of remaining I2C set of devices 12 is identical with the composition of the I2C set of devices 12 at I2C driving element 1 place, here repeats no more.
In the I2C set of devices 12 at I2C driving element 121 places, I2C from device 11, I2C from device 12, I2C from device 13 ... different with I2C from the kind of device 1a, promptly I2C from device 11, I2C from device 12, I2C from device 13 ... with I2C from the address of devices of device 1a preceding 4 different.But the I2C between the different I2C set of devices 12 can be identical from device.Such as, I2C from device 11, I2C from device 21, I2C from device 31 ..., I2C can be all the EEPROM device from device 31.
The first, the annexation between this I2C bus control circuit each several part.
First end 1 of the I2C driving element in the I2C interface of I2C main device and each the I2C set of devices 12, promptly I2C driving element 121, I2C driving element 122, I2C driving element 123 ..., first end 1 of I2C driving element 12n is connected.Wherein, this I2C interface specifically comprises two signal wires: bidirectional data line SDA and clock line SCL.In addition, also comprise between the I2C driving element in the I2C interface of I2C main device and each the I2C set of devices 12: I2C bus resistance R13.
The I2C main device is the I2C driving element in each I2C set of devices 12, be I2C driving element 121, I2C driving element 122, I2C driving element 123 ..., I2C driving element 12n distributes an I/O I/O interface, and the I2C main device be I2C driving element 121, I2C driving element 122, I2C driving element 123 ..., the input and output IO interface that distributes of I2C driving element 12n respectively I2C driving element 121, I2C driving element 122, I2C driving element 123 ..., the Enable Pin EN of I2C driving element 12n is connected.In Fig. 1, I2C main device IO_1 interface is connected with the Enable Pin EN of I2C driving element 121, I2C main device IO_2 interface is connected with the Enable Pin EN of I2C driving element 122, I2C main device IO_3 interface is connected with the Enable Pin EN of I2C driving element 123, and I2C main device IO_4 interface is connected with the Enable Pin EN of I2C driving element 12n.In addition, the I2C main device can also distribute other IO interface for I2C driving element 121, I2C driving element 122, I2C driving element 123 and I2C driving element 12n.In embodiments of the present invention, as long as guaranteeing the Enable Pin EN of the I2C driving element in each I2C set of devices 12 is connected with an IO interface, and the IO interface that is connected with the Enable Pin EN of I2C driving element in each I2C set of devices 12 neither with, just can reach the I2C main device and utilize its IO interface to control the state that opens or closes of the I2C driving element in each I2C set of devices 12 respectively.
Each I2C is connected from an end of device in second end 2 of the I2C driving element in each I2C set of devices 12 and this I2C set of devices 12.With the I2C set of devices 12 at I2C driving element 121 places is that example illustrates the connection between the inside of this I2C set of devices 12.The output terminal 2 of I2C driving element 121 all with I2C from device 11, I2C from device 12, I2C from device 13 ... be connected from the end of device 1a with I2C.
The second, this I2C bus control circuit each several part function.
When I2C main device 11 need with the I2C of any I2C set of devices 12 when device communicates, by I2C main device 11 is that the input and output IO interface that the driving element of I2C set of devices 12 distributes sends enable signal to the I2C driving element, makes the I2C driving element be in enabled state.
The I2C main device sends data by the I2C interface of I2C main device to the I2C of enabled state driving element, and the I2C driving element of enabled state is handled data, and the data after handling are sent from device to each I2C of I2C set of devices.Wherein, the I2C driving element is handled data and is comprised level conversion and buffer memory.
After the data after each I2C receives processing from device, the address code in the data after handling is compared with the address of devices of self; Have only I2C from the address of devices of device when identical with the address code that receives, this I2C just communicates with the I2C main device from device.
Need communicate from device 11 with the I2C in the I2C set of devices 12 at I2C driving element 121 places with I2C main device 11 below is that example specifies this I2C bus control circuit each several part function.
At first I2C main device 11 sends enable signal by the IO_1 interface that the Enable Pin EN with I2C driving element 121 is connected to I2C driving element 121, makes the I2C driving element be in enabled state.And the I2C driving element in other I2C set of devices 12, I2C driving element 121, I2C driving element 122, I2C driving element 123 ..., I2C driving element 12n is in closed condition.I2C main device 11 can only send enable signal to an I2C driving element in embodiments of the present invention, can not send enable signal to plural I2C driving element simultaneously.That is to say, have only an I2C driving element that receives enable signal to be in enabled state, and other I2C driving elements are in closed condition.
When the triggering of I2C driving element 121 low levels enables, then I2C main device 11 is that the IO_1 interface is changed to low level with the input and output IO interface corresponding with I2C driving element 121, then the Enable Pin of I2C driving element 121 is a low level also, thereby makes I2C driving element 121 be in enabled state; When the triggering of I2C driving element 121 high level enables, then described I2C main device will be corresponding with described driving element input and output IO interface be that IO_1 is changed to high level, then the Enable Pin of I2C driving element 121 is a high level also, thereby makes I2C driving element 121 be in enabled state.
Then, I2C main device 11 sends data by the I2C interface of I2C main device to the I2C of enabled state driving element 121, these data comprise address code, after the I2C driving element of enabled state is handled data, data after handling are sent to each I2C of being connected with the output terminal of I2C driving element from device, promptly I2C from device 11, I2C from device 12, I2C from device 13 ... and I2C is from device 1a.
At last, when each I2C from device, promptly I2C from device 11, I2C from device 12, I2C from device 13 ... and after I2C receives data after the processing from device 1a, address code in the data after handling and the address of devices of self are compared.When one of them I2C was identical with address code from the address of devices of device, then this I2C just communicated with the I2C main device from device.Such as, I2C is identical with the address code that receives from the address of devices of device 11, and then the I2C main device carries out read operation or write operation to I2C from device 11.
In addition, I2C main device 11 need with I2C in other the I2C set of devices 12 when device communicates, with I2C main device 11 need be roughly the same from the process that device 11 communicates with the I2C in the I2C set of devices 12 at I2C driving element 121 places, just enable the IO difference of I2C driving element, here repeat no more.
Therefore, the internal integration circuit I 2C bus control circuit that the embodiment of the invention provides, by the I2C main device is that the input and output IO interface that the I2C driving element of I2C set of devices distributes sends enable signal to the I2C driving element, make the I2C driving element be in enabled state, and other I2C driving elements are in closed condition, I2C interface by the I2C main device sends data to the I2C of enabled state driving element, after the I2C driving element of enabled state is handled data, data each the different types of I2C in the I2C set of devices after handling is sent from device; After each I2C receives data after the processing from device, with I2C from the address of devices of device with handle after data address code compare; When I2C is identical with described address code from the address of devices of device, then I2C communicates from device and described I2C main device, thereby realized utilizing the I2C driving element that I2C main device and I2C are isolated from device, improved the driving force of I2C bus, also realized Enable Pin with an I2C driving element of an IO interface control, and the different types of I2C of I2C driving device drives is from device, thereby improved the reliability of this I2C bus control circuit greatly.
The process flow diagram of the I2C bus control method that Fig. 2 provides for the embodiment of the invention two.This method is used for the I2C bus control circuit that the embodiment of the invention one provides.As shown in the figure, the embodiment of the invention specifically comprises:
Particularly, be that the input and output IO interface that the driving element of I2C set of devices distributes sends enable signal to the I2C driving element by the I2C main device, make the I2C driving element be in enabled state;
When the triggering of I2C driving element low level enabled, then the input and output IO interface that the I2C main device will be corresponding with driving element was changed to low level, and then the Enable Pin of I2C driving element is a low level also, thereby makes the I2C driving element be in enabled state; When the triggering of I2C driving element high level enabled, then the input and output IO interface that the I2C main device will be corresponding with driving element was changed to high level, and then the Enable Pin of I2C driving element is a high level also, thereby makes the I2C driving element be in enabled state.
Particularly, each I2C all has 7 address of devices from device, then belongs to the address of devices of same I2C from each I2C of set of devices from device and has nothing in common with each other.From preceding 4 kinds of representing this I2C from device of device address of devices all, then belong to each I2C in the same I2C set of devices such as, each I2C from preceding 4 differences of the address of devices of device.
Therefore, the internal integration circuit I 2C bus control method that the embodiment of the invention provides, by the I2C main device is that the input and output IO interface that the I2C driving element of I2C set of devices distributes sends enable signal to the I2C driving element, make the I2C driving element be in enabled state, and other I2C driving elements are in closed condition, I2C interface by the I2C main device sends data to the I2C of enabled state driving element, after the I2C driving element of enabled state is handled data, data each the different types of I2C in the I2C set of devices after handling is sent from device; After each I2C receives data after the processing from device, with I2C from the address of devices of device with handle after data address code compare; When I2C is identical with described address code from the address of devices of device, then I2C communicates from device and described I2C main device, thereby realized utilizing the I2C driving element that I2C main device and I2C are isolated from device, improved the driving force of I2C bus, also realized Enable Pin with an I2C driving element of an IO interface control, and the different types of I2C of I2C driving device drives is from device, thereby improved the reliability of this I2C bus control circuit greatly.
Above-described embodiment; purpose of the present invention, technical scheme and beneficial effect are further described; institute is understood that; the above only is the specific embodiment of the present invention; and be not intended to limit the scope of the invention; all within technical scheme scope of the present invention, any modification of being made, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (10)
1. an internal integration circuit I 2C bus control circuit is characterized in that described circuit comprises: I2C main device, a plurality of I2C set of devices; Described I2C set of devices comprises that I2C driving element and a plurality of I2C are from device;
The I2C interface of described I2C main device is connected with first end of each I2C driving element in described a plurality of I2C set of devices; Described I2C main device is that the input and output IO interface that distributes of described each I2C driving element is connected with the Enable Pin of corresponding described I2C driving element respectively;
A plurality of I2C in the described I2C set of devices at second end of described each I2C driving element and described each I2C driving element place are connected from device;
When described I2C main device need with the described I2C of arbitrary described I2C set of devices when device communicates, by described I2C main device is that the input and output IO interface that the described I2C driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state;
Described I2C main device sends data by the I2C interface of described I2C main device to the I2C of described enabled state driving element, the I2C driving element of described enabled state is handled described data, and each described I2C in described I2C set of devices sends from device with the data after the described processing;
Described each I2C compares address of devices of self and the address code the data after the described processing from device, if described I2C is identical with described address code from the address of devices of device, described I2C communicates from device and described I2C main device.
2. I2C control circuit according to claim 1 is characterized in that, each I2C in described a plurality of I2C set of devices is from the kind difference of device.
3. I2C control circuit according to claim 2 is characterized in that, each I2C all has 7 address of devices from device in the described I2C set of devices, described address of devices difference.
4. according to each described I2C control circuit in the claim 1 to 3, it is characterized in that, described I2C main device specifically is used for sending enable signal to the I2C driving element of arbitrary I2C set of devices of described a plurality of I2C set of devices, makes described I2C driving element be in enabled state; The I2C driving element of other I2C set of devices is in closed condition.
5. internal integration circuit I 2C bus control method is characterized in that described method comprises:
When described I2C main device need with the described I2C of arbitrary described I2C set of devices when device communicates, by described I2C main device is that the input and output IO interface that the described I2C driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state;
Described I2C main device sends data by the I2C interface of described I2C main device to the I2C of described enabled state driving element, after the I2C driving element of described enabled state was handled described data, each described I2C in described I2C set of devices sent from device with the data after the described processing;
When described each I2C from device with the address of devices of self and after the address code the data after the described processing compares, if described I2C is identical with described address code from the address of devices of device, described I2C communicates from device and described I2C main device.
6. I2C bus control method according to claim 5 is characterized in that, described described I2C driving element to described I2C set of devices sends enable signal, makes described I2C driving element be in enabled state and is specially:
By described I2C main device is that the I/O I/O interface that the described driving element of described I2C set of devices distributes sends enable signal to described I2C driving element, makes described I2C driving element be in enabled state;
When described I2C driving element low level triggering enables, then described I2C main device will be corresponding with described driving element input and output IO interface be changed to low level, the Enable Pin of then described I2C driving element is a low level also, thereby makes described I2C driving element be in enabled state; When described I2C driving element high level triggering enables, then described I2C main device will be corresponding with described driving element input and output IO interface be changed to high level, the Enable Pin of then described I2C driving element is a high level also, thereby makes described I2C driving element be in enabled state.
7. according to claim 5 or 6 described I2C bus control methods, it is characterized in that described described I2C driving element to described I2C set of devices sends enable signal, makes described I2C driving element be in enabled state and also comprises:
The I2C driving element that the control of described I2C main device is described to be in other the described I2C set of devices outside the described I2C set of devices at I2C driving element place of enabled state is in closed condition.
8. according to claim 5 or 6 described I2C bus control methods, it is characterized in that the I2C driving element of described enabled state is handled described data and is specially:
Described data are carried out level conversion and buffer memory.
9. according to claim 5 or 6 described I2C control methods, it is characterized in that each I2C in the described I2C set of devices is from the kind difference of device.
10. I2C control method according to claim 9 is characterized in that, each I2C all has 7 address of devices, described address of devices difference from device in the described I2C set of devices.
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| PCT/CN2012/085131 WO2014079034A1 (en) | 2012-11-23 | 2012-11-23 | Control circuit and control method for inter-integrated circuit bus |
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| CN109557453A (en) * | 2018-11-28 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of more main control chip identifying processing method and system |
| CN111221765A (en) * | 2019-12-31 | 2020-06-02 | 苏州浪潮智能科技有限公司 | Communication method and communication system for preventing I2C bus address conflict |
| CN111786864A (en) * | 2020-06-09 | 2020-10-16 | 许昌许继风电科技有限公司 | Dual-drive variable pitch system supporting master-slave mode automatic switching function and switching method |
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| CN109557453A (en) * | 2018-11-28 | 2019-04-02 | 郑州云海信息技术有限公司 | A kind of more main control chip identifying processing method and system |
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| CN111786864A (en) * | 2020-06-09 | 2020-10-16 | 许昌许继风电科技有限公司 | Dual-drive variable pitch system supporting master-slave mode automatic switching function and switching method |
| CN112667126A (en) * | 2021-01-22 | 2021-04-16 | 深圳市绘王动漫科技有限公司 | Handwriting screen and method for adjusting closed screen menu thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014079034A1 (en) | 2014-05-30 |
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