CN103199095A - 显示器、薄膜晶体管阵列基板及其制造工艺 - Google Patents
显示器、薄膜晶体管阵列基板及其制造工艺 Download PDFInfo
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Abstract
本发明涉及显示器、薄膜晶体管阵列基板及其制造工艺。其中,薄膜晶体管阵列基板包括:栅电极、有源层,栅电极和有源层通过黑矩阵隔离;源电极、漏电极和沟道;彩色滤光层,像素电极。本发明的显示器包括本发明的薄膜晶体管阵列基板。本发明的薄膜晶体管阵列基板的制造工艺,包括在基板上形成栅线和栅电极的图形;形成黑矩阵的图形;形成有源层和源/漏电极的图形;形成彩色滤光层的图形;形成像素电极的图形。本发明的薄膜晶体管阵列基板省去了栅绝缘层和保护层,同时免除了两次等离子气相成膜工序,显著缩短了工艺时间,降低了工艺的复杂度;同时有效减薄了基板厚度。本发明的薄膜晶体管阵列基板制造工艺有效减少了成膜次数,缩短了工艺时间。
Description
技术领域
本发明涉及液晶显示器技术领域,尤其涉及一种显示器、薄膜晶体管阵列基板及其制造工艺。
背景技术
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,TFT-LCD)具有体积小、功耗低、无辐射等优点,在当前的平板显示器市场中占据了主导地位。对于TFT-LCD来说,薄膜晶体管阵列基板以及制造工艺决定了其产品性能、成品率和价格。
传统的TFT-LCD由一片TFT薄膜晶体管阵列基板,与另一片彩膜基板(Color Filter)对盒而成。TFT薄膜晶体管阵列基板上形成有控制开关薄膜晶体管和像素电极,彩膜基板上形成有红、绿、蓝滤光层和公共电极。液晶分子夹于两张基板之间,受两基板电极形成的电场作用,实现彩色显示。
而新型的彩色滤光层整合薄膜晶体管阵列基板(Color Filter On Array,简称COA)技术,无需因对盒工艺而增加遮光层的宽幅,有利于提高开口率。
常见的COA型TFT薄膜晶体管阵列基板的截面结构如图1所示,栅电极102形成于基板1上,栅电极102上方设置栅绝缘层103和有源层104,栅电极102和有源层104通过栅绝缘层103隔离,有源层104上形成源电极105、漏电极106,源电极105、漏电极106上覆盖保护层107,保护层107上设置位于源电极105、漏电极106正上方的黑矩阵108以及位于像素区域的三原色交叉排列的彩色滤色片109,像素电极110位于最上层并通过穿过黑矩阵108和保护层107的过孔与漏电极106连接。
该结构的TFT薄膜晶体管阵列基板制作完成需要八次掩膜曝光工艺,分别形成栅电极102、有源层104和源/漏电极(105、106)、保护层107、黑矩阵108、彩色滤色片109(三原色共需三次掩膜曝光工艺)和像素电极110,同时还设置了栅绝缘层103和保护层107,使得整个工艺步骤较多,复杂度较高,良品率低。
发明内容
本发明的目的是提供一种能够减少COA制造技术中mask工艺次数,简化工艺步骤,显著缩短工艺时间,降低工艺的复杂度,提高生产效率的显示器、薄膜晶体管阵列基板及其制造工艺。
本发明的薄膜晶体管阵列基板,包括栅线、数据线以及形成在栅线和数据线限定的像素区域内的像素电极,还包括:
形成在基板上的栅电极;
形成在栅电极上方的黑矩阵、有源层,栅电极和有源层通过覆盖于所述栅电极的所述黑矩阵隔离;
均形成在有源层上的源电极、漏电极;
形成在源电极、漏电极和有源层上的彩色滤光层,所述像素电极位于彩色滤光层上并通过穿过所述彩色滤光层的过孔与所述漏电极连接。
本发明的薄膜晶体管阵列基板,其中,所述黑矩阵的材料的介电常数为4-5。
本发明的薄膜晶体管阵列基板,其中,所述黑矩阵的材料为黑色树脂,所述黑矩阵中均匀分散有金属粉末。
本发明的薄膜晶体管阵列基板,其中,所述金属粉末从以下材料中选取:银粉、铜粉。
本发明的薄膜晶体管阵列基板,其中,所述黑矩阵在所述栅线延伸方向上的宽度大于所述栅线的宽度,所述黑矩阵在所述数据线延伸方向上的宽度大于所述数据线宽度。
本发明的薄膜晶体管阵列基板,其中,在所述栅线延伸方向上,所述黑矩阵到所述基板的垂直投影的边缘与所述像素电极到所述基板的垂直投影的边缘之间存在重叠。
本发明的显示器,包括薄膜晶体管阵列基板,所述薄膜晶体管阵列基板为本发明的薄膜晶体管阵列基板。
本发明的薄膜晶体管阵列基板的制造工艺,包括如下步骤:
步骤1、在基板上沉积栅金属薄膜,通过构图工艺形成栅线和栅电极的图形;
步骤2、在完成步骤1的基板上形成黑矩阵的图形;
步骤3、在完成步骤2的基板上形成有源层以及源/漏电极的图形;
步骤4、在完成步骤3的基板上依次形成三原色的彩色滤光层的图形以及贯穿所述彩色滤光层的过孔图形;
步骤5、在完成步骤4的基板上形成像素电极的图形。
本发明的薄膜晶体管阵列基板的实施例省去了栅绝缘层和保护层的设置,减少了一次掩膜曝光工艺,大大简化了基板的制造工艺,同时免除了两次等离子气相成膜工序,显著缩短了工艺时间,降低了工艺的复杂度。
本发明的薄膜晶体管阵列基板的制造工艺有效减少了制造技术中mask工艺次数,简化工艺步骤,显著缩短工艺时间,降低工艺的复杂度,提高生产效率,降低生产成本,进而保证生产质量;同时也减小了基板的厚度。
附图说明
图1为现有技术的薄膜晶体管阵列基板的结构示意图;
图2为本发明实施例的薄膜晶体管阵列基板的结构示意图;
图3为本发明实施例的薄膜晶体管阵列基板的局部像素简化示意图,示出了薄膜晶体管阵列基板的俯视结构;
图4为图3的A-A向视图;
图5为本发明实施例的薄膜晶体管阵列基板的制造工艺的流程图。
具体实施方式
本发明的薄膜晶体管阵列基板采用黑色树脂作为栅极的绝缘层,同时充当分割子像素的黑矩阵。由于黑色树脂材料的栅极绝缘层厚大,介电常数高,会导致薄膜晶体管性能下降,所以本发明的技术方案同时在该黑色树脂中掺杂少量金属粉末(如银粉、铜粉等),以降低其介电常数,保证薄膜晶体管的良好性能。
如图2、图3所示,本发明的薄膜晶体管阵列基板的实施例,包括栅线10、数据线20以及形成在栅线10和数据线20限定的像素区域内的像素电极210,还包括:
形成在基板1上的栅电极202;
形成在栅电极202上方的黑矩阵208、有源层204,栅电极202和有源层204通过覆盖于栅电极202上的黑矩阵208隔离;
形成在有源层204上的源电极205、漏电极206;
形成在源电极205、漏电极206和有源层204上的彩色滤光层209,所述像素电极210位于彩色滤光层209上并通过穿过所述彩色滤光层209的过孔211与所述漏电极206连接。
本发明的薄膜晶体管阵列基板的实施例,有源层204和源/漏极205、206直接设置在黑矩阵208上,彩色滤光层分别覆盖各个子像素区域,同时覆盖薄膜晶体管区域,共同对下层的数据线20和源/漏极205、206进行绝缘保护。本发明的薄膜晶体管阵列基板的实施例省去了栅绝缘层和保护层的设置,减少一次掩膜曝光工艺,大大简化基板的制造工艺,同时免除了两次等离子气相成膜工序,显著缩短了工艺时间,降低了工艺的复杂度;同时有效减薄了基板厚度。
本发明的薄膜晶体管阵列基板的实施例,其中,彩色滤光层209为三原色的彩色滤光层,其包括红、蓝、绿三色区域,而形成彩色滤光层209需要三次掩膜曝光工艺,由此本发明的薄膜晶体管阵列基板的实施例的制造工艺共需要七次掩膜曝光工艺,相比原来的八次掩膜曝光工艺,制造基板的工艺大大简化,同时免除了两次等离子气相成膜工序,显著缩短了工艺时间,降低了工艺的复杂度,大大减少生产成本。
本发明的薄膜晶体管阵列基板的实施例,其中,所述黑矩阵208的材料的介电常数为4-5。
本发明的薄膜晶体管阵列基板的实施例,其中,黑矩阵208的覆盖栅线10和栅电极202上方,黑矩阵208对其上方的数据线10也有遮挡作用。
本发明的薄膜晶体管阵列基板的实施例,其中,所述黑矩阵208的材料为黑色树脂,所述黑矩阵208中均匀分散有金属粉末,金属粉末的加入会使黑矩阵208的介电常数降低,为了避免充当栅极绝缘层的黑矩阵208对薄膜晶体管特性产生不良影响,金属粉末的加入量应当使黑矩阵208的介电常数为4-5为宜。
本发明的薄膜晶体管阵列基板的实施例,其中,黑矩阵208中均匀分散的金属粉末可以是银粉或铜粉或两者的混合物。
本发明的薄膜晶体管阵列基板的实施例,其中,黑矩阵208的材料优选为黑色感光树脂。
结合图4所示,为避免漏光,本发明的薄膜晶体管阵列基板的实施例,其中,所述黑矩阵208在所述栅线10延伸方向上的宽度大于所述栅线10的宽度,所述黑矩阵208在其上方的所述数据线20的延伸方向上的宽度也大于数据线20的宽度。
本发明的薄膜晶体管阵列基板的实施例,其中,在所述栅线10延伸方向上,所述黑矩阵208到所述基板1的垂直投影的边缘与所述像素电极210到所述基板1的垂直投影的边缘之间存在重叠。三原色的彩色滤光层209的红、绿、蓝三色区域依次设置于相邻的三个子像素区域,同时覆盖右侧的数据线上方,对源电极205、漏电极206进行绝缘保护。
本发明的显示器的实施例,包括薄膜晶体管阵列基板,所述薄膜晶体管阵列基板为本发明的薄膜晶体管阵列基板的实施例。
本发明的显示器的实施例,因为采用了本发明的薄膜晶体管阵列基板,其产品品质进一步提高。
结合图5所示,本发明的薄膜晶体管阵列基板的制造工艺的实施例,包括如下步骤:
步骤100、在基板上沉积栅金属薄膜,通过构图工艺形成栅线和栅电极的图形;
步骤200、在完成步骤100的基板上形成黑矩阵的图形;
步骤300、在完成步骤200的基板上形成有源层和源/漏电极的图形;
步骤400、在完成步骤300的基板上依次形成三原色的彩色滤光层的图形以及贯穿所述彩色滤光层的过孔图形;
步骤500、在完成步骤400的基板上形成像素电极的图形。
本发明的薄膜晶体管阵列基板的制造工艺,其中,步骤100、步骤200、步骤300、步骤500各需要一次掩膜曝光,步骤400需要三次掩膜曝光,整个制造工艺共需要七次掩膜曝光,相比原来的八次掩膜曝光,制造基板的工艺大大简化,同时免除了两次等离子气相成膜工序,显著缩短了工艺时间,降低了工艺的复杂度,大大减少生产成本,同时也减小了基板的厚度。
本发明的薄膜晶体管阵列基板的制造工艺的实施例,其中,所述步骤100包括:
步骤11、提供一基板;
步骤12、在基板上沉积栅金属薄膜;
步骤13、在栅金属薄膜上涂敷一层光刻胶;
步骤14、采用掩膜板对光刻胶进行曝光,使光刻胶形成光刻胶未保留区域和光刻胶保留区域,所述光刻胶保留区域对应于栅线和栅电极的图形所在区域,所述光刻胶未保留区域对应于上述图形以外的区域;
步骤15、进行显影处理,光刻胶未保留区域的光刻胶被完全去除,光刻胶保留区域的光刻胶厚度保持不变;
步骤16、通过刻蚀工艺完全刻蚀掉光刻胶未保留区域的栅金属薄膜,形成栅线和栅电极的图形;
步骤17、剥离剩余的光刻胶。
本发明的薄膜晶体管阵列基板的制造工艺的实施例,其中,所述步骤200包括:
步骤21、在完成步骤100的基板上形成黑色感光树脂材料;
步骤22、对黑色感光树脂材料利用掩膜版进行曝光、显影,得到黑矩阵图形。
本发明的薄膜晶体管阵列基板的制造工艺的实施例,其中,所述步骤300包括:
在完成步骤200的基板上沉积有源层以及源漏极层金属,然后进行半曝光工艺,多次刻蚀后,得到源/漏极以及有源层结构。本发明的薄膜晶体管阵列基板的制造工艺的实施例,其中,所述步骤400包括:
步骤41、在完成步骤300的基板上形成彩色滤光树脂层;
步骤42、对所述彩色滤光树脂层直接利用掩膜版进行曝光、显影后得到具有过孔结构的彩色滤光层图形。
本发明的薄膜晶体管阵列基板的制造工艺的实施例,其中,所述步骤500包括:
在完成步骤400的基板上沉积像素电极层,形成像素电极的图形。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (8)
1.一种薄膜晶体管阵列基板,包括栅线、数据线以及形成在栅线和数据线限定的像素区域内的像素电极,其特征在于,还包括:
形成在基板上的栅电极;
形成在栅电极上方的黑矩阵、有源层,栅电极和有源层通过覆盖于所述栅电极的所述黑矩阵隔离;
均形成在有源层上的源电极、漏电极;
形成在源电极、漏电极和有源层上的彩色滤光层,所述像素电极位于彩色滤光层上并通过穿过所述彩色滤光层的过孔与所述漏电极连接。
2.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述黑矩阵的材料的介电常数为4-5。
3.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述黑矩阵的材料为黑色树脂,所述黑矩阵中均匀分散有金属粉末。
4.如权利要求3所述的薄膜晶体管阵列基板,其特征在于,所述金属粉末从以下材料中选取:银粉、铜粉。
5.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述黑矩阵在所述栅线延伸方向上的宽度大于所述栅线的宽度,所述黑矩阵在所述数据线延伸方向上的宽度大于所述数据线宽度。
6.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,在所述栅线延伸方向上,所述黑矩阵到所述基板的垂直投影的边缘与所述像素电极到所述基板的垂直投影的边缘之间存在重叠。
7.一种显示器,包括薄膜晶体管阵列基板,其特征在于,所述薄膜晶体管阵列基板为如权利要求1-6任一项所述的薄膜晶体管阵列基板。
8.一种薄膜晶体管阵列基板的制造工艺,其特征在于,包括如下步骤:
步骤1、在基板上沉积栅金属薄膜,通过构图工艺形成栅线和栅电极的图形;
步骤2、在完成步骤1的基板上形成黑矩阵的图形;
步骤3、在完成步骤2的基板上形成有源层以及源/漏电极的图形;
步骤4、在完成步骤3的基板上依次形成三原色的彩色滤光层的图形以及贯穿所述彩色滤光层的过孔图形;
步骤5、在完成步骤4的基板上形成像素电极的图形。
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