CN103178708B - Static charge source and method for calibrating same - Google Patents

Static charge source and method for calibrating same Download PDF

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CN103178708B
CN103178708B CN201310048784.0A CN201310048784A CN103178708B CN 103178708 B CN103178708 B CN 103178708B CN 201310048784 A CN201310048784 A CN 201310048784A CN 103178708 B CN103178708 B CN 103178708B
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electric charge
source
output
static electric
voltage
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CN103178708A (en
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王斌
延峰
冯文武
桑琳
焦海妮
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Beijing Dongfang Measurement and Test Institute
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Abstract

Disclosed are a static charge source and a method for calibrating the same. Influence of output load and output voltage on the quantity of charge outputted by the static charge source is quite low, and the static charge source is applicable to high-precision circuits, and comprises a direct-current voltage source. A high end of the direct-current voltage source is connected with a high charge output end by an internal reference capacitor. The static charge source is characterized in that a charge output node between the internal reference capacitor and the high charge output end is connected with an in-phase end of an amplifying circuit, a low end of the direct-current voltage source, a reverse end of the amplifying circuit and a follower voltage output end are respectively connected with a low end node of the direct-current voltage source, and a low charge output end corresponding to the high charge output end is grounded.

Description

Static electric charge source and calibration steps thereof
Technical field
The present invention relates to Charge Source technology, particularly a kind of static electric charge source and calibration steps thereof.The output charge amount in described static electric charge source is very little by the impact of output load and output voltage, has steady output characteristics, can be referred to as " direct current (or static) Heng Heyuan ", can be applicable to high-precision circuit.
Background technology
Static electric charge source can be used in calibration charge measurement instrument, charge amplifier and signal conditioner, and also claim electric charge calibrating device, its basic functional principle as shown in Figure 1.In Fig. 1, static electric charge source 1 comprises direct voltage source Es, the high-end of described direct voltage source Es connects electric charge output high-end 2 by internal reference capacitance Cs, described direct voltage source Es low side connects electric charge and exports low side 3, export between low side 3 in electric charge output high-end 2 and electric charge and form Charge Source output voltage Vo, static electric charge amount Q oexport high-end 2 from internal reference capacitance Cs through electric charge to export.When the DC voltage value of Es and the capacitance of Cs known, according to formula (1) determine export static electric charge amount Q o, its prerequisite is output voltage Vo is zero, or little of negligible degree.
Q o=C s×E s………………………………(1)
This Charge Source structure is simple, and output noise is little, but there is following problem:
(1) output charge amount is by the impact of input capacitance being calibrated instrument: because static electric charge source is mainly used in calibrating electric charge testing tool and charge amplifier etc., the instrument that some is calibrated adopts the couple capacitors quantity of electric charge to sample, this capacitor becomes the load of static electric charge source output terminal, at this moment, equivalent electrical circuit as shown in Figure 2.In fig. 2, the electric charge in static electric charge source 1 export high-end 2 and electric charge export between low side 3 and be connected to load capacitance CL.When the load capacitance value of output terminal is C ltime, actual output charge amount is:
Q o = C s C L C s + C L × E s - - - ( 2 )
The output charge amount relative error γ caused by load capacitance cfor:
γ c = C s C L + C s - - - ( 3 )
By formula (3), C lless, the error of generation is larger. and only have and work as C lmuch larger than C stime, its impact just can be ignored.What have is about 100pF by school instrument input equivalent capacitance value, and the internal electrical capacitance in static electric charge source is more than or equal to 100pF, and this error is about 50%.Static electric charge source output charge amount is very large by the impact of the input capacitance being calibrated instrument.
(2) output charge amount is subject to by the impact of school instrument input end offset voltage: be calibrated instrument input end and certainly exist offset voltage Vi.Consider offset influence, the actual output charge amount in static electric charge source is:
Q o=C s×(E s-V i)………………………………………(4)
The uncertain of offset voltage has direct impact to the quantity of electric charge that static electric charge source exports.Particularly under the working environment that accuracy requirement is high, this problem is more outstanding.
Summary of the invention
Affecting problem in order to solve the output charge amount that exists in existing static electric charge source by output load and output voltage, the invention provides a kind of static electric charge source and calibration steps thereof.Described static electric charge source can in certain scope, output charge amount is very little by the impact of output load and output voltage, can accurately, stably output charge, there is steady output characteristics, can be referred to as " direct current (or static) Heng Heyuan ", thus can be applicable to high-precision circuit.Another object of the present invention is to provide the method for this Charge Source calibration.
Technical scheme of the present invention is as follows:
Static electric charge source, comprise direct voltage source, the high-end of described direct voltage source exports high-end by internal reference capacitance connection electric charge, it is characterized in that, described internal reference capacitance and described electric charge export the in-phase end of high-end connection amplifying circuit, the backward end of described amplifying circuit and follow voltage output end and be connected to direct voltage source low entry node, exports high-end electric charge relative to described electric charge and exports low side ground connection.
Described direct voltage source comprises digital to analog converter, and described digital to analog converter connects DC power supplier, and connects CPU by photoelectric isolation module.
Described amplifying circuit is by insulating power supply model calling DC power supplier.
Described internal reference capacitance is in parallel with programmed switch.
Calibrate the method in above-mentioned static electric charge source, it is characterized in that, comprise the following steps: A, electric charge in described static electric charge source export high-end output between low side with electric charge and be connected a standard capacitance, and its capacitance is C n; B, the static electric charge amount of the output in described static electric charge source is set to 0, then follows the 1st DC voltage value Vc1 of voltage output end with DC digital voltmeter measurement; C, the static electric charge amount of the output in described static electric charge source is set to Q s, then follow the 2nd DC voltage value Vc2 of voltage output end with DC digital voltmeter measurement, deduct Vc1 by Vc2 and obtain Vc, by Vc and C nproduct obtain export static electric charge amount standard value Q n, compare settings Q swith standard value Q ncomplete calibration.
Technique effect of the present invention is as follows: adopt technical scheme of the present invention, has good steady output characteristics, and be one " direct current (or static) Heng Heyuan ", its equivalent source electric capacity is less than 10 -15f; Eliminate and leak and the impact of interference on output charge amount, ensure the accurate output of static electric charge amount, solving the output charge amount that exists in existing static electric charge source affects problem by output voltage and load capacitance.The capacitance of standard capacitor can be traceable to capacitance parameter, and the DC voltage measurement of digital multimeter is traceable to DC voltage parameter.Therefore, static electric charge source calibration method of the present invention, static electric charge amount can directly be traceable to DC voltage and capacitance parameter.
Accompanying drawing explanation
Fig. 1 is prior art Charge Source circuit structure schematic diagram.
Equivalent circuit structure schematic diagram when Fig. 2 is prior art Charge Source access capacitive load.
Fig. 3 is the circuit structure schematic diagram implementing static electric charge source of the present invention.
Fig. 4 is another circuit structure schematic diagram implementing static electric charge source of the present invention.
Fig. 5 implements the calibration circuit structure principle chart that the present invention calibrates the method employing in static electric charge source.
Reference numeral lists as follows: 1-static electric charge source; 2-electric charge exports high-end; 3-electric charge exports low side; Es – direct voltage source; Cs-internal reference capacitance; Q o-static electric charge amount; Vo-Charge Source output voltage; C l-load capacitance; 4-amplifying circuit; 5-follows voltage output end; A-electric charge output node; B-direct voltage source low entry node; 6-CPU; 7-photoelectric isolation module; 8-digital to analog converter; 9-DC power supplier; 10-insulating power supply module; 11-equivalent potential screen end; K-programmed switch; 12-DC digital voltmeter; C n-standard capacitance.
Embodiment
Below in conjunction with accompanying drawing (Fig. 3-Fig. 5), the present invention will be described.
Fig. 3 is the circuit structure schematic diagram implementing static electric charge source of the present invention.As shown in Figure 3, static electric charge source 1, comprise direct voltage source Es, the high-end of described direct voltage source Es connects electric charge output high-end 2 by internal reference capacitance Cs, described internal reference capacitance Cs and the described electric charge electric charge output node a exported between high-end 2 is connected the in-phase end of amplifying circuit 4, the low side of described direct voltage source Es, the backward end of described amplifying circuit 4 and follow voltage output end 5 and be connected to direct voltage source low entry node b, the electric charge exporting high-end 2 relative to described electric charge exports low side 3 ground connection.Fig. 4 is another circuit structure schematic diagram implementing static electric charge source of the present invention.Fig. 4 is based on the circuit theory of Fig. 3.Described direct voltage source Es comprises digital to analog converter 8(DAC), described digital to analog converter 8 connects DC power supplier 9, and connects CPU6 by photoelectric isolation module 7.Described amplifying circuit 4 connects DC power supplier 9 by insulating power supply module 10.Described internal reference capacitance Cs is in parallel with programmed switch K.In the present embodiment, high-end 2 each sensitive nodes be connected are exported with electric charge in dashed region in Fig. 4, all adopt high insulating material independent support, the line connecting these nodes carries out equivalent potential screen by gauze screen, and its screen potential is provided by amplification circuit output end.
Fig. 5 implements the calibration circuit structure principle chart that the present invention calibrates the method employing in static electric charge source.Shown in figure 5, a kind of method of calibrating above-mentioned static electric charge source, comprises the following steps: A, electric charge in described static electric charge source export high-end output between low side with electric charge and be connected a standard capacitance, and its capacitance is C n; B, the static electric charge amount of the output in described static electric charge source is set to 0, then follows the 1st DC voltage value Vc1 of voltage output end with DC digital voltmeter measurement; C, the static electric charge amount of the output in described static electric charge source is set to Q s, then follow the 2nd DC voltage value Vc2 of voltage output end with DC digital voltmeter measurement, deduct Vc1 by Vc2 and obtain Vc, by Vc and C nproduct obtain export static electric charge amount standard value Q n, compare settings Q swith standard value Q ncomplete calibration.
As follows to further description of the present invention:
As shown in Figure 3, static electric charge source comprises voltage source, capacitor, amplifying circuit, electric charge output terminal, follows voltage output end, voltage source high-end with capacitor one be extremely connected, another pole of capacitor connects electric charge output terminal and exports, the in-phase end of amplifying circuit connects electric charge output terminal, the end of oppisite phase of amplifying circuit is connected with the output terminal of amplifying circuit, and the output terminal of amplifying circuit is connected with voltage source low side, and with follow voltage output end and be connected.Amplifying circuit and voltage source adopt independently-powered.When the output terminal in static electric charge source connects various load, when the output terminal in static electric charge source connect be calibrated instrument there is offset voltage time, its result all makes the output voltage of Charge Source output terminal be not equal to zero.This output voltage is fed back to the low side of voltage source by amplifying circuit.Voltage source output voltage is always by the voltage at the retroactive effect keeping capacitor two ends of amplifier, make the output charge amount of Charge Source be the product of voltage source two ends output voltage values Es and capacitor electrode capacitance Cs, overcome the impact of output load and offset voltage.
As shown in Figure 4, voltage source is 16 DAC in the present embodiment, and absolute error is less than 1LSB, and amplifier adopts AD549LH electrostatic amplifier, and input current is less than 60fA, common-mode rejection ratio 90dB.Capacitor adopts low leakage high precision capacitor, and bleeder resistance is greater than 10 14Ω, relative error is less than 0.05%.Electrostatic amplifier adopts insulating power supply to realize independently-powered.In order to discharge initial charge to capacitor, access a high insulation low electric capacity programmed switch K at capacitor Cs two ends, its insulation resistance is greater than 10 14Ω
In Fig. 4, first, under the control of the central microprocessor CPU of Charge Source, the low capacitance switch K that insulated by height closes, and discharges to capacitor Cs.Again according to the quantity of electric charge settings Qs exported, calculating digital to analog converter DAC output voltage according to formula (5) is:
E s = Q s C s - - - ( 5 )
CPU is E by light-coupled isolation control DAC output amplitude sdC voltage.
When the input current of electrostatic amplifier is enough little, within the specified time, the quantity of electric charge of input current accumulation is less than Charge Source output step value and ignores.The offset voltage of electrostatic amplifier is less than DAC output voltage 1LSB and ignores.Output charge amount Q oequal capacitor C son the quantity of electric charge that fills, i.e. output charge amount Q ofor:
Q o=C s×E s………………………………(6)
Output charge amount has nothing to do with load and output voltage, and the steady realizing the quantity of electric charge exports.
Circuit board surface resistance due to static electric charge source is 10 11Ω magnitude, the resistance of above-mentioned resistance also will decline in wet condition.If capacitor Cs directly welds on circuit boards, as long as electric capacity two ends have 1V voltage to produce 10 -11the leakage current of A, the output charge amount error caused thus equals the product of leakage current values and time rating.Therefore, in the present embodiment, export high-end 2 each sensitive nodes be connected with electric charge in dashed region in Fig. 4, adopt high insulating material independent support, insulating material resistance is greater than 10 14Ω, recycling equivalent potential screen device (relay and capacitor), set up equivalent potential screen current potential using the output of amplifier as mask voltage, the difference of screen potential and conductively-closed current potential is that the offset voltage of amplifier is 10 -4v magnitude, when time rating is 60s, leaks the output charge amount error caused and is less than 10 -16c.
The steady characteristic of Charge Source can be weighed with " the output charge amount that the change of output voltage causes changes ":
C source = | d Q o d V o | - - - ( 6 )
C sourcebe called electric capacity in equivalent source, this value is less, and the steady characteristic of Charge Source is better, more close to desirable permanent lotus source characteristic.
The steady characteristic of Charge Source before circuit the present invention shown in analysis chart 1, in its equivalent source, electric capacity is:
C source = | d Q o d V o | = | d ( ( E s - V o ) C s ) d V o | = C s - - - ( 7 )
The C of this Charge Source sminimum value is 100pF, and in equivalent source, electric capacity is 100pF, namely 10 -10f.
As follows to the circuit analysis of Fig. 4:
Consider the input offset voltage V of amplifier os, common-mode rejection ratio CMRR, input offset current I os, the factor such as Open loop gain cofficient A, the output voltage that can be obtained amplifier by Fig. 4 is:
V b = A 1 + A V o + A 1 + A V os + 10 - CMRR 20 V o - - - ( 9 )
The voltage at capacitor two ends is:
V Cs = E s + V b - V o = E s - 1 1 + A V o + A 1 + A V os + 10 - CMRR 20 V o - - - ( 10 )
Output charge amount is:
Q o = C s × V Cs - ∫ 0 t I os dξ = C s × ( E s - 1 1 + A V o + A 1 + A V os + 10 - CMRR 20 V o ) - ∫ 0 t I os dξ - - - ( 11 )
From formula (11) can draw the steady characteristic of invention Charge Source, in its equivalent source, electric capacity is:
C source = | d Q o d V o | = | ( - 1 1 + A + 10 - CMRR 20 ) × C s | - - - ( 12 )
The C of Charge Source sminimum value is 100pF, and the Open loop gain cofficient of amplifier is that A is greater than 10 6, common-mode rejection ratio CMRR is greater than 100dB, and in equivalent source, electric capacity is 1fF, and namely 10 -15f.Steady characteristic improves 5 orders of magnitude.
Output charge amount absolute error is:
Δ Q o ≈ ( γ Cs + γ Es ) C s E s + C s × ( - 1 A V o + V os + 10 - CMRR 20 V o ) - ∫ 0 t I os dξ - - - ( 13 )
The limiting error of output charge amount is:
Δ Q lim=a% × Qs ± b% × Q m(14) in formula, Δ Q limfor the limiting error of certain range, unit C;
A% is the proportional error coefficient of this range;
B% is the fixterm error coefficient of this range;
Qs is quantity of electric charge settings, unit C;
Qm is this range full scale value, unit C;
Proportional error is coefficient:
a%=γ Cs+γ Es……………………………………(15)
In formula (15), the 1st is the relative error of Charge Source internal capacitor capacitance, and the 2nd is the relative error of internal source voltage output voltage.Voltage source adopts 16 DAC, γ es≤ 0.005%; Capacitor adopts high insulation precision capacitor, its relative error γ cs≤ 0.05%; Therefore, Charge Source proportional error a%≤0.055% invented.
Fixterm error coefficient is:
b % = ( - 1 A V o + V os + 10 - CMRR 20 V o ) E sm - 1 C s E sm ∫ 0 t I os dξ - - - ( 16 )
In formula, E smfor the maximum voltage that certain range voltage source exports, unit V;
CMRR is amplifier common mode rejection ratio, unit dB;
Vo is Charge Source output voltage values, unit V;
Vos is offset voltage of amplifier, unit V;
Cs is the capacitance of Charge Source internal precision capacitor, unit F;
Ios is amplifier offset current, unit A.
The offset voltage V of amplifier oscan be eliminated by calibration, but the factor impacts such as temperature make V osdrift about, the drift delta V of offset voltage osaffect the fixterm error of Charge Source.Equally, offset current I oscan be eliminated by calibration, but the factor impacts such as temperature make I osdrift about, the drift delta I of offset current osaffect the fixterm error of Charge Source.Consider that the polarity of some factors is uncertain, therefore formula (16) can become:
b % = V o A E sm + V o E sm 10 - CMRR 20 + Δ V os E sm + 1 C s E sm ∫ 0 t Δ I os dξ - - - ( 17 )
In formula (17), the 1st and the 2nd is the relative error that Charge Source steady characteristic causes; 3rd is the relative error that offset voltage of amplifier causes; 4th is the relative error that amplifier offset current causes.From formula (17), quantity of electric charge range is lower, E smand C sless, fixterm error is larger.If the E of Charge Source sm>=100mV, C s>=100pF, CMRR>=100dB, Δ V os<20 μ V, Δ I os<2fA, Open loop gain cofficient A>=10 of amplifier 6, the output voltage≤1V of Charge Source, for the specified output time t≤10s calibrated, fixterm error coefficient is 0.23%.The correlation parameter of each range and limiting error thereof are in table 1.
In table 1, the correlation parameter of each range and limiting error thereof
Range Esm Cs A CMRR ΔV os ΔI os t V O a% b%
(C) (V) (F) (dB) (μV) (fA) (s) (V)
10 -6 10 100n 10 6 100 20 2 100000 10 0.055% 0.02%
10 -7 10 10n 10 6 100 20 2 10000 10 0.055% 0.02%
10 -8 10 1n 10 6 100 20 2 1000 10 0.055% 0.02%
10 -9 1 1n 10 6 100 20 2 100 10 0.055% 0.02%
10 -10 1 100p 10 6 100 20 2 100 10 0.055% 0.2%
10 -11 0.1 100p 10 6 100 20 2 10 1 0.055% 0.2%
Calibrate static electric charge source of the present invention, adopt the calibration circuit shown in Fig. 5, digital multimeter is connected to the output terminal of amplifying circuit, namely follows voltage output end, standard capacitor C naccess electric charge output terminal.First, make static electric charge source output charge amount settings be 0, digital multimeter records the DC voltage V following output terminal and export c1for standard capacitor C nthe initial value V of two ends DC voltage o0with offset voltage of amplifier V osdifference:
V c1=V o0—V os………………………………………(18)
In (18) formula, Vos is amplifying circuit offset voltage, V o0for standard capacitor C nthe initial value of two ends DC voltage.
Static electric charge source settings are Q s, the reading V of DC voltage measured by digital multimeter c2for:
V c2=Q n/C n+V o0—V os=Q n/C n+V c1……………………………………(19)
Order: V c=V c2-V c1:
Q n=V C×C n…………………………………(20)
Utilize the standard value C of standard capacitor nwith dc voltage measurements V c, output charge amount standard value Q can be obtained from formula (20) n.Output charge amount settings Q swith output charge amount standard value Q ncompare calibration.
In the methods described above, the standard value of standard capacitor is traceable to capacitance parameter from national measurement institute, and the DC voltage measurement of digital multimeter is traceable to DC voltage parameter.Therefore, utilize above-mentioned calibration steps, static electric charge amount value can directly be traceable to DC voltage and capacitance parameter.

Claims (5)

1. static electric charge source, comprise direct voltage source, the high-end of described direct voltage source exports high-end by internal reference capacitance connection electric charge, it is characterized in that, described internal reference capacitance and described electric charge export high-end between electric charge output node be connected the in-phase end of amplifying circuit, the low side of described direct voltage source, the backward end of described amplifying circuit and follow voltage output end and be connected to direct voltage source low entry node, electric charge exports low side ground connection.
2. static electric charge source according to claim 1, is characterized in that, described direct voltage source comprises digital to analog converter, and described digital to analog converter connects DC power supplier, and connects CPU by photoelectric isolation module.
3. static electric charge source according to claim 1, is characterized in that, described amplifying circuit is by insulating power supply model calling DC power supplier.
4. static electric charge source according to claim 1, is characterized in that, described internal reference capacitance is in parallel with programmed switch.
5. calibrate the method in the described static electric charge source of one of claim 1-4, it is characterized in that, comprise the following steps: A, electric charge in described static electric charge source export high-end output between low side with electric charge and be connected a standard capacitance, and its capacitance is C n; B, the static electric charge amount of the output in described static electric charge source is set to 0, then follows the 1st DC voltage value Vc1 of voltage output end with DC digital voltmeter measurement; C, the static electric charge amount of the output in described static electric charge source is set to Q s, then follow the 2nd DC voltage value Vc2 of voltage output end with DC digital voltmeter measurement, deduct Vc1 by Vc2 and obtain Vc, by Vc and C nproduct obtain export static electric charge amount standard value Q n, compare settings Q swith standard value Q ncomplete calibration.
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CN108008334A (en) * 2017-12-29 2018-05-08 中国计量科学研究院 A kind of faint electric charge calibration method
CN108226840A (en) * 2017-12-29 2018-06-29 中国计量科学研究院 A kind of faint charge calibration system

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CN101702012A (en) * 2009-11-24 2010-05-05 中国西电电气股份有限公司 Apparent charge calibrator for local discharge capacity measurement

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US4158808A (en) * 1977-08-18 1979-06-19 The Valeron Corporation Load source simulator
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