CN103178207A - Memristor - Google Patents
Memristor Download PDFInfo
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- CN103178207A CN103178207A CN2011104314324A CN201110431432A CN103178207A CN 103178207 A CN103178207 A CN 103178207A CN 2011104314324 A CN2011104314324 A CN 2011104314324A CN 201110431432 A CN201110431432 A CN 201110431432A CN 103178207 A CN103178207 A CN 103178207A
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Abstract
The invention discloses a memristor. A resistive random access memory medium layer is stacked through tungsten oxides and titanium oxynitride. By means of the memristor, initial resistance and low-impedance resistance of apparatuses can be improved, the maximum operation current and power consumption of apparatuses can be reduced, and broad selection is provided for development of the memristor.
Description
Technical field
The present invention relates to a kind of semiconductor device, particularly relate to a kind of resistance memory of recalling.
Background technology
Non-volatile line storage (NVM) technology is sent out sexual development so far, mainly contains floating boom (floating gate) technology, dividing potential drop grid (split gate) technology and SONOS technology.And recent years, recalling resistance memory (RRAM) is also that the resistance-variable random asccess memory becomes the most popular memory technology of industry, it has numerous proud characteristics, it is more likely the technology of revolutionary change that semiconductor industry is produced, make it become a kind of general-purpose storage structure, towards DRAM, NAND, NOR etc. use in all kinds of markets.
As shown in Figure 1, be the existing structural representation of recalling the resistance memory, as shown in Figure 2, be the existing SEM photo of recalling the resistance memory.Existing recall the resistance memory and comprise a resistance-change memory dielectric layer 14 that is formed by tungsten oxide, the bottom electrode material 13 that is formed by tungsten, the top electrode 12 that is formed by metallic aluminium or aluminium copper, and the bottom electrode 11 that is formed by metallic aluminium or aluminium copper.Described bottom electrode material 13 is positioned at the below of described resistance-change memory dielectric layer 14 and contacts with described resistance-change memory dielectric layer 14, and the bottom of described bottom electrode material 13 connects described bottom electrode 11.Described top electrode 12 directly contacts with described resistance-change memory dielectric layer 14, also can comprise a top layer electrode material that is comprised of titanium or titanium nitride between described top electrode 12 and described resistance-change memory dielectric layer 14.As seen from Figure 2, the existing thickness of described resistance-change memory dielectric layer 14 of recalling the resistance memory that provides of Fig. 2 is 61nm.
Existing recall when the resistance memory externally adds higher forward bias voltage the high resistant characteristic can appear, when low resistance characteristic occurring in the other direction when it is carried out the negative sense bias voltage.Described bottom electrode 11 ground connection, described top electrode 12 are forward bias when connecing high potential; Described bottom electrode 11 connects high potential, is the negative sense biasing during described top electrode 12 ground connection.
The characteristic that an existing restriction recalling the resistance memory is used weakness in other words is that the resistance of initial resistance and low resistance state resistance is very low, thereby as with the resistance of the single through hole resistance of size stock size to 0.2 * 0.2 micron square less than 100 ohm, maximum also is difficult to reach kilohm.The existing low resistance characteristic decision of recalling the resistance memory can make to be recalled the resistance memory and can produce larger electric current in carrying out the voltage bias process existing, usually the operating voltage of resistive characteristic needs 2 volts～5 volts, conversion is come, and the existing electric current of recalling the generation of resistance memory to single through hole when resistive is voltage-operated is the number milliampere.This electric current can produce two abominable effects: the one, and the requirement circuit design needs very large current driving ability, and produces very large power consumption, greatly the use of limits storage and capacity; The 2nd, requirement connects this existing enough electric current degree of holding of metal routing needs of recalling the resistance memory cell, the electric current of number milliampere needs the above metal live width of corresponding micron order usually, this wiring width than the memory of other kind is wide one more than the order of magnitude, otherwise will cause the ELECTROMIGRATION PHENOMENON of metal wire, greatly restrict chip area and application.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of resistance memory of recalling, and can improve initial resistance and the low resistance state resistance of device, can reduce maximum operating current and the power consumption of device, for the development of recalling the resistance memory provides broader selection.
For solving the problems of the technologies described above, provided by the inventionly to recall the resistance memory and comprise a resistance-change memory dielectric layer, this resistance-change memory dielectric layer is formed by stacking by tungsten oxide and titanium oxynitrides.
Further improve and be, described recall the resistance memory also comprise the bottom electrode material that is formed by tungsten, the top layer electrode material that is formed by titanium or titanium nitride, the top electrode that is formed by metallic aluminium or aluminium copper, and the bottom electrode that is formed by metallic aluminium or aluminium copper; Described bottom electrode material is positioned at the below of described resistance-change memory dielectric layer and contacts with the described tungsten oxide of described resistance-change memory dielectric layer, and the bottom of described bottom electrode material connects described bottom electrode; Described top layer electrode material is positioned at the top of described resistance-change memory dielectric layer and contacts with the described titanium oxynitrides of described resistance-change memory dielectric layer, and the top of described top layer electrode material connects described top electrode.
Further improving is that the thickness of described tungsten oxide is 100 dusts～1000 dusts; The thickness of described titanium oxynitrides is 50 dusts～300 dusts.
The present invention can improve initial resistance and the low resistance state resistance of device, can reduce maximum operating current and the power consumption of device, for the development of recalling the resistance memory provides broader selection.Principle is: resistance-change memory dielectric layer of the present invention is to be formed by stacking by tungsten oxide and titanium oxynitrides, has at the interface more complicated network configuration and an interfacial state condition of binary at tungsten oxide and titanium oxynitrides.When the resistive material is that low-resistance tungsten oxide component in the resistance-change memory dielectric layer is when moving to the interface of two kinds of oxidized metals, electronics is easy to move to the interfacial state zone, and electronics can form the Tunnel Passing effect of secondary at the titanium oxynitrides place, the Tunnel Passing electric current is very little with respect to the electron transfer electric current of metal, therefore, the low resistance state resistance of device of the present invention several orders of magnitude that can raise.
Description of drawings
The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments:
Fig. 1 is the existing structural representation of recalling the resistance memory;
Fig. 2 is the existing SEM photo of recalling the resistance memory;
Fig. 3 is the structural representation that the embodiment of the present invention is recalled the resistance memory;
Fig. 4 is the energy band diagram that the embodiment of the present invention is recalled the resistance memory.
Embodiment
Fig. 3 is the structural representation that the embodiment of the present invention is recalled the resistance memory; The embodiment of the present invention is recalled the resistance memory and is comprised a resistance-change memory dielectric layer, and this resistance-change memory dielectric layer is formed by stacking by tungsten oxide 142 and titanium oxynitrides 141.The thickness of described tungsten oxide 142 is 100 dusts～1000 dusts; The thickness of described titanium oxynitrides 141 is 50 dusts～300 dusts.
Also comprise the bottom electrode material 131 that is formed by tungsten, the top layer electrode material 122 that is formed by titanium or titanium nitride, the top electrode 121 that is formed by metallic aluminium or aluminium copper, and the bottom electrode 111 that is formed by metallic aluminium or aluminium copper; Described bottom electrode material 131 is positioned at the below of described resistance-change memory dielectric layer and contacts with the described tungsten oxide 142 of described resistance-change memory dielectric layer, and the bottom of described bottom electrode material 131 connects described bottom electrode 111; Described top layer electrode material 122 is positioned at the top of described resistance-change memory dielectric layer and contacts with the described titanium oxynitrides 141 of described resistance-change memory dielectric layer, and the top of described top layer electrode material 122 connects described top electrode 121.
As shown in Figure 4, be the energy band diagram that the embodiment of the present invention is recalled the resistance memory.Can find out and have at the interface a lower interfacial state of an energy level at tungsten oxide and titanium oxynitrides.When device is in low resistance state, after the embodiment of the present invention is recalled resistance memory making current, electronics is easy to first move to the interfacial state zone, then pass through the titanium oxynitrides layer by the tunnelling mode, being electronics can form the Tunnel Passing effect of secondary at the titanium oxynitrides place, the Tunnel Passing electric current is very little with respect to the electron transfer electric current of metal, therefore, and the low resistance state resistance of embodiment of the present invention device several orders of magnitude that can raise.Take one 0.25 micron square (being wide and long all as 0.25 micron) single-pass hole resistance as example, the low resistance state of existing device or the resistance value of initial resistance are in 50 ohm (ohm) left and right, and maximum is no more than 100 ohm.And in the embodiment of the present invention, as adopting the tungsten oxide material (WOx) of 500 dusts and the titanium oxynitrides lamination of 150 dusts, the low resistance state resistance of acquisition can reach more than 3000 ohm.Be that resistance value can improve nearly two orders of magnitude, that is to say, the initial power consumption of device can reduce nearly two orders of magnitude.The application development of recalling the resistance memory that is reduced to of the resistance value of the low resistance state of embodiment of the present invention device provides more wide selection, if the electric current degree of holding of the metal routing of device is reduced, the live width of metal routing is reduced; Can also make the required current driving ability of device reduce.
Abovely by specific embodiment, the present invention is had been described in detail, but these are not to be construed as limiting the invention.In the situation that do not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (3)
1. recall the resistance memory for one kind, it is characterized in that: recall the resistance memory and comprise a resistance-change memory dielectric layer, this resistance-change memory dielectric layer is formed by stacking by tungsten oxide and titanium oxynitrides.
2. as claimed in claim 1ly recall the resistance memory, it is characterized in that: described recall the resistance memory also comprise the bottom electrode material that is formed by tungsten, the top layer electrode material that is formed by titanium or titanium nitride, the top electrode that is formed by metallic aluminium or aluminium copper, and the bottom electrode that is formed by metallic aluminium or aluminium copper; Described bottom electrode material is positioned at the below of described resistance-change memory dielectric layer and contacts with the described tungsten oxide of described resistance-change memory dielectric layer, and the bottom of described bottom electrode material connects described bottom electrode; Described top layer electrode material is positioned at the top of described resistance-change memory dielectric layer and contacts with the described titanium oxynitrides of described resistance-change memory dielectric layer, and the top of described top layer electrode material connects described top electrode.
3. as claimed in claim 1ly recall the resistance memory, it is characterized in that: the thickness of described tungsten oxide is 100 dusts～1000 dusts; The thickness of described titanium oxynitrides is 50 dusts～300 dusts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110431432.4A CN103178207B (en) | 2011-12-21 | 2011-12-21 | Memristor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110431432.4A CN103178207B (en) | 2011-12-21 | 2011-12-21 | Memristor |
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| CN103178207A true CN103178207A (en) | 2013-06-26 |
| CN103178207B CN103178207B (en) | 2015-06-03 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206936A (en) * | 2015-05-06 | 2016-12-07 | 华邦电子股份有限公司 | Resistive random access memory |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101159309A (en) * | 2007-11-08 | 2008-04-09 | 复旦大学 | Method for implementing low power consumption resistance memory |
| CN101315969A (en) * | 2008-06-26 | 2008-12-03 | 复旦大学 | Resistor memory with doping control layer |
| US20110147696A1 (en) * | 2009-12-23 | 2011-06-23 | Samsung Electronics Co., Ltd. | Resistive random access memory devices and resistive random access memory arrays having the same |
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2011
- 2011-12-21 CN CN201110431432.4A patent/CN103178207B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101159309A (en) * | 2007-11-08 | 2008-04-09 | 复旦大学 | Method for implementing low power consumption resistance memory |
| CN101315969A (en) * | 2008-06-26 | 2008-12-03 | 复旦大学 | Resistor memory with doping control layer |
| US20110147696A1 (en) * | 2009-12-23 | 2011-06-23 | Samsung Electronics Co., Ltd. | Resistive random access memory devices and resistive random access memory arrays having the same |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206936A (en) * | 2015-05-06 | 2016-12-07 | 华邦电子股份有限公司 | Resistive random access memory |
| CN106206936B (en) * | 2015-05-06 | 2019-03-08 | 华邦电子股份有限公司 | Resistive random access memory |
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| CN103178207B (en) | 2015-06-03 |
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