CN103165628B - Multifunctional exposure imaging method based on composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector - Google Patents

Multifunctional exposure imaging method based on composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector Download PDF

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CN103165628B
CN103165628B CN201110417263.9A CN201110417263A CN103165628B CN 103165628 B CN103165628 B CN 103165628B CN 201110417263 A CN201110417263 A CN 201110417263A CN 103165628 B CN103165628 B CN 103165628B
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CN103165628A (en
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闫锋
马浩文
胡悦
吴福伟
夏好广
卜晓峰
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Nanjing Weipaishi Semiconductor Technology Co Ltd
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Abstract

Provided is a multifunctional exposure imaging method based on a composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector. The exposure imaging method includes the steps that negative bias pulse Vb is added to a substrate, a forward voltage pulse Vp is added to one end of a source electrode or a drain electrode, the other end of the source electrode or the other end of the drain electrode is floated, or the source electrode and the drain electrode are respectively provided with one forward voltage pulse Vp, the source electrode and the drain electrode are additionally provided with a bias pulse larger than bias voltage of the substrate, meanwhile zero bias voltage or a forward bias pulse Vg is added to a control grid, and the substrate and a source and drain region generate a depletion layer. The number range of the Vg is 0-20V, the number range of the Vb is -20-0V, and the number range of the Vp is 0-10V. By means of adjustment of voltage, the detector can collect photoelectrons so that exposure imaging of the device is carried out. The multifunctional exposure imaging method has the advantages of having low-voltage operation, being free of dark current interference and accurate in imaging, detecting in low light, and being fast in imaging speed and the like.

Description

基于复合介质栅MOSFET光敏探测器的多功能曝光成像方法Multifunctional Exposure Imaging Method Based on Composite Dielectric Gate MOSFET Photosensitive Detector

技术领域 technical field

本发明涉及成像探测器件的信号获取方法,尤其是基于复合介质栅MOSFET关于红外、可见光波段至紫外波段的成像探测器件工作机制,是一种复合介质栅MOSFET光敏探测器的多功能曝光成像方法。 The invention relates to a signal acquisition method of an imaging detection device, in particular to the working mechanism of an imaging detection device based on a composite dielectric gate MOSFET for infrared, visible light to ultraviolet bands, and is a multifunctional exposure imaging method for a composite dielectric gate MOSFET photosensitive detector.

背景技术 Background technique

  成像探测器在军事民用等各个领域都有很大的应用,当前发展的主要成像探测器是CCD和CMOS-APS,CCD出现较早,技术相对比较成熟,它的基本结构是一列列MOS电容串联,通过电容上面电压脉冲时序控制半导体表面势阱产生和变化,进而实现光生电荷信号的存储和转移读出,也正是由于这个信号转移特点,电荷转移速度很受限制,所以成像速度不高,另外由于是电容串联,一个电容有问题会影响整行信号的传输,所以对工艺要求极高,成品率和成本不够理想。CMOS-APS每个像素采用二极管和晶体管组成,的每个像素都是相互独立的,在整个信号传输过程中不需要串行移动电荷,某一个像素出现问题不影响其他像素性能,所以克服了CCD在此方面的缺点,所以对工艺要求也不是那么苛刻,COMS 由于采用单点信号传输,通过简单的X-Y 寻址技术,允许从整个排列、部分甚至单元来读出数据,从而提高寻址速度,实现更快的信号传输。不过CMOS-APS每个像素由多个晶体管与一个感光二极管构成(含放大器与A/D 转换电路),使得每个像素的感光区域只占据像素本身很小的表面积,灵敏度和分辨率相对较小。 Imaging detectors are widely used in various fields such as military and civilian use. The main imaging detectors currently developed are CCD and CMOS-APS. CCD appeared earlier and the technology is relatively mature. Its basic structure is a series of MOS capacitors connected in series The generation and change of the semiconductor surface potential well is controlled by the voltage pulse sequence on the capacitor, and then the storage and transfer readout of the photogenerated charge signal is realized. It is precisely because of this signal transfer characteristic that the charge transfer speed is very limited, so the imaging speed is not high. In addition, since capacitors are connected in series, a problem with one capacitor will affect the transmission of the entire line of signals, so the process requirements are extremely high, and the yield and cost are not ideal. Each pixel of CMOS-APS is composed of diodes and transistors. Each pixel is independent of each other. There is no need to serially move charges during the entire signal transmission process. A problem with a certain pixel does not affect the performance of other pixels, so it overcomes CCD. Due to the shortcomings in this aspect, the process requirements are not so harsh. COMS uses single-point signal transmission and uses simple X-Y addressing technology to allow data to be read from the entire arrangement, part or even unit, thereby increasing the addressing speed. Achieve faster signal transmission. However, each pixel of CMOS-APS is composed of multiple transistors and a photosensitive diode (including amplifier and A/D conversion circuit), so that the photosensitive area of each pixel only occupies a small surface area of the pixel itself, and the sensitivity and resolution are relatively small. .

  通过比较发现两种传统成像探测技术各有优劣,CMOS-APS近年来伴随着CMOS工艺的不断进步取得了迅速的发展,向我们展现了他的巨大前景,可见提出一种基于CMOS工艺并能够尽量克服传统CMOS-APS的缺点的成像探测器意义重大。因此本申请人于专利WO2010/094233中提出了一种基于CMOS工艺的复合介质栅光敏探测器。 Through comparison, it is found that the two traditional imaging detection technologies have their own advantages and disadvantages. CMOS-APS has achieved rapid development along with the continuous progress of CMOS technology in recent years, showing us its great prospects. It can be seen that a CMOS-based technology and can be proposed Imaging detectors that overcome the shortcomings of traditional CMOS-APS as much as possible are of great significance. Therefore, the present applicant proposed a composite dielectric gate photosensitive detector based on CMOS technology in patent WO2010/094233.

发明内容 Contents of the invention

本发明的目的是,提出一种基于复合介质栅MOSFET光敏探测器提出一种多功能曝光成像方法,通过源漏偏压调节器件工作模式。可以收集到更多的光电子,获得信号的放大.当耗尽区中电场达到雪崩电场时,即使很弱的光也能激发出足够多光电子的产生。 The object of the present invention is to propose a multi-functional exposure imaging method based on a composite dielectric gate MOSFET photosensitive detector, and adjust the working mode of the device through the source-drain bias voltage. More photoelectrons can be collected to obtain signal amplification. When the electric field in the depletion region reaches an avalanche electric field, even weak light can stimulate the generation of enough photoelectrons.

本发明的技术方案,复合介质栅MOSFET光敏探测器单管结构(如图1)包括:半导体衬底(P型)1;半导体衬底正上方依次设有底层绝缘介质5,光电子存储层4,顶层绝缘介质3,控制栅2;半导体衬底1中(靠近叠层介质两侧)通过离子注入掺杂形成N型源极6和漏极7;所述电荷存储层4是多晶硅、Si3N4或其它电子导体或半导体;控制栅2是多晶硅、金属或透明导电电极,控制栅极面或基底层至少有一处为对探测器探测波长透明或半透明的窗口。两层绝缘介质有效隔离电荷存储区,使电荷限制的电荷存储层4内实现存储功能,一般为宽带半导体,以保证电子可以从P型半导体衬底1穿越势垒而进入电荷存储层4。底层介质材料可以采用氧化硅、SiON或其它高介电常数介质;顶层介质的材料可以采用氧化硅/氮化硅/氧化硅、氧化硅/氧化铝/氧化硅、氧化硅、氧化铝或其它高介电常数介质材料。底层绝缘介质5,光电子存储层4,顶层绝缘介质3,控制栅2的尺寸采用22nm*22nm~0.18μm*0.18μm。 According to the technical solution of the present invention, the composite dielectric gate MOSFET photosensitive detector single-tube structure (as shown in Figure 1) includes: a semiconductor substrate (P-type) 1; an underlying insulating medium 5, an optoelectronic storage layer 4, and Top layer insulating dielectric 3, control gate 2; N-type source 6 and drain 7 are formed by ion implantation in semiconductor substrate 1 (close to both sides of stacked dielectric); the charge storage layer 4 is polysilicon, Si 3 N 4 or other electronic conductors or semiconductors; the control grid 2 is polysilicon, metal or transparent conductive electrode, and at least one of the control grid surface or base layer is a transparent or semi-transparent window for the detection wavelength of the detector. The two layers of insulating medium effectively isolate the charge storage area, so that the storage function is realized in the charge-limited charge storage layer 4, which is generally a broadband semiconductor, so as to ensure that electrons can enter the charge storage layer 4 from the P-type semiconductor substrate 1 across the potential barrier. The bottom dielectric material can be silicon oxide, SiON or other high dielectric constant dielectric; the top dielectric material can be silicon oxide/silicon nitride/silicon oxide, silicon oxide/alumina/silicon oxide, silicon oxide, aluminum oxide or other high The dielectric constant of a dielectric material. The dimensions of the bottom insulating medium 5 , the optoelectronic storage layer 4 , the top insulating medium 3 and the control gate 2 are 22nm*22nm~0.18μm*0.18μm.

基于复合介质栅MOSFET光敏探测器的多功能曝光成像方法:曝光成像过程步骤是: 在衬底加一负偏压脉冲Vb,源极6或漏极7的一端加一正向电压脉冲Vp且另一端浮空或源极6漏极7同时加一正向电压脉冲Vp,,源极和漏极加上了一个大于衬底偏压的偏压脉冲,同时控制栅要加零偏压或加0~20V的正向偏压脉冲Vg.衬底和源漏区会产生耗尽层。光子激发产生的光电子在控制栅和源漏电场的驱动下向一部分向着P型半导体衬底1和底层介质5的界面处加速移动,当电子能量达到一定程度就会越过底层介质5与P型半导体衬底1的势垒注入电荷存储层4;还有一部分光电子在源漏结电场的驱动下向着源漏PN结高场区加速移动,调节Vp与Vb的数值,使Vp和Vb的电压差为0~11V,可以使此PN结到达深耗尽,在光照时可以产生更多的光电子,这些光电子会注入电荷存储层4,电荷存储层4电荷量的变化导致光敏探测器阈值电压的变化,由于光敏探测器器件源极和漏极加上了一个大于衬底偏压的偏压脉冲,在没有光子提供能量时,电子从源漏极排出,几乎没有电子注入电荷存储层4,因而几乎没有暗电流。同时由于这是一个热电子的过程,所以光电子的收集几乎不受底层介质中电场的限制,栅压在很小时就可以成像,因而可以低压操作。而在有光时,光子给电子提供能量,从而使电子能够越过底层介质5与P型半导体衬底1的势垒从而注入电荷存储层4。这个变化可以通过读取过程得到,进而可以知道电荷存储层4中光电子数目。 Multifunctional exposure imaging method based on composite dielectric gate MOSFET photosensitive detector: exposure imaging process steps are: add a negative bias voltage pulse Vb to the substrate, add a forward voltage pulse Vp to one end of the source electrode 6 or the drain electrode 7 and another One end is floating or the source 6 and the drain 7 are simultaneously applied with a positive voltage pulse Vp, the source and the drain are applied with a bias pulse greater than the substrate bias voltage, and the control gate is applied with zero bias or 0 ~20V forward bias pulse Vg. The substrate and source and drain regions will generate depletion layers. The photoelectrons generated by photon excitation are driven by the control gate and the source-drain electric field to accelerate toward the interface between the P-type semiconductor substrate 1 and the bottom layer dielectric 5, and when the energy of the electrons reaches a certain level, they will cross the bottom layer dielectric 5 and the P-type semiconductor layer. The potential barrier of the substrate 1 is injected into the charge storage layer 4; some photoelectrons are accelerated to move toward the high field region of the source-drain PN junction under the drive of the source-drain junction electric field, and the values of Vp and Vb are adjusted so that the voltage difference between Vp and Vb is 0~11V, can make this PN junction reach deep depletion, can generate more photoelectrons when illuminated, these photoelectrons will be injected into the charge storage layer 4, the change of the charge amount of the charge storage layer 4 leads to the change of the threshold voltage of the photosensitive detector, Since a bias pulse greater than the substrate bias voltage is added to the source and drain of the photosensitive detector device, when no photons provide energy, electrons are discharged from the source and drain, and almost no electrons are injected into the charge storage layer 4, so there is almost no dark current. At the same time, because this is a hot electron process, the collection of photoelectrons is almost not limited by the electric field in the underlying medium, and the gate voltage can be imaged at a small time, so it can be operated at low voltage. When there is light, the photons provide energy to the electrons, so that the electrons can cross the potential barrier between the underlying dielectric 5 and the P-type semiconductor substrate 1 and inject into the charge storage layer 4 . This change can be obtained through the reading process, and then the number of photoelectrons in the charge storage layer 4 can be known.

调节Vp与Vb数值,使Vp和Vb的电压差大于11V,光敏探测器源极和漏极的PN结到达雪崩电压,在电子加速过程中会在结附近激发出更多的电子空穴对,同时赋予这些电子空穴对足够的能量越过底层介质5与P型半导体衬底1的势垒,从而有更多的电荷会注入电荷存储层4,可以通过调节电压从而调节雪崩发生的部位(pn结区 或 底层介质正下方耗尽层),当雪崩状态下收集时,光电信号被放大,增益很大,即便是很弱的光强同样可以激发足够的光电子产生。由于雪崩过程很迅速,只需要很短的电压脉冲既可以实现编程。 Adjust the values of Vp and Vb so that the voltage difference between Vp and Vb is greater than 11V, and the PN junction of the source and drain of the photosensitive detector reaches the avalanche voltage, and more electron-hole pairs will be excited near the junction during the electron acceleration process. At the same time, these electron-hole pairs are endowed with sufficient energy to cross the potential barrier between the underlying dielectric 5 and the P-type semiconductor substrate 1, so that more charges will be injected into the charge storage layer 4, and the location where the avalanche occurs can be adjusted by adjusting the voltage (pn The junction area or the depletion layer directly below the bottom layer), when collected in an avalanche state, the photoelectric signal is amplified and the gain is very large, even a very weak light intensity can also stimulate enough photoelectrons to generate. Because the avalanche process is very fast, only a short voltage pulse is needed to realize programming.

本发明的有益效果是:所述复合介质栅MOSFET光敏探测器工作在源漏偏压条件下, 可以通过调节操作电压使器件工作在不同的模式,使下器件表现出不同的性能,扩展其应用范围. 通过增加衬底电压Vb或Vp,耗尽区增大,可以收集到更多的光电子,同时P型半导体衬底1表面电场增大,产生的光电子向着P型半导体衬底1和底层介质5界面处和源漏方向移动的过程中能量很大会激发出更多的电子空穴,获得信号的放大.当耗尽区中电场达到雪崩电场时,即使很弱的光也能激发出足够多光电子的产生。 The beneficial effects of the present invention are: the composite dielectric gate MOSFET photosensitive detector works under the source-drain bias condition, and the device can be operated in different modes by adjusting the operating voltage, so that the lower device exhibits different performances and expands its application Range. By increasing the substrate voltage Vb or Vp, the depletion region increases, and more photoelectrons can be collected. At the same time, the electric field on the surface of the P-type semiconductor substrate 1 increases, and the generated photoelectrons move toward the P-type semiconductor substrate 1 and the underlying medium. 5. During the process of moving at the interface and in the direction of source and drain, the energy will excite more electron holes and obtain signal amplification. When the electric field in the depletion region reaches the avalanche electric field, even weak light can excite enough Generation of photoelectrons.

在P型半导体衬底1加一负偏压脉冲Vb,源极6或漏极7的一端加一正向电压脉冲Vp(另一端浮空)或源极6漏极7同时加一正向电压脉冲Vp,同时控制栅2要加零偏压或加正向偏压脉冲Vg,P型半导体衬底和源漏区会产生耗尽层。光子激发产生的光电子在控制栅和源漏电压的驱动下向一部分向着P型半导体衬底1和底层介质5界面处加速移动,当电子能量达到一定程度就会越过底层介质5与P型半导体衬底1的势垒注入电荷存储层;还有一部分光电子在源漏结电场的驱动下流向源漏区。 Apply a negative bias pulse Vb to the P-type semiconductor substrate 1, apply a positive voltage pulse Vp to one end of the source 6 or drain 7 (the other end is floating), or apply a forward voltage to the source 6 and drain 7 at the same time Pulse Vp, while the control gate 2 is to be applied with zero bias or forward bias pulse Vg, the P-type semiconductor substrate and the source and drain regions will produce a depletion layer. The photoelectrons generated by the photon excitation are driven by the control gate and the source-drain voltage to accelerate toward the interface between the P-type semiconductor substrate 1 and the bottom dielectric 5, and when the electron energy reaches a certain level, they will cross the bottom dielectric 5 and the P-type semiconductor substrate. The potential barrier of the bottom 1 is injected into the charge storage layer; and some photoelectrons flow to the source and drain regions driven by the electric field of the source and drain junctions.

增加衬底电压Vb或Vp,耗尽区增大,可以收集到更多的光电子,同时P型半导体衬底1表面电场增大,产生的光电子向着P型半导体衬底1和底层介质5界面处和源漏方向移动的过程中能量很大会激发出更多的电子空穴,并赋予这些电子足够的能量越过底层介质5与P型半导体衬底1的势垒,获得信号的放大.当耗尽区中电场达到雪崩电场时,即使很弱的光也能激发出足够多光电子的产生。 Increase the substrate voltage Vb or Vp, the depletion region increases, and more photoelectrons can be collected. At the same time, the surface electric field of the P-type semiconductor substrate 1 increases, and the generated photoelectrons move toward the interface between the P-type semiconductor substrate 1 and the underlying medium 5 In the process of moving in the direction of source and drain, the energy will excite more electron holes, and give these electrons enough energy to cross the potential barrier between the bottom dielectric 5 and the P-type semiconductor substrate 1, and obtain signal amplification. When exhausted When the electric field in the region reaches an avalanche electric field, even a very weak light can stimulate the generation of enough photoelectrons.

根据本发明所述工作方式具有如下特点:低压操作: 所述工作条件下光电子收集过程可以调节控制栅2压采用热电子注入方式,不用隧穿,可以降低操作电压,如栅压Vg可以用5v左右,远远低于隧穿要求的十几伏高压。无暗电流:所述工作条件下源漏极处于正向偏置,在没有光子提供能量时,并且探测器工作在PN结较低电压下时,电子几乎均从源漏极排出,因而几乎没有暗电流,而有光子注入时,光子提供给电子足够的能量使其越过底层介质5与P型半导体衬底1的势垒注入到电荷存储层4。成像准确:所述工作条件采用的是热电子的注入方式,光电子存储层收集到的电子几乎不受底层介质5中电场逐渐减小的影响,与光强呈现线性的关系,因此可以通过读取电荷存储层4收集到的电子得到准确的光强信息,从而得到准确的图像。高速探测:所述工作条件下可以通过调节电压使得源漏PN结在曝光过程中处于近击穿状态,光子触发雪崩存储光电子实现光探测,雪崩速度很快,很短的时间内就可以完成曝光过程,有助于实现高速探测。弱光探测:所述工作条件可以使得器件工作在雪崩条件下,光信号触发雪崩实现倍增效应,增益很大,对弱光同样有很好的相应,可以实现弱光探测。 The working mode according to the present invention has the following characteristics: low-voltage operation: under the working conditions, the photoelectron collection process can adjust the control gate 2 voltage and adopt the thermal electron injection mode, without tunneling, and can reduce the operating voltage. For example, the grid voltage Vg can be 5v About 10 volts, which is far lower than the high voltage required by tunneling. No dark current: under the working conditions, the source and drain are in forward bias, when there is no photon to provide energy, and when the detector works at a lower voltage of the PN junction, the electrons are almost all discharged from the source and drain, so there is almost no Dark current, when photons are injected, the photons provide enough energy for electrons to cross the potential barrier between the underlying dielectric 5 and the P-type semiconductor substrate 1 and inject them into the charge storage layer 4 . Accurate imaging: The described working condition adopts the injection method of hot electrons, and the electrons collected by the photoelectron storage layer are hardly affected by the gradual decrease of the electric field in the bottom medium 5, and have a linear relationship with the light intensity, so they can be read by reading The electrons collected by the charge storage layer 4 can obtain accurate light intensity information, thereby obtaining accurate images. High-speed detection: Under the above working conditions, the source-drain PN junction can be in a near-breakdown state during the exposure process by adjusting the voltage, and photons trigger avalanche storage of photoelectrons to realize light detection. The avalanche speed is very fast, and the exposure can be completed in a short time process, which helps to achieve high-speed detection. Weak light detection: the working conditions can make the device work under the avalanche condition, the optical signal triggers the avalanche to realize the multiplication effect, the gain is very large, and it also has a good response to weak light, and can realize weak light detection.

附图说明 Description of drawings

图1 为复合介质栅MOSFET光敏探测器基本结构。 Figure 1 shows the basic structure of the composite dielectric gate MOSFET photosensitive detector.

图2 为探测器工作在曝光条件下耗尽层形成。 Figure 2 shows the formation of the depletion layer when the detector works under exposure conditions.

图3 –图6 为四种光电子转移和存储的示意图。 Figures 3–6 are schematic diagrams of four types of photoelectron transfer and storage.

图7 为曝光过程中阈值电压变化的示意图。 Figure 7 is a schematic diagram of threshold voltage changes during exposure.

图8 为探测器曝光前后阈值电压变化和衬底电压的关系。 Figure 8 shows the relationship between the threshold voltage change and the substrate voltage before and after exposure of the detector.

图9 为探测器曝光前后阈值电压变化和光强的关系。 Figure 9 shows the relationship between the threshold voltage change and light intensity of the detector before and after exposure.

具体实施方法 Specific implementation method

下面将参阅附图说明本发明的工作过程和物理机制如下 The working process and physical mechanism of the present invention will be described below with reference to the accompanying drawings as follows

如图1为复合介质栅MOSFET光敏探测器基本结构,半导体衬底(P型)1,半导体衬底正上方依次设有底层绝缘介质5,光电子存储层4,顶层绝缘介质3,控制栅2,半导体衬底中1(靠近叠层介质两侧)通过离子注入掺杂形成N型源极6和漏极7。 Figure 1 shows the basic structure of a composite dielectric gate MOSFET photosensitive detector, a semiconductor substrate (P-type) 1, a bottom insulating medium 5, an optoelectronic storage layer 4, a top insulating medium 3, and a control gate 2 are arranged in sequence directly above the semiconductor substrate. N-type source 6 and drain 7 are formed in the semiconductor substrate 1 (close to both sides of the stack medium) by ion implantation doping.

所述光电子存储层是多晶硅、Si3N4或其它电子导体或半导体;控制栅2是多晶硅、金属或透明导电电极,控制栅极面或基底层至少有一处为对探测器探测波长透明或半透明的窗口。两层绝缘介质有效隔离电荷存储区4,使电荷限制的电荷存储层4内实现存储功能,一般为宽带半导体,以保证电子可以从P型半导体衬底1穿越势垒而进入电荷存储层4。底层介质材料可以采用氧化硅、SiON或其它高介电常数介质;顶层介质的材料可以采用氧化硅/氮化硅/氧化硅、氧化硅/氧化铝/氧化硅、氧化硅、氧化铝或其它高介电常数介质材。底层绝缘介质5,光电子存储层4,顶层绝缘介质3,控制栅2的尺寸采用22nm*22nm~0.18μm*0.18μm。 The optoelectronic storage layer is polysilicon, Si 3 N 4 or other electronic conductors or semiconductors; the control grid 2 is polysilicon, metal or transparent conductive electrodes, and at least one of the control grid surface or base layer is transparent or semi-transparent to the detection wavelength of the detector. transparent window. The two layers of insulating medium effectively isolate the charge storage region 4, so that the storage function is realized in the charge-limited charge storage layer 4, which is generally a broadband semiconductor, so as to ensure that electrons can pass through the potential barrier from the P-type semiconductor substrate 1 and enter the charge storage layer 4. The bottom dielectric material can be silicon oxide, SiON or other high dielectric constant dielectric; the top dielectric material can be silicon oxide/silicon nitride/silicon oxide, silicon oxide/alumina/silicon oxide, silicon oxide, aluminum oxide or other high Dielectric constant dielectric material. The dimensions of the bottom insulating medium 5 , the optoelectronic storage layer 4 , the top insulating medium 3 and the control gate 2 are 22nm*22nm~0.18μm*0.18μm.

光电转换过程:如图2所示编程过程,在源极6或漏极7的一端加一个0~10V的正向电压脉冲Vp且另一端浮空或者源极6和漏极7同时加一0~10V的相同的正向电压脉冲,P型半导体衬底1加一个-20~0V的负向偏压脉冲Vb,控制栅2加一个0~20V的正向偏压脉冲Vg,由于源极6漏极7相对衬底是一个PN结,在反偏压情况下形成深耗尽层区域,衬底上加的-20~0V的电压可以在衬底表面形成耗尽层,这样整个衬底下面形成连续的耗尽区域如图虚线所示。当光子到达耗尽区,如果光子能量光子hv> 半导体E g(或E g+ ΔE c),光子被半导体吸收并激发一个电子空穴对。 Photoelectric conversion process: the programming process shown in Figure 2, add a 0~10V positive voltage pulse Vp to one end of the source 6 or drain 7 and leave the other end floating or add a 0 to the source 6 and drain 7 at the same time For the same forward voltage pulse of ~10V, a negative bias pulse Vb of -20~0V is added to the P-type semiconductor substrate 1, and a forward bias pulse Vg of 0~20V is added to the control gate 2, because the source 6 The drain 7 is a PN junction with respect to the substrate, and a deep depletion layer region is formed under reverse bias, and a voltage of -20~0V applied to the substrate can form a depletion layer on the substrate surface, so that the entire substrate under the A continuous depletion region is formed as shown by the dotted line. When a photon reaches the depletion region, if the photon energy photon h v > semiconductor E g (or E g + Δ E c ), the photon is absorbed by the semiconductor and excites an electron-hole pair.

电子转移和存储:电子转移和存储主要有4种方式,如果光子的能量hv> 半导体E g+半导体与底层介质的 ΔE c,激发的光电子会直接进入底层介质5,然后在底层介质5电场的作用下迁移到电荷存储层4,如图3所示。如果光子能量不足够大,光子激发产生的光电子在耗尽层电场的驱动下,向着P型半导体衬底1和底层介质5界面处和源漏方向加速移动,当电子能量超过半导体与底层介质的ΔE c,光电子就可以越过势垒进入底层介质5,然后在底层介质5电场的作用下迁移到电荷存储层4,如图4所示。当底层介质中电场很高时,电子可以通过隧穿方式进入底层介质5,并在底层介质5中电场的作用下迁移到电荷存储层4,如图5所示。当耗尽区中电场达到雪崩电场时,产生的光电子和空穴会再运动过程中离化出更多的电子空穴对,并赋予电子足够的能量使其可以越过底层介质5与P型半导体衬底1势垒进入底层介质5,并在底层介质中电场的作用下迁移到电荷存储层4,产生倍增效应,如图6所示;由于即使在无光情况下也会有热激发等情况会产生暗电流,所以我们要在无光情况下编程一次,有光情况下编程一次,两次编程的阈值变化量再次作差值,得到的差值我们称为阈值变化(如图7所示),这个阈值变化乘以电容就即为表征光强的电荷量。 Electron transfer and storage: There are mainly 4 ways for electron transfer and storage. If the energy h v of photons > semiconductor E g + Δ E c between the semiconductor and the underlying medium, the excited photoelectrons will directly enter the underlying medium 5, and then in the underlying medium 5 Migrate to the charge storage layer 4 under the action of an electric field, as shown in FIG. 3 . If the photon energy is not large enough, the photoelectrons generated by the photon excitation will accelerate towards the interface between the P-type semiconductor substrate 1 and the underlying medium 5 and the direction of source and drain under the drive of the electric field of the depletion layer. Δ E c , the photoelectrons can cross the potential barrier and enter the bottom medium 5 , and then migrate to the charge storage layer 4 under the action of the electric field of the bottom medium 5 , as shown in FIG. 4 . When the electric field in the bottom medium is high, electrons can tunnel into the bottom medium 5 and migrate to the charge storage layer 4 under the action of the electric field in the bottom medium 5, as shown in FIG. 5 . When the electric field in the depletion region reaches the avalanche electric field, the generated photoelectrons and holes will ionize more electron-hole pairs during the movement process, and endow the electrons with enough energy to cross the bottom dielectric 5 and the P-type semiconductor The potential barrier of the substrate 1 enters the bottom medium 5, and migrates to the charge storage layer 4 under the action of the electric field in the bottom medium, resulting in a multiplication effect, as shown in Figure 6; since there will be thermal excitation even in the absence of light, etc. Dark current will be generated, so we need to program once in the absence of light and once in the presence of light, and make a difference between the threshold changes of the two programs again, and the resulting difference is called threshold change (as shown in Figure 7 ), the threshold change multiplied by the capacitance is the amount of charge that characterizes the light intensity.

增大探测器P型半导体衬底1电压,可以增大耗尽区宽度,从而增大光子收集区域,当调节P型半导体衬底1电压至雪崩电压时,由于光电子的倍增效应,阈值变化迅速增大,如图8所示。图8很好的证明了倍增过程的存在。 Increasing the voltage of the detector P-type semiconductor substrate 1 can increase the width of the depletion region, thereby increasing the photon collection area. When the voltage of the P-type semiconductor substrate 1 is adjusted to the avalanche voltage, the threshold value changes rapidly due to the multiplication effect of photoelectrons increase, as shown in Figure 8. Figure 8 nicely demonstrates the existence of the doubling process.

当P型半导体衬底1电压未达到雪崩电压,即未发生倍增时,电荷存储层4收集到的电子正比于入射光子数,因此在同样曝光时间下,阈值变化与光强呈正比,如图9所示,因此该编程机制可以很好的得到光强的数据,从而得到准确的图像。 When the voltage of the P-type semiconductor substrate 1 does not reach the avalanche voltage, that is, when the multiplication does not occur, the electrons collected by the charge storage layer 4 are proportional to the number of incident photons, so under the same exposure time, the threshold value change is proportional to the light intensity, as shown in the figure 9, so this programming mechanism can get the light intensity data very well, so as to get an accurate image.

Claims (1)

1., based on the multi-functional exposure image method of compound medium grid MOSFET light-sensitive detector, it is characterized in that:
The step of exposure image is: add a back bias voltage pulse Vb at P type semiconductor substrate, and one end of source electrode or drain electrode adds a forward voltage pulse Vp and other end floating; Or source drain adds a potential pulse Vp simultaneously, P type semiconductor substrate ( 1)add a back bias voltage pulse Vb, control gate adds zero-bias or adds forward bias pulse Vg simultaneously, and substrate and source-drain area can produce depletion layer; Vg number range 0 ~ 20v, Vb number range-20 ~ 0v, Vp number range 0 ~ 10V;
Photon excitation produce photoelectron cross underlying dielectric ( 5)with P type semiconductor substrate ( 1)potential barrier iunjected charge accumulation layer ( 4); Some photoelectron accelerates mobile under the driving of source-and-drain junction electric field towards source and drain PN junction high field region, regulate Vp and Vb numerical value, the voltage difference of Vp and Vb is made to be 0 ~ 11V, this PN junction can be made to arrive deeply exhaust, can more photoelectron be produced when illumination, these photoelectrons meeting iunjected charge accumulation layer ( 4), charge storage layer ( 4)the change of the quantity of electric charge causes the change of light-sensitive detector threshold voltage;
When there being light, photon provides energy to electronics, thus enable electronics cross underlying dielectric ( 5)with P type semiconductor substrate ( 1)potential barrier thus iunjected charge accumulation layer ( 4); This change obtains by reading process, so can know charge storage layer ( 4)middle photoelectron number.
2. the multi-functional exposure image method based on compound medium grid MOSFET light-sensitive detector according to claim 1, it is characterized in that exposure image procedure regulation Vp and Vb numerical value, the voltage difference of Vp and Vb is made to be greater than 11V, the PN junction of light-sensitive detector source electrode and drain electrode arrives avalanche voltage, more electron hole pair can be inspired near PN junction in Accelerating electron process, give the potential barrier that the enough energy of these electron hole pairs cross underlying dielectric (5) and P type semiconductor substrate (1) simultaneously, thus have more electric charge meeting iunjected charge accumulation layer (4), by regulation voltage thus regulate snowslide occur position, depletion layer immediately below PN junction area or underlying dielectric (5), when collecting photoelectron under avalanche condition, photosignal is exaggerated, gain is very large, even if very weak light intensity can excite enough photoelectrons to produce equally, because avalanche process is very rapid, only need very short potential pulse can realize programming.
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