CN103165628B - Multifunctional exposure imaging method based on composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector - Google Patents
Multifunctional exposure imaging method based on composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector Download PDFInfo
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Abstract
Provided is a multifunctional exposure imaging method based on a composite dielectric grating metal-oxide-semiconductor field-effect transistor (MOSFET) light-sensitive detector. The exposure imaging method includes the steps that negative bias pulse Vb is added to a substrate, a forward voltage pulse Vp is added to one end of a source electrode or a drain electrode, the other end of the source electrode or the other end of the drain electrode is floated, or the source electrode and the drain electrode are respectively provided with one forward voltage pulse Vp, the source electrode and the drain electrode are additionally provided with a bias pulse larger than bias voltage of the substrate, meanwhile zero bias voltage or a forward bias pulse Vg is added to a control grid, and the substrate and a source and drain region generate a depletion layer. The number range of the Vg is 0-20V, the number range of the Vb is -20-0V, and the number range of the Vp is 0-10V. By means of adjustment of voltage, the detector can collect photoelectrons so that exposure imaging of the device is carried out. The multifunctional exposure imaging method has the advantages of having low-voltage operation, being free of dark current interference and accurate in imaging, detecting in low light, and being fast in imaging speed and the like.
Description
Technical field
The present invention relates to the signal acquiring method of imaging detection device, especially based on compound medium grid MOSFET about infrared, visible light wave range to the imaging detection device working mechanism of ultraviolet band, be a kind of multi-functional exposure image method of compound medium grid MOSFET light-sensitive detector.
Background technology
Military affairs are civilian etc., every field has very large application to imaging detector, the main imaging detector of current development is CCD and CMOS-APS, CCD occurs comparatively early, technology is relatively ripe, its basic structure is the series connection of rows of mos capacitance, produced and change by potential pulse sequencing control semiconductor surface potential well above electric capacity, and then realize storage and the transfer reading of photogenerated charge signal, also just because of this signal metastasis characteristic, Charger transfer speed is very restricted, so image taking speed is not high, in addition owing to being capacitances in series, an electric capacity has problem can affect the transmission of full line signal, so high to technological requirement, rate of finished products and cost not ideal enough.The each pixel of CMOS-APS adopts diode and transistor composition, each pixel be separate, serial dislocation charge is not needed in whole signals transmission, some pixels go wrong does not affect other pixel performance, so overcome CCD shortcoming in this regard, so neither be so harsh to technological requirement, COMS is owing to adopting single point signals transmission, by simple X-Y addressing technique, allow from whole arrangement, partly even unit carrys out sense data, thus raising addressing speed, realize Signal transmissions faster.But each pixel of CMOS-APS is made up of (containing amplifier and A/D change-over circuit) multiple transistor AND gate light sensitive diode, and make the photosensitive region of each pixel only occupy the very little surface area of pixel itself, sensitivity and resolution are relatively little.
Respectively quality is had by comparing the traditional imaging detection technology of discovery two kinds, CMOS-APS achieves along with the continuous progress of CMOS technology in recent years and develops rapidly, present his huge prospect to us, visible propose a kind of based on CMOS technology and can to overcome the imaging detector of the shortcoming of traditional cmos-APS significant as far as possible.Therefore the applicant proposes a kind of composite dielectric gate light-sensitive detector based on CMOS technology in patent WO2010/094233.
Summary of the invention
The object of the invention is, propose a kind of based on a kind of multi-functional exposure image method of compound medium grid MOSFET light-sensitive detector proposition, by source and drain biased trim device mode of operation.More photoelectron can be collected, obtain the amplification of signal. when electric field in depletion region reaches snowslide electric field, even if very weak light also can inspire abundant photoelectronic generation.
Technical scheme of the present invention, compound medium grid MOSFET light-sensitive detector single tube structure (as Fig. 1) comprising: Semiconductor substrate (P type) 1; Bottom dielectric 5 is provided with successively, photoelectron accumulation layer 4, top layer dielectric 3, control gate 2 directly over Semiconductor substrate; In Semiconductor substrate 1, (near laminated medium both sides) forms N-type source electrode 6 and drain electrode 7 by ion implantation doping; Described charge storage layer 4 is polysilicon, Si
3n
4or other electronic conductor or semiconductor; Control gate 2 is polysilicon, metal or transparency conductive electrode, and control gate pole-face or basalis have at least a place to be to the transparent or semitransparent window of detector detection wavelength.Two-layer dielectric effectively isolates electric charge storage region, makes to realize memory function in the charge storage layer 4 of charge-limited, is generally broadband semiconductor, enters charge storage layer 4 to ensure electronics can pass through potential barrier from P type semiconductor substrate 1.Underlying dielectric material can adopt silica, SiON or other high dielectric constant; The material of top layer medium can adopt silicon oxide/silicon nitride/silicon oxide, silica/alumina/silica, silica, aluminium oxide or other high dielectric constant material.Bottom dielectric 5, photoelectron accumulation layer 4, top layer dielectric 3, the size of control gate 2 adopts μm * 0.18 μm, 22nm*22nm ~ 0.18.
Multi-functional exposure image method based on compound medium grid MOSFET light-sensitive detector: exposure image process steps is: add a back bias voltage pulse Vb at substrate, one end of source electrode 6 or drain electrode 7 adds a forward voltage pulse Vp and other end floating or source electrode 6 drain and 7 add a forward voltage pulse Vp simultaneously, source electrode and drain electrode add the bias pulse that is greater than substrate bias, and simultaneously control gate will add zero-bias or add the forward bias pulse Vg. substrate of 0 ~ 20V and source-drain area can produce depletion layer.The photoelectron that photon excitation produces accelerates mobile to a part towards the interface of P type semiconductor substrate 1 and underlying dielectric 5 under the driving of control gate and source and drain electric field, will cross the potential barrier iunjected charge accumulation layer 4 of underlying dielectric 5 and P type semiconductor substrate 1 when electron energy acquires a certain degree, some photoelectron accelerates mobile under the driving of source-and-drain junction electric field towards source and drain PN junction high field region, regulate the numerical value of Vp and Vb, the voltage difference of Vp and Vb is made to be 0 ~ 11V, this PN junction can be made to arrive deeply exhaust, more photoelectron can be produced when illumination, these photoelectrons meeting iunjected charge accumulation layer 4, the change of charge storage layer 4 quantity of electric charge causes the change of light-sensitive detector threshold voltage, because light-sensitive detector device source electrode and drain electrode add the bias pulse that is greater than substrate bias, when not having photon to provide energy, electronics is discharged from source-drain electrode, almost there is no electron injection charge storage layer 4, thus almost dark current is not had.Be simultaneously a thermionic process due to this, so photoelectronic collection is hardly by the restriction of electric field in underlying dielectric, grid voltage just can imaging when very little, thus can be low voltage operated.And when there being light, photon provides energy to electronics, thus electronics is enable to cross the potential barrier of underlying dielectric 5 and P type semiconductor substrate 1 thus iunjected charge accumulation layer 4.This change can be obtained by reading process, and then can know photoelectron number in charge storage layer 4.
Regulate Vp and Vb numerical value, the voltage difference of Vp and Vb is made to be greater than 11V, the PN junction of light-sensitive detector source electrode and drain electrode arrives avalanche voltage, more electron hole pair can be inspired near knot in Accelerating electron process, give the potential barrier that the enough energy of these electron hole pairs cross underlying dielectric 5 and P type semiconductor substrate 1 simultaneously, thus have more electric charge meeting iunjected charge accumulation layer 4, can by regulation voltage thus the position (pn interface or underlying dielectric immediately below depletion layer) regulating snowslide to occur, when collecting under avalanche condition, photosignal is exaggerated, gain is very large, even if very weak light intensity can excite enough photoelectrons to produce equally.Because avalanche process is very rapid, only need very short potential pulse both can realize programming.
The invention has the beneficial effects as follows: under described compound medium grid MOSFET light-sensitive detector is operated in source and drain bias condition, devices function can be made in different patterns by adjustment operation voltage, lower device is made to show different performances, expand its range of application. by increasing underlayer voltage Vb or Vp, depletion region increases, more photoelectron can be collected, P type semiconductor substrate 1 surface field increases simultaneously, the photoelectron produced inspires more electron hole towards energy in the process of P type semiconductor substrate 1 and underlying dielectric 5 interface and the movement of source and drain direction very conference, obtain the amplification of signal. when electric field in depletion region reaches snowslide electric field, even if very weak light also can inspire abundant photoelectronic generation.
A back bias voltage pulse Vb is added at P type semiconductor substrate 1, one end of source electrode 6 or drain electrode 7 adds a forward voltage pulse Vp(other end floating) or source electrode 6 drain and 7 add a forward voltage pulse Vp simultaneously, control gate 2 will add zero-bias or add forward bias pulse Vg simultaneously, and P type semiconductor substrate and source-drain area can produce depletion layer.The photoelectron that photon excitation produces accelerates mobile to a part towards P type semiconductor substrate 1 and underlying dielectric 5 interface under the driving of control gate and source-drain voltage, will cross the potential barrier iunjected charge accumulation layer of underlying dielectric 5 and P type semiconductor substrate 1 when electron energy acquires a certain degree; Some photoelectron flows to source-drain area under the driving of source-and-drain junction electric field.
Increase underlayer voltage Vb or Vp, depletion region increases, more photoelectron can be collected, P type semiconductor substrate 1 surface field increases simultaneously, the photoelectron produced inspires more electron hole towards energy in the process of P type semiconductor substrate 1 and underlying dielectric 5 interface and the movement of source and drain direction very conference, and give the potential barrier that the enough energy of these electronics cross underlying dielectric 5 and P type semiconductor substrate 1, obtain the amplification of signal. when electric field in depletion region reaches snowslide electric field, even if very weak light also can inspire abundant photoelectronic generation.
According to working method of the present invention, there is following features: low voltage operated: under described condition of work, photoelectron collection process can press employing hot electron injection mode by regulable control grid 2, without tunnelling, operating voltage can be reduced, as grid voltage Vg can use about 5v, well below tens volts of high pressure that tunnelling requires.Without dark current: under described condition of work, source-drain electrode is in forward bias, when not having photon to provide energy, and when detector is operated under PN junction low voltage, electronics is almost all discharged from source-drain electrode, thus almost dark current is not had, and when having photon to inject, photon is supplied to the enough energy of electronics makes its potential barrier of crossing underlying dielectric 5 and P type semiconductor substrate 1 be injected into charge storage layer 4.Imaging is accurate: what described condition of work adopted is thermionic injection mode, the electronics that photoelectron accumulation layer is collected is hardly by the impact that electric field in underlying dielectric 5 reduces gradually, linear relation is presented with light intensity, therefore the electronics can collected by reading electric charges accumulation layer 4 obtains intensity signal accurately, thus obtains image accurately.High-speed inspection: source and drain PN junction can be made in exposure process to be in nearly breakdown conditions by regulation voltage under described condition of work, photon triggering avalanche stores photoelectron and realizes optical detection, snowslide speed is very fast, just can complete exposure process, contribute to realizing high-speed inspection in the very short time.Weak light detection: described condition of work can make devices function under avalanche condition, and light signal triggering avalanche realizes multiplier effect, gain is very large, has well corresponding equally, can realize weak light detection to the low light level.
Accompanying drawing explanation
Fig. 1 is compound medium grid MOSFET light-sensitive detector basic structure.
Fig. 2 is that under detector is operated in conditions of exposure, depletion layer is formed.
The schematic diagram that Fig. 3 – Fig. 6 is four kinds of photoelectron transfers and stores.
Fig. 7 is the schematic diagram of threshold voltage variation in exposure process.
Fig. 8 is the relation of threshold voltage variation and underlayer voltage before and after detector exposure.
Fig. 9 is the relation of threshold voltage variation and light intensity before and after detector exposure.
Specific implementation method
Below accompanying drawings is illustrated the course of work of the present invention and physical mechanism as follows
If Fig. 1 is compound medium grid MOSFET light-sensitive detector basic structure, Semiconductor substrate (P type) 1, bottom dielectric 5 is provided with successively directly over Semiconductor substrate, photoelectron accumulation layer 4, top layer dielectric 3, control gate 2, in Semiconductor substrate, 1(is near laminated medium both sides) form N-type source electrode 6 and drain electrode 7 by ion implantation doping.
Described photoelectron accumulation layer is polysilicon, Si
3n
4or other electronic conductor or semiconductor; Control gate 2 is polysilicon, metal or transparency conductive electrode, and control gate pole-face or basalis have at least a place to be to the transparent or semitransparent window of detector detection wavelength.Two-layer dielectric effectively isolates electric charge storage region 4, makes to realize memory function in the charge storage layer 4 of charge-limited, is generally broadband semiconductor, enters charge storage layer 4 to ensure electronics can pass through potential barrier from P type semiconductor substrate 1.Underlying dielectric material can adopt silica, SiON or other high dielectric constant; The material of top layer medium can adopt silicon oxide/silicon nitride/silicon oxide, silica/alumina/silica, silica, aluminium oxide or other high dielectric constant material.Bottom dielectric 5, photoelectron accumulation layer 4, top layer dielectric 3, the size of control gate 2 adopts μm * 0.18 μm, 22nm*22nm ~ 0.18.
Photoelectric conversion process: programming process as shown in Figure 2, the forward voltage pulse Vp of a 0 ~ 10V is added and other end floating or source electrode 6 and the 7 identical forward voltage pulses simultaneously adding one 0 ~ 10V that drain in one end of source electrode 6 or drain electrode 7, P type semiconductor substrate 1 adds the negative bias pulse Vb of-20 ~ 0V, control gate 2 adds the forward bias pulse Vg of a 0 ~ 20V, because source electrode 67 counter substrate that drain are PN junctions, dark depletion layer area is formed in reverse bias situation, the voltage of substrate adds-20 ~ 0V can form depletion layer at substrate surface, continuous print depleted region is formed as indicated by the dashed lines below whole like this substrate.When photon arrives depletion region, if photon energy photon h
v> semiconductor
e g(or
e g+ Δ
e c), photon is by semiconductor absorber and excite an electron hole pair.
Electro transfer and storage: electro transfer and storage mainly contain 4 kinds of modes, if the energy h of photon
v> semiconductor
e gthe Δ of+semiconductor and underlying dielectric
e c, the photoelectron excited can directly enter underlying dielectric 5, then under the effect of underlying dielectric 5 electric field, moves to charge storage layer 4, as shown in Figure 3.If photon energy is enough large, the photoelectron that photon excitation produces, under the driving of depletion layer electric field, accelerates mobile, when electron energy exceedes the Δ of semiconductor and underlying dielectric towards P type semiconductor substrate 1 and underlying dielectric 5 interface and source and drain direction
e c, photoelectron just can be crossed potential barrier and enter underlying dielectric 5, then under the effect of underlying dielectric 5 electric field, moves to charge storage layer 4, as shown in Figure 4.When electric field in underlying dielectric is very high, electronics can enter underlying dielectric 5 by tunnelling mode, and in underlying dielectric 5 electric field effect under move to charge storage layer 4, as shown in Figure 5.When electric field in depletion region reaches snowslide electric field, the photoelectron produced and hole can again in motion process ionization go out more electron hole pair, and give the enough energy of electronics and make it can cross underlying dielectric 5 to enter underlying dielectric 5 with P type semiconductor substrate 1 potential barrier, and in underlying dielectric electric field effect under move to charge storage layer 4, produce multiplier effect, as shown in Figure 6; Even if dark current can be produced owing to also having the situations such as thermal excitation in unglazed situation, so we will programme once in unglazed situation, programme under having light situation once, the changes of threshold amount of twice programming makes difference again, the difference obtained we be called changes of threshold (as shown in Figure 7), this changes of threshold is multiplied by electric capacity and is just and characterizes the quantity of electric charge of light intensity.
Increase detector P type semiconductor substrate 1 voltage, can increase width of depletion region, thus increase photon collection region, when regulating P type semiconductor substrate 1 voltage to avalanche voltage, due to photoelectronic multiplier effect, changes of threshold increases rapidly, as shown in Figure 8.Fig. 8 well demonstrates the existence of multiplicative process.
When P type semiconductor substrate 1 voltage does not reach avalanche voltage, when namely there is not multiplication, the electron proportional that charge storage layer 4 is collected is in incident light subnumber, therefore under the same time for exposure, changes of threshold and light intensity proportional, as shown in Figure 9, therefore this programming mechanism can well obtain the data of light intensity, thus obtains image accurately.
Claims (1)
1., based on the multi-functional exposure image method of compound medium grid MOSFET light-sensitive detector, it is characterized in that:
The step of exposure image is: add a back bias voltage pulse Vb at P type semiconductor substrate, and one end of source electrode or drain electrode adds a forward voltage pulse Vp and other end floating; Or source drain adds a potential pulse Vp simultaneously, P type semiconductor substrate (
1)add a back bias voltage pulse Vb, control gate adds zero-bias or adds forward bias pulse Vg simultaneously, and substrate and source-drain area can produce depletion layer; Vg number range 0 ~ 20v, Vb number range-20 ~ 0v, Vp number range 0 ~ 10V;
Photon excitation produce photoelectron cross underlying dielectric (
5)with P type semiconductor substrate (
1)potential barrier iunjected charge accumulation layer (
4); Some photoelectron accelerates mobile under the driving of source-and-drain junction electric field towards source and drain PN junction high field region, regulate Vp and Vb numerical value, the voltage difference of Vp and Vb is made to be 0 ~ 11V, this PN junction can be made to arrive deeply exhaust, can more photoelectron be produced when illumination, these photoelectrons meeting iunjected charge accumulation layer (
4), charge storage layer (
4)the change of the quantity of electric charge causes the change of light-sensitive detector threshold voltage;
When there being light, photon provides energy to electronics, thus enable electronics cross underlying dielectric (
5)with P type semiconductor substrate (
1)potential barrier thus iunjected charge accumulation layer (
4); This change obtains by reading process, so can know charge storage layer (
4)middle photoelectron number.
2. the multi-functional exposure image method based on compound medium grid MOSFET light-sensitive detector according to claim 1, it is characterized in that exposure image procedure regulation Vp and Vb numerical value, the voltage difference of Vp and Vb is made to be greater than 11V, the PN junction of light-sensitive detector source electrode and drain electrode arrives avalanche voltage, more electron hole pair can be inspired near PN junction in Accelerating electron process, give the potential barrier that the enough energy of these electron hole pairs cross underlying dielectric (5) and P type semiconductor substrate (1) simultaneously, thus have more electric charge meeting iunjected charge accumulation layer (4), by regulation voltage thus regulate snowslide occur position, depletion layer immediately below PN junction area or underlying dielectric (5), when collecting photoelectron under avalanche condition, photosignal is exaggerated, gain is very large, even if very weak light intensity can excite enough photoelectrons to produce equally, because avalanche process is very rapid, only need very short potential pulse can realize programming.
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| CN106231213B (en) * | 2016-09-29 | 2023-08-22 | 北方电子研究院安徽有限公司 | CCD pixel structure with shutter capable of eliminating SMEAR effect |
| CN109655383A (en) * | 2017-10-11 | 2019-04-19 | 南京大学 | A kind of detection device and its method based on blood platelet projection imaging |
| CN109001900A (en) * | 2018-09-05 | 2018-12-14 | 南京大学 | A kind of micro imaging system and method for light field and fluorescent dual module state |
| CN110707116B (en) * | 2019-10-17 | 2021-08-24 | 德淮半导体有限公司 | Image sensor unit |
| CN111147772B (en) * | 2019-12-10 | 2022-04-22 | 南京威派视半导体技术有限公司 | Exposure method and circuit based on composite dielectric gate double-transistor photosensitive detector |
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Effective date of registration: 20190718 Address after: 211135 Second Floor of Unit B, 300 Zhihui Road, Qilin Science and Technology Innovation Park, Jiangning District, Nanjing City, Jiangsu Province Patentee after: Nanjing Weipaishi Semiconductor Technology Co., Ltd. Address before: 211135 Second Floor of Unit B, 300 Zhihui Road, Qilin Science and Technology Innovation Park, Jiangning District, Nanjing City, Jiangsu Province Patentee before: Nanjing Jixiang Sensing and Imaging Technology Research Institute Co., Ltd. |
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