CN103165561A - Encapsulation structure of silicon substrate pinboard - Google Patents

Encapsulation structure of silicon substrate pinboard Download PDF

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Publication number
CN103165561A
CN103165561A CN2013100629269A CN201310062926A CN103165561A CN 103165561 A CN103165561 A CN 103165561A CN 2013100629269 A CN2013100629269 A CN 2013100629269A CN 201310062926 A CN201310062926 A CN 201310062926A CN 103165561 A CN103165561 A CN 103165561A
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China
Prior art keywords
metal layer
back side
silica
silicon substrate
encapsulating structure
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CN2013100629269A
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Chinese (zh)
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CN103165561B (en
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张黎
赖志明
陈栋
陈锦辉
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Jiangyin Changdian Advanced Packaging Co Ltd
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Jiangyin Changdian Advanced Packaging Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

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Abstract

The invention relates to an encapsulation structure of a silicon substrate pinboard and belongs to the technical field of semiconductor encapsulation. The encapsulation structure of the silicon substrate pinboard comprises a silicon substrate carrier (1), an encapsulation region (2), a front insulation layer (31), a back insulation layer (32), a front re-wiring metal layer (41), a back re-wiring metal layer (42), a front protective layer (51) and a back protective layer (52). The encapsulation region (2), the front insulation layer (31), the back insulation layer (32), the front re-wiring metal layer (41), the back re-wiring metal layer (42), the front protective layer (51) and the back protective layer (52) are arranged on the periphery of the silicon substrate carrier (1) and are respectively and sequentially arranged on the front and the back of the silicon substrate carrier (1) and the front and the back of the encapsulation region (2). A through hole (21) for filling metal is formed in the encapsulation region (2), and the front re-wiring metal layer (41) is connected with the back re-wiring metal layer (42) through metal in the through hole (21). The encapsulation structure of the silicon substrate pinboard is simple in encapsulation structure, low in encapsulation cost and high in product yield.

Description

A kind of encapsulating structure of silica-based keyset
Technical field
The present invention relates to a kind of encapsulating structure of silica-based keyset, belong to the semiconductor packaging field.
Background technology
Along with the development of semiconductor technology, silicon through hole interconnection technique becomes the common method of semiconductor packages.Silicon through hole interconnection technique comprises the making of silicon through hole usually, the PECVD(plasma strengthens vapour deposition) technology shaping insulating barrier and metal filled, this technology has greatly increased the flexibility of semiconductor packages.
Silicon through hole interconnection technique also has been applied to the encapsulation of silica-based keyset, the silicon forming process of through hole mainly adopts " BOSCH " lithographic method, namely be used alternatingly etching and passivation technology, " BOSCH " lithographic method finally can stay the lines (scallop) that height rises and falls on hole wall, it is the hole wall ripple, as shown in Figure 1, not only speed is slow for the alternately lithographic method of " BOSCH ", and the hole wall ripple causes follow-up PECVD(plasma used to strengthen vapour deposition) insulating barrier that forms covers imperfect.Simultaneously, in the encapsulation process of silica-based keyset, CMP(chemico-mechanical polishing commonly used) the technique bottom of carrying out metal in surface evening and through hole exposes, in this polishing process, often cause metal or metal ion transport, make device produce electric leakage, cause product failure.Above factor has caused the encapsulation technology cost of existing silica-based keyset high, the finished product rate is low.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, the encapsulating structure of the silica-based keyset that a kind of encapsulating structure is simple, packaging cost is low, the finished product rate is high is provided.
The present invention is achieved in thatA kind of encapsulating structure of silica-based keyset comprises silicon substrate carrier, insulating barrier, interconnection metal layer and protective layer again,
The zone is sealed in the surrounding setting of described silicon substrate carrier; the described zone of sealing is sealed with the side of silicon substrate carrier and is connected; described insulating barrier comprises front insulating barrier and back side insulating barrier; described interconnection metal layer again comprises front interconnection metal layer and back side interconnection metal layer more again; described protective layer comprises front protecting layer and back-protective layer
Described front insulating barrier is arranged on silicon substrate carrier and seals the front in zone; described front interconnection metal layer more optionally covers on the insulating barrier of front; described front protecting layer is arranged on the front again on interconnection metal layer, and forms several front protecting layer openings on interconnection metal layer again in the front
Described back side insulating barrier is arranged on silicon substrate carrier and seals the back side in zone; described back side interconnection metal layer more optionally covers under the insulating barrier of the back side; described back-protective layer is arranged on the back side again under interconnection metal layer, and forms several back-protective layer openings under interconnection metal layer again in the back side
Described sealing arranges through hole in the zone, fill metal in described through hole, described front again interconnection metal layer and the back side again interconnection metal layer be connected by the interior metal of through hole.
The described junction of sealing of sealing zone and silicon substrate carrier is step-like.
Described through hole is the single row or multiple rows array.
The through positive lower surface of interconnection metal layer again in the upper end of described through hole, the through back side, the lower end of through hole is the upper surface of interconnection metal layer again.
In described back-protective layer opening, the tin ball is set.
Described tin ball becomes array arrangement.
The top is set with the metal column of tin cap in described back-protective layer opening.
Described metal column becomes array arrangement.
In described front protecting layer opening, metal dimpling point is set, the top of described metal dimpling point arranges tin projection.
Described metal dimpling point becomes array arrangement.
The invention has the beneficial effects as follows:
1, utilize the through-hole structure that forms in the zone of sealing of silica-based keyset surrounding, realized electric signal transmission and hot the transmission, solved well technological problems and the Cost Problems of through-silicon via structure;
2, adopt laser beam drilling to form metal in through hole in conjunction with the mode of electroless copper on sealing the zone, both reduced the complexity of technological operation, also reduced product cost, promoted product yield and reliability.
Description of drawings
Fig. 1 is the schematic diagram of the silicon through hole hole wall ripple of prior art generation.
Fig. 2 is the schematic diagram of embodiment one of the encapsulating structure of a kind of silica-based keyset of the present invention.
Fig. 3 is the A-A cutaway view of Fig. 2.
Fig. 4 is the schematic diagram of embodiment two of the encapsulating structure of a kind of silica-based keyset of the present invention.
Fig. 5 is the schematic diagram of embodiment three of the encapsulating structure of a kind of silica-based keyset of the present invention.
In figure:
Silicon substrate carrier 1
Seal zone 2
Front insulating barrier 31
Back side insulating barrier 32
The front is interconnection metal layer 41 again
The back side is interconnection metal layer 42 again
Front protecting layer 51
Back-protective layer 52
Tin ball 6
Metal column 7
Tin cap 8
Metal dimpling point 9
Tin projection 10.
Embodiment
Referring to Fig. 2 to Fig. 5, the encapsulating structure of a kind of silica-based keyset of the present invention comprises silicon substrate carrier 1, insulating barrier, interconnection metal layer and protective layer again.Zone 2 is sealed in the surrounding setting of described silicon substrate carrier 1, seals zone 2 and seals with the side of silicon substrate carrier 1 and be connected.The material of sealing zone 2 is resin, is generally the epoxylite material, includes inserts, to reduce the larger problem of thermal expansion coefficient difference between resin material and silicon materials, the heat engine tool reliability of lift structure.Seal the junction and can be step-like, utilize the bonded area between single or multiple steps increase encapsulating materials and silicon substrate carrier 1, thereby promote the adhesion of sealing zone 2 and silicon substrate carrier 1, as shown in the schematic diagram that Fig. 2 amplifies.
Described insulating barrier comprises front insulating barrier 31 and back side insulating barrier 32, then interconnection metal layer comprises front interconnection metal layer 41 and back side interconnection metal layer 42 more again, and described protective layer comprises front protecting layer 51 and back-protective layer 52.
Described front insulating barrier 31 is arranged on silicon substrate carrier 1 and seals the front in zone 2, described front interconnection metal layer 41 more optionally covers on front insulating barrier 31, described front protecting layer 51 is arranged on the front again on interconnection metal layer 41, and forms several front protecting layer openings 511 on interconnection metal layer 41 again in the front; Described back side insulating barrier 32 is arranged on silicon substrate carrier 1 and seals the back side in zone 2; described back side interconnection metal layer 42 more optionally covers back side insulating barrier 32 times; described back-protective layer 52 is arranged on back side interconnection metal layer 42 times again, and in the back side again interconnection metal layer form several back-protective layer openings 521 for 42 times.
Wherein, positive interconnection metal layer again 41 and the back side concrete number of plies of interconnection metal layer 42 again can be set to one or more layers according to product requirement, and common, front interconnection metal layer 41 again is the high-density wiring layer, and namely live width/line-spacing is below 5um.Protective layer material generally includes silica, silicon nitride or resinae dielectric material, and different dielectric material between interconnection metal layer can be identical again, also can be different.
The front protecting layer opening 511 that forms on positive interconnection metal layer 41 again and the back side is the back-protective layer opening 521 of 42 times formation of interconnection metal layer again, is convenient to the connection of subsequent element, as Fig. 2, Fig. 4 and shown in Figure 5.The interior top that can arrange of front protecting layer opening 511 is with the metal dimpling point 9 of tin projection 10, and 9 one-tenth array arrangements of metal dimpling point.The interior tin ball 6 that arranges of back-protective layer opening 521,6 one-tenth array arrangements of tin ball as shown in Figure 4, or arrange the top with the metal column 7 of tin cap 8,7 one-tenth array arrangements of metal column, as shown in Figure 5.
The described zone 2 interior through holes 21 that the single row or multiple rows array is set of sealing.The interior filling metal of described through hole 21, common, the filling metal is electro-coppering.The upper end of through hole 21 interior metals, lower end respectively with the front again interconnection metal layer 41, the back side again interconnection metal layer 42 be connected, be silica-based keyset just/interface channel of reverse side electric signal, be also one of heat dissipation channel of encapsulating structure simultaneously.

Claims (10)

1. the encapsulating structure of a silica-based keyset comprises silicon substrate carrier (1), insulating barrier, interconnection metal layer and protective layer again,
It is characterized in that: zone (2) is sealed in the surrounding setting of described silicon substrate carrier (1); the described zone (2) of sealing is sealed with the side of silicon substrate carrier (1) and is connected; described insulating barrier comprises front insulating barrier (31) and back side insulating barrier (32); described interconnection metal layer again comprises front interconnection metal layer (41) and back side interconnection metal layer (42) more again; described protective layer comprises front protecting layer (51) and back-protective layer (52)
Described back side insulating barrier (32) is arranged on silicon substrate carrier (1) and seals the back side of zone (2); described back side interconnection metal layer (42) more optionally covers under back side insulating barrier (32); described back-protective layer (52) is arranged on the back side again under interconnection metal layer (42); and form several back-protective layer openings (521) under interconnection metal layer (42) again in the back side
Described sealing arranges through hole (21) in zone (2), fill metal in described through hole (21), described front again interconnection metal layer (41) and the back side again interconnection metal layer (42) be connected by the interior metal of through hole (21).
2. the encapsulating structure of a kind of silica-based keyset according to claim 1 is characterized in that: the described junction of sealing of sealing zone (2) and silicon substrate carrier (1) is step-like.
3. the encapsulating structure of a kind of silica-based keyset according to claim 1, it is characterized in that: described through hole (21) is the single row or multiple rows array.
4. the encapsulating structure of a kind of silica-based keyset according to claim 1 and 2, it is characterized in that: through front, the upper end of described through hole (21) is the lower surface of interconnection metal layer (41) again, and the through back side, the lower end of through hole (21) is the upper surface of interconnection metal layer (42) again.
5. according to claim 1 a kind of encapsulating structure of silica-based keyset, is characterized in that: tin ball (6) is set in described back-protective layer opening (521).
6. according to claim 5 a kind of encapsulating structure of silica-based keyset, it is characterized in that: described tin ball (6) becomes array arrangement.
7. according to claim 1 a kind of encapsulating structure of silica-based keyset, is characterized in that: the top is set with the metal column (7) of tin cap (8) in described back-protective layer opening (521).
8. according to claim 7 a kind of encapsulating structure of silica-based keyset, it is characterized in that: described metal column (7) becomes array arrangement.
9. the encapsulating structure of a kind of silica-based keyset according to claim 1, it is characterized in that: metal dimpling point (9) is set in described front protecting layer opening (511), and the top of described metal dimpling point (9) arranges tin projection (10).
10. the encapsulating structure of a kind of silica-based keyset according to claim 9, is characterized in that: described metal dimpling point (9) one-tenth array arrangement.
CN201310062926.9A 2013-02-28 2013-02-28 A kind of encapsulating structure of silicon substrate pinboard Active CN103165561B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104465570A (en) * 2014-12-31 2015-03-25 江阴长电先进封装有限公司 TSV Interposer structure and packaging method thereof
CN105575938A (en) * 2016-02-26 2016-05-11 中国科学院微电子研究所 Silicon-based adapter plate and preparation method thereof
CN112151418A (en) * 2020-09-11 2020-12-29 安徽龙芯微科技有限公司 Packaging mechanism and packaging method of silicon-based adapter plate

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CN102299143A (en) * 2010-06-25 2011-12-28 台湾积体电路制造股份有限公司 Semiconductor element

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US6406934B1 (en) * 2000-09-05 2002-06-18 Amkor Technology, Inc. Wafer level production of chip size semiconductor packages
US20050161788A1 (en) * 2002-11-08 2005-07-28 Oki Electric Industry Co., Ltd. Semiconductor device
CN1532920A (en) * 2003-03-18 2004-09-29 ��ʽ����ס�ѽ������豸 High heat radiation platic package and its producing method
CN101106121A (en) * 2006-07-14 2008-01-16 恩益禧电子股份有限公司 Wiring substrate, semiconductor device, and method of manufacturing the same
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104465570A (en) * 2014-12-31 2015-03-25 江阴长电先进封装有限公司 TSV Interposer structure and packaging method thereof
CN104465570B (en) * 2014-12-31 2017-06-23 江阴长电先进封装有限公司 A kind of TSV Interposer structures and its method for packing
CN105575938A (en) * 2016-02-26 2016-05-11 中国科学院微电子研究所 Silicon-based adapter plate and preparation method thereof
CN105575938B (en) * 2016-02-26 2018-10-26 中国科学院微电子研究所 Silicon-based adapter plate and preparation method thereof
CN112151418A (en) * 2020-09-11 2020-12-29 安徽龙芯微科技有限公司 Packaging mechanism and packaging method of silicon-based adapter plate
CN112151418B (en) * 2020-09-11 2024-04-05 安徽龙芯微科技有限公司 Packaging mechanism and packaging method of silicon-based adapter plate

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