CN103152988A - Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board) - Google Patents

Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board) Download PDF

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Publication number
CN103152988A
CN103152988A CN201310056016XA CN201310056016A CN103152988A CN 103152988 A CN103152988 A CN 103152988A CN 201310056016X A CN201310056016X A CN 201310056016XA CN 201310056016 A CN201310056016 A CN 201310056016A CN 103152988 A CN103152988 A CN 103152988A
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China
Prior art keywords
edges
boards
board
pcb
plate
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Pending
Application number
CN201310056016XA
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Chinese (zh)
Inventor
王明阁
王忱
张惠来
李加余
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Victory Giant Technology Huizhou Co Ltd
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Victory Giant Technology Huizhou Co Ltd
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Application filed by Victory Giant Technology Huizhou Co Ltd filed Critical Victory Giant Technology Huizhou Co Ltd
Priority to CN201310056016XA priority Critical patent/CN103152988A/en
Publication of CN103152988A publication Critical patent/CN103152988A/en
Pending legal-status Critical Current

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Abstract

The invention relates to a method for improving board utilization ratio during fabrication of a PCB (Printed Circuit Board). The method comprises the steps of combining a plurality of unit boards into a board group according to the need, adding board edges to the board group and asymmetrically adding board edges on two opposite side surfaces of the board group, i.e. adding a board edge with specific size on one side according to machining and positioning information needs and adding a board edge with size being smaller than the specific size on the other side. Preferably, the board edges are asymmetrically added in the length direction of the board group and the minimum size of the board edges is 6mm. On the premise that the processing quality and efficiency are guaranteed, the method provided by the invention has the advantages that the utilization ratio of boards can be effectively improved and the costs are saved for enterprises.

Description

During making, improves pcb board the method for availability ratio of the armor plate
Technical field
The present invention relates to PCB manufacturing technology field.
Background technology
In the PCB production process, the principal element that affects cost has: 1. sheet material expense; 2. boring expense; 3. processing procedure expense; 4. administrative expenses such as artificial water power.And in these factors, the sheet material expense accounts between 60%-80%, so how better to make good use of aborning sheet material, brings up to peak with availability ratio of the armor plate in producing the PCB cost, is determining the trend of PCB price; Price is also just determining order volume, and the use of as seen making good use of sheet material is the most important thing in PCB produces.
generally the design data that provides of client is individual unit plate or plate in flakes, because size is too little, for better production, the data typesetting again that PCB producer generally can provide the client, be called WORKING PANEL, according to sexual needs easy to process, polylith cell board (being called SPNL) is designed on a large plate, reserve certain interval between the unit plate, and add edges of boards (integral body is called WPNL) in the surrounding of large plate, adding edges of boards is in order to design some auxiliary informations at edges of boards, be convenient to full-automatic in the machinery equipment course of processing or semi-automatic production, enhance productivity.The general WORKING PANEL that produces is the large size plate that is provided by plate supplier, and a plurality of WPNL are set up in parallel on sheet material, and integral body is processed, then cuts into the cell board that needs.As shown in Figure 1, in industry, the general gap (adjustable as required) of reserving 2MM between the unit plate, and the large plate that arranges after cell board adds the edges of boards (can suitably adjust different according to the flaggy number) of 15-30MM on entire length and Width, usually increase the 20MM edges of boards as length direction, Width increases the 16MM edges of boards, namely respectively increases the 10MM edges of boards in cell board integral body shown in Figure 1 left side and right side symmetry, and the up and down bilateral symmetry respectively increases the 8MM edges of boards.After the design, processing remaining sheet material will discard, and adopt this method for designing like this, and the utilance of sheet material generally only has 70-80%, cause board cost high.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of method that improves availability ratio of the armor plate in pcb board making.
For solving the problems of the technologies described above, the technical scheme that the present invention takes is: a kind of method that improves availability ratio of the armor plate during pcb board is made, the method is as required some cell boards to be combined to form a plate group, for the plate group increases edges of boards, at the asymmetric increase edges of boards of plate group two relative side, namely need to increase the edges of boards of specific dimensions at a lateral root according to machining and navigation data, opposite side increases the edges of boards less than specific dimensions.
Preferably, at the asymmetric increase edges of boards of plate group length direction.
Preferably, described edges of boards less than specific dimensions are greater than 6mm.
Preferably, limit, the other two opposite sides of described plate group symmetry increase on demand edges of boards.
Compared with prior art, the invention has the beneficial effects as follows: the method for the invention can effectively provide the utilance of sheet material when guaranteeing crudy and efficient, for enterprise saves cost.
Description of drawings
Fig. 1 increases the method availability ratio of the armor plate schematic diagram of edges of boards in prior art;
Fig. 2 is the method availability ratio of the armor plate schematic diagram of asymmetric increase edges of boards of the present invention.
Embodiment
For the ease of it will be appreciated by those skilled in the art that below in conjunction with accompanying drawing and embodiment, the present invention is explained in further detail.
The purport of the method for the invention is that the PCB that breaks traditions always makes in design that the symmetrical edges of boards that increase in the mode of Aided Machine processing, adopt the mode of asymmetric increase edges of boards with as much as possible base materials that utilize more, reduces the rate of discarding.
Before general PCB makes, can as required some cell boards be combined to form a plate group, for the plate group increases edges of boards (perhaps a cell board directly increases edges of boards), at the asymmetric increase edges of boards of plate group two relative side.Act on very large in mechanical processing process due to edges of boards, the location hole that machining is required and identification data etc. need design at edges of boards, therefore must increase according to the needs of machining and navigation data the edges of boards of specific dimensions in plate group one side, 10mm for example, existing machinery processing adopts a side fixation and recognition get final product, divides a plate to get final product after the opposite side edges of boards that only need increase certain size are beneficial to processing.Limit, the other two opposite sides of plate group also can need the symmetrical edges of boards that increase to get final product by minute plate.In practical operation, the little edges of boards of increase are preferably greater than 6mm.
Embodiment 1
As shown in Figure 1, take 2 laminates as example, the SPNL board size that provides as the client is: 346.5*195mm, be generally X and Y-direction every limit increases the 10mm edges of boards by the design of the edges of boards of the usage of trade, three cell boards are a plate group, and the gap between each cell board is set to 2mm, each plate group: X=346.5+20=366.5mm, Y=195*3+4+20=609mm, as select substrate size to be: 41*49 (1041*1245mm), utilance is: 78%.
If change asymmetric edges of boards into, as shown in Figure 2, be about to the directions X edges of boards and be designed to large (increasing 10mm) on one side, on one side little (increasing 7.5mm), utilance can be high a lot, and substrate can well utilize, and is as follows:
X=346.5+ (10+7.5)=364mm, 195*3+4+20=609mm, select substrate to be: 43*49 (1092*1245mm), utilance brings up to 89.5%, and the remaining waste material of sheet material is considerably less.
Above-described embodiment is the preferred embodiment of the present invention, and in addition, the present invention can also have other implementations.That is to say, under the prerequisite that does not break away from the present invention's design, within any apparent replacement also should fall into protection scope of the present invention.

Claims (4)

1.PCB improve the method for availability ratio of the armor plate during plate is made, as required some cell boards are combined to form a plate group, for the plate group increases edges of boards, it is characterized in that: at the asymmetric increase edges of boards of plate group two relative side, namely need to increase the edges of boards of specific dimensions at a lateral root according to machining and navigation data, opposite side increases the edges of boards less than specific dimensions.
2. improve the method for availability ratio of the armor plate during pcb board according to claim 1 is made, it is characterized in that: at the asymmetric increase edges of boards of plate group length direction.
3. improve the method for availability ratio of the armor plate during pcb board according to claim 1 is made, it is characterized in that: described edges of boards less than specific dimensions are greater than 6mm.
4. improve the method for availability ratio of the armor plate during pcb board according to claim 1 is made, it is characterized in that: limit, the other two opposite sides of described plate group is the symmetrical edges of boards that increase on demand.
CN201310056016XA 2013-02-22 2013-02-22 Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board) Pending CN103152988A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201310056016XA CN103152988A (en) 2013-02-22 2013-02-22 Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201310056016XA CN103152988A (en) 2013-02-22 2013-02-22 Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board)

Publications (1)

Publication Number Publication Date
CN103152988A true CN103152988A (en) 2013-06-12

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CN201310056016XA Pending CN103152988A (en) 2013-02-22 2013-02-22 Method for improving board utilization ratio during fabrication of PCB (Printed Circuit Board)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108495464A (en) * 2018-03-28 2018-09-04 珠海精毅电路有限公司 A kind of composition method for wiring board layout
CN112969295A (en) * 2021-03-22 2021-06-15 益阳市明正宏电子有限公司 Cutting and splicing method for improving utilization rate of substrate
CN115372048A (en) * 2022-08-19 2022-11-22 重庆钢铁股份有限公司 Sampling method for improving yield of medium plate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103025067A (en) * 2012-12-30 2013-04-03 胜宏科技(惠州)有限公司 Method for increasing board utilization rate during manufacture of PCB (printed circuit board)

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103025067A (en) * 2012-12-30 2013-04-03 胜宏科技(惠州)有限公司 Method for increasing board utilization rate during manufacture of PCB (printed circuit board)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108495464A (en) * 2018-03-28 2018-09-04 珠海精毅电路有限公司 A kind of composition method for wiring board layout
CN112969295A (en) * 2021-03-22 2021-06-15 益阳市明正宏电子有限公司 Cutting and splicing method for improving utilization rate of substrate
CN115372048A (en) * 2022-08-19 2022-11-22 重庆钢铁股份有限公司 Sampling method for improving yield of medium plate

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Application publication date: 20130612