CN103151342A - VMOS (V-groove Metal Oxide Semiconductor) mixed membrane integrated chip for driving multiple paths of valves - Google Patents

VMOS (V-groove Metal Oxide Semiconductor) mixed membrane integrated chip for driving multiple paths of valves Download PDF

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Publication number
CN103151342A
CN103151342A CN2013100458053A CN201310045805A CN103151342A CN 103151342 A CN103151342 A CN 103151342A CN 2013100458053 A CN2013100458053 A CN 2013100458053A CN 201310045805 A CN201310045805 A CN 201310045805A CN 103151342 A CN103151342 A CN 103151342A
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mos pipe
power mos
power
vmos
port
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CN103151342B (en
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黄柳莺
范晓琳
张毅
李奕辉
王睿
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Shanghai Institute of Space Propulsion
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Shanghai Institute of Space Propulsion
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Magnetically Actuated Valves (AREA)
  • Multiple-Way Valves (AREA)

Abstract

The invention provides a VMOS (V-groove Metal Oxide Semiconductor) mixed membrane integrated chip for driving multiple paths of valves. The VMOS mixed membrane integrated chip for driving the multiple paths of valves comprises multiple groups of power switches, wherein each group of power switches are used as the output of one path of valves; each power switch comprises a first power MOS (Metal Oxide Semiconductor) tube V1, a second power MOS tube V2, a third power MOS tube V3 and a fourth power MOS tube V4; a left bridge arm formed through the series connection of V1 and V2 is used as a driving end of a first upper/lower bridge arm; a right bridge arm formed through the series connection of V3 and V4 is used as a driving end of a second upper/lower bridge arm; and the left bridge arm and the right bridge arm are connected in parallel. With the adoption of the VMOS mixed membrane integrated chip for driving the multiple paths of valves, the requirements of driving the multiple paths of valves by the single chip and decreasing the weight and the size of a whole device are met; the internal interconnection of plate electrode wires is reduced; the board-level wiring design is simplified; and the chip is simple and reliable; and therefore, the chip has important significances in the aerospace field.

Description

The mixed film integrated chip of the VMOS that a kind of multichannel valve drives
Technical field
The present invention is used for space flight and advances the field, is specifically related to drive the mixed film integrated chip of multichannel valve, to reduce the volume and weight of device.
Background technology
Space flight advances the field according to different application, multiple valve to be arranged, can be divided into the flow control valve of propellant and the pressure control valve of pipeline, the thruster combination of various valves and different thrusts, the attitude that is used for spacecraft is controlled and orbit adjusting, is the significant components of spacecraft propulsion system.Valvular switch all realize by the driving power pipe in propulsion subsystem control circuit box.In order to satisfy reliability requirement, the power tube that drives valve adopts redundant fashion in parallel or series connection.The way of valve is more, and the power tube quantity that needs is larger, and the volume of power drive pipe own is very large, has limited the quantity of control circuit in the veneer, causes that final small product size is huge, Heavy Weight.Yet space industry has harsh requirement to weight and the volume of product, and in order to solve the problem of super-big and overweight, the mixed film integrated chip that can drive the multichannel valve arises at the historic moment.Have no before this similar or relevant report is arranged both at home and abroad.
Summary of the invention
The object of the invention is to adopt the mixing integrated technology, a plurality of existing discrete power drive chip cores are made the special chip of connection in series-parallel pattern, drive multichannel loading, thereby reduce to drive volume and the weight of printed substrate, increase the open ended control loop sum of veneer, reduce the volume and weight of spacecraft.
Scheme provided by the invention is to use the kernel connection in series-parallel of VMOS chip as the output of one tunnel load (valve), a mixed film integrated chip can drive 4 tunnel loads, different according to the watt level that drives load, integrated two different chip, wherein, VMOS is the insulating gate type field effect tube with vertical-channel.
according to an aspect of the present invention, the mixed film integrated chip of the VMOS that provides a kind of multichannel valve to drive, it comprises many group power switchs, each group power switch is as the output of one road valve, wherein: described power switch comprises the first power MOS pipe V1, the second power MOS pipe V2, the 3rd power MOS pipe V3, the 4th power MOS pipe V4, the left brachium pontis that described the first power MOS pipe V1 and the second power MOS pipe V2 are in series is as the first upper and lower bridge arm drive end, the right brachium pontis that described the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 are in series is as the second upper and lower bridge arm drive end, described left brachium pontis is in parallel with right brachium pontis.
Preferably, when the port AO1 of the first power MOS pipe V1, the port AO2 of the second power MOS pipe V2 are high level, and the port AO4 of the port AO3 of the 3rd power MOS pipe V3, the 4th power MOS pipe V4 is when being low level, the first power MOS pipe V1 and the second power MOS pipe V2 conducting, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 cut-off namely should be organized the left brachium pontis conducting of power switch;
When the port AO3 of the 3rd power MOS pipe V3, the port AO4 of the 4th power MOS pipe V4 are high level, and the port AO2 of the port AO1 of the first power MOS pipe V1, the second power MOS pipe V2 is when being low level, the first power MOS pipe V1 and the second power MOS pipe V2 cut-off, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 conducting namely should be organized the right brachium pontis conducting of power switch;
When the port AO4 of the port AO3 of the port AO2 of the port AO1 of the first power MOS pipe V1, the second power MOS pipe V2, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 is high level entirely, left brachium pontis, the equal conducting of right brachium pontis of this group power switch.
Preferably, its shell adopts the 10# steel.
Preferably, the single channel maximum operating currenbt is 4.5A.
Preferably, its shell adopts and can cut down the chromium gold.
Preferably, the single channel maximum operating currenbt is 3A.
Preferably, secondary power supply voltage is+5V ,+12V, power power-supply voltage is+28V.
Preferably, the group number of power switch is 4 groups, drives respectively 4 tunnel loads.
Such as advancing in circuit box, monoblock modules is designed to drive 7 way solenoid valves and No. 4 latching valves, and admittedly size 234mm * 234mm is the single module weight 1.015kg that is honored as a queen.And the plank of same size 234mm*234mm can be put 9 HG9401A, perhaps 24 HG9401B.Wherein HG9401B drives latching valve, and the switch of latching valve is controlled respectively, therefore the state of 2 latching valves of a HG9401B control.This plank can drive 9 way solenoid valves and No. 12 latching valves in other words, has obviously reduced the consumption of plank.7 electromagnetically operated valves and 4 latching valves of above mentioning only need can be realized with 2 HG9401A and 2 HG9401B.From the above analysis, the use number of using mixed film integrated chip scheme greatly to reduce discrete component has been simplified the size of pcb board and the weight of integral device, meets very much the requirement of Space Industry.
The present invention compared with prior art has the following advantages and effect:
At first, realized the multichannel valve driving of single-chip;
Secondly, realized that the loss of weight of whole device reduces the requirement of volume;
Again, reduce the intraconnection of plateline, simplified plate level wires design;
At last, the circuit of chip internal is ripe circuit, makes this chip succinctly reliable, and this chip will be significant at space industry.
Description of drawings
By reading the detailed description of non-limiting example being done with reference to the following drawings, it is more obvious that other features, objects and advantages of the present invention will become:
Fig. 1 is that the single channel valve drives schematic diagram.
Fig. 2 is the vertical view of integrated chip according to an embodiment of the invention.
Fig. 3 is the vertical view of integrated chip according to another embodiment of the invention.
Fig. 4 is integrated chip pin distribution map according to an embodiment of the invention.
Fig. 5 is integrated chip pin distribution map according to another embodiment of the invention.
Embodiment
The present invention is described in detail below in conjunction with specific embodiment.Following examples will help those skilled in the art further to understand the present invention, but not limit in any form the present invention.Should be pointed out that to those skilled in the art, without departing from the inventive concept of the premise, can also make some distortion and improvement.These all belong to protection scope of the present invention.
According to the experience of discrete component in the past, select the military products device die of IR company as power device, the CD40109 die of TI is level transferring chip.Conduction adopts Au slurry and PdAg slurry, and with Φ 25 μ m spun golds and aluminium wire bonding lead, with Φ 25 μ m spun golds and silver-gilt copper wire bonding outer lead, maximum current is more than 19A.Integrated chip as substrate, guarantees good insulation, heat conduction and heat radiation with pottery, and high temperature resistant.Resistance on circuit is also to use electrocondution slurry, and adopts laser resistor trimming, can reach resistance more accurately.16 power devices in sheet are topmost pyrotoxins, and evenly distribute is unlikely to local overheating.Every road valve is controlled independently power supply,, enable.Pin distribution map referring to Fig. 4 and Fig. 5.
By the specificity analysis to HG9401A and two kinds of chips of HG9401B, the logic control more complicated of HG9401A, the power consumption of whole circuit is large.Therefore, the thermal design of the order of four tunnel logic control level, accuracy and circuit will become the key Design characteristic of whole circuit.
In preference, select the power metal shell UPP6737-24 for the bilateral installing hole of being convenient to dispel the heat and installing; Adopt mixing thick-film technique, that this circuit is carried out secondary is integrated, namely uses general thick film film forming, and spun gold and aluminium wire be strong the conventional thick-film technique such as closes.For making whole circuit heat radiation evenly, power chip separately is evenly arranged, concentrate to prevent heat; For the heat that power chip is produced is passed to fast substrate, makes the substrate heat be passed to fast metal shell, all adopt soldering technique between power chip and substrate, substrate and shell.
Aspect encapsulation, this circuit has adopted metal shell to fill the full air-tightness parallel seam welding encapsulation of nitrogen, to guarantee the high reliability of circuit package.Circuit is by technique its technological feasibility of having known the real situation verification experimental verification.
The logic control of HG9401B is also more complicated, but due to the open and close work that is used for pulsed control latching valve, the whole power of circuit is less, belongs to low-power circuit, adopt the dual inline type 32 full air-tight packaging versions of lead-in wire Shanxi book shell, can satisfy the heat radiation requirement of circuit.
At the EMC design aspect, two kinds of modules all are provided with shell shielding ground (GNDS), and protective circuit suffers the impact of external electromagnetic environment effectively.Simultaneously, the Power Groud of inside circuit and secondary electric seedbed separate cabling, prevent between power supply influence each other and heavy current on the impact of control signal.
Above specific embodiments of the invention are described.It will be appreciated that, the present invention is not limited to above-mentioned specific implementations, and those skilled in the art can make various distortion or modification within the scope of the claims, and this does not affect flesh and blood of the present invention.

Claims (8)

1. the VMOS of a multichannel valve driving mixes the film integrated chip, it is characterized in that, it comprises many group power switchs, each group power switch is as the output of one road valve, wherein: described power switch comprises the first power MOS pipe V1, the second power MOS pipe V2, the 3rd power MOS pipe V3, the 4th power MOS pipe V4, the left brachium pontis that described the first power MOS pipe V1 and the second power MOS pipe V2 are in series is as the first upper and lower bridge arm drive end, the right brachium pontis that described the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 are in series is as the second upper and lower bridge arm drive end, described left brachium pontis is in parallel with right brachium pontis.
2. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 1, is characterized in that,
When the port AO1 of the first power MOS pipe V1, the port AO2 of the second power MOS pipe V2 are high level, and the port AO4 of the port AO3 of the 3rd power MOS pipe V3, the 4th power MOS pipe V4 is when being low level, the first power MOS pipe V1 and the second power MOS pipe V2 conducting, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 cut-off namely should be organized the left brachium pontis conducting of power switch;
When the port AO3 of the 3rd power MOS pipe V3, the port AO4 of the 4th power MOS pipe V4 are high level, and the port AO2 of the port AO1 of the first power MOS pipe V1, the second power MOS pipe V2 is when being low level, the first power MOS pipe V1 and the second power MOS pipe V2 cut-off, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 conducting namely should be organized the right brachium pontis conducting of power switch;
When the port AO4 of the port AO3 of the port AO2 of the port AO1 of the first power MOS pipe V1, the second power MOS pipe V2, the 3rd power MOS pipe V3 and the 4th power MOS pipe V4 is high level entirely, left brachium pontis, the equal conducting of right brachium pontis of this group power switch.
3. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 1 and 2, is characterized in that, its shell adopts the 10# steel.
4. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 3, is characterized in that, the single channel maximum operating currenbt is 4.5A.
5. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 1 and 2, is characterized in that, its shell adopts can cut down the chromium gold.
6. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 5, is characterized in that, the single channel maximum operating currenbt is 3A.
7. the mixed film integrated chip of VMOS that drives of multichannel valve according to claim 1 and 2, is characterized in that, secondary power supply voltage is+5V ,+12V, power power-supply voltage is+28V.
8. the mixed film integrated chip of the VMOS of multichannel valve driving according to claim 1 and 2, is characterized in that, the group number of power switch is 4 groups, drives respectively 4 tunnel loads.
CN201310045805.3A 2013-02-05 2013-02-05 The VMOS that a kind of multichannel valve drives mixes film integrated chip Active CN103151342B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106444514A (en) * 2016-10-21 2017-02-22 中国运载火箭技术研究院 High-reliability dual-redundancy power controller based on logic frame interaction

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04207313A (en) * 1990-11-30 1992-07-29 Toyota Autom Loom Works Ltd Driving circuit
JP2000269416A (en) * 1999-03-18 2000-09-29 Unisia Jecs Corp Transistor module
EP1079510A2 (en) * 1999-07-27 2001-02-28 Infineon Technologies AG Half bridge configuration
EP1892761A2 (en) * 2006-08-25 2008-02-27 SEMIKRON Elektronik GmbH & Co. KG Low inductivity power semiconductor module for current driven high power circuits
WO2011004081A1 (en) * 2009-07-08 2011-01-13 Centre National De La Recherche Scientifique Power electronic module
CN102497145A (en) * 2011-12-01 2012-06-13 北京交通大学 H-bridge driving circuit
CN203192793U (en) * 2013-02-05 2013-09-11 上海空间推进研究所 Multi-way valve-driving VMOS mixed membrane integrated chip

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04207313A (en) * 1990-11-30 1992-07-29 Toyota Autom Loom Works Ltd Driving circuit
JP2000269416A (en) * 1999-03-18 2000-09-29 Unisia Jecs Corp Transistor module
EP1079510A2 (en) * 1999-07-27 2001-02-28 Infineon Technologies AG Half bridge configuration
EP1892761A2 (en) * 2006-08-25 2008-02-27 SEMIKRON Elektronik GmbH & Co. KG Low inductivity power semiconductor module for current driven high power circuits
WO2011004081A1 (en) * 2009-07-08 2011-01-13 Centre National De La Recherche Scientifique Power electronic module
CN102497145A (en) * 2011-12-01 2012-06-13 北京交通大学 H-bridge driving circuit
CN203192793U (en) * 2013-02-05 2013-09-11 上海空间推进研究所 Multi-way valve-driving VMOS mixed membrane integrated chip

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106444514A (en) * 2016-10-21 2017-02-22 中国运载火箭技术研究院 High-reliability dual-redundancy power controller based on logic frame interaction
CN106444514B (en) * 2016-10-21 2019-04-30 中国运载火箭技术研究院 A kind of highly reliable double redundancy power controller of logic-based frame interaction

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