CN103150459B - A kind of Optimization Design of the low noise amplifier based on genetic algorithm - Google Patents

Abstract

The invention discloses the Optimization Design of a kind of low noise amplifier based on genetic algorithm (LNA), solve the problem of multiple-objection optimization in LNA design.With circuit parameter in LNA, as transistor size and passive component value, as variable, using the current equation of the impedance matching of LNA and transistor as constraint condition, using the circuit performance assessment technology based on equation as circuit performance appraisal procedure, to be with the paralleling genetic algorithm of elitism strategy as full search algorithm, the gain of LNA, noise figure and power consumption are optimized simultaneously.This optimization method can obtain the optimum results of circuit fast, is very suitable for the circuit design of particular constraints, performance and function.The present invention can be used for deep-submicron RF CMOS integrated circuit, is widely used in the electronic system of aerospace field.

Description

A kind of Optimization Design of the low noise amplifier based on genetic algorithm

Technical field

The invention belongs to deep-submicron RF CMOS integrated circuit fields, be specifically related to the optimal design to low noise amplifier (LNA).

Background technology

Low noise amplifier is generally in foremost, and therefore its performance of performance to receiver has significant impact.Its major function mainly provides gain to carry out amplifying signal and suppresses entire system noise with less noise figure, needs again mate with front end antenna or antenna filter and keep lower power consumption simultaneously.But these parameters are closely related each other, cannot being optimized separately, such as, in order to improve gain, usually can bringing the increase of power consumption, and realize also there is certain difficulty while noise optimization and Input matching.Therefore usually carry out global optimization to meet overall performance requirement to these tradeoffs, in fact this is also one of difficult point of LNA design.

The optimal design of current radio frequency integrated circuit substantially relies on and manually completes, and repeatedly to be simulated and revise by simulation result to circuit, and its design time and design cost seriously constrain its development.Radio circuit design parameter is more, abstract expression is difficult, responsive to interference, and topological structure emerges in an endless stream, and the operand of robotization optimal design is huge and increase along with circuit scale and increase, and seriously constrains speed and the scale of robotization optimal design.

Mimic channel optimal design comprises the assessment of circuit performance and the optimization algorithm asking objective function extreme value.

Current circuit performance appraisal procedure mainly adopts the circuit performance assessment technology based on circuit emulator, utilizes circuit emulator to emulate circuit at each iteration point, from simulation result, extracts circuit performance parameters.It is comparatively accurate that model due to SPICE serial emulation device is set up, and thus previous work amount is little and design accuracy is higher, but along with the increase of iterations, the operand in optimizing process will be very large, consuming time usually can be very long, and convergence is poor.How to set up a kind of travelling speed very fast, consuming time shorter and design accuracy meets design requirement circuit performance appraisal procedure becomes problem demanding prompt solution.

And ask the optimization algorithm of objective function extreme value, be exactly a kind of search procedure or rule in fact, be met the solution of the problem of requirement by certain rule.Many traditional searching algorithm fast convergence rates, calculated amount are little, but choose by initial value and affect comparatively large, are comparatively easy to converge on poor locally optimal solution.Genetic algorithm (genetic algorithm) is a kind of searching algorithm used for reference organic sphere natural selection and natural evolution mechanism and grow up, it is a kind of algorithm of simulating Life Evolution, it has good global search performance, simple general-purpose, robustness is comparatively strong, can solve complicated optimum problem.But, also there is certain problem in basic genetic algorithm, first premature convergence problem, namely algorithm very rapid convergence to locally optimal solution instead of globally optimal solution, it two is the convergences that can not ensure global optimization, thus the improvement of genetic algorithm is become to the target of research.

Summary of the invention

Instant invention overcomes deficiency of the prior art, disclose a kind of Optimization Design of the low noise amplifier based on genetic algorithm, solve the problem of multiple-objection optimization in LNA design.With circuit parameter in LNA, as transistor size and passive component value, as variable, using the current equation of the impedance matching of LNA and transistor as constraint condition, to be with the paralleling genetic algorithm of elitism strategy as full search algorithm, the gain of LNA, noise figure and power consumption are optimized simultaneously.This optimization method can obtain the optimum results of circuit fast, is very suitable for the circuit design of particular constraints, performance and function.

Based on an Optimization Design for the low noise amplifier (LNA) of genetic algorithm, comprise the following steps:

Step one: the circuit structure determining LNA;

LNA comprises main amplifying circuit, source class coupling inductance L _s, Input matching inductance L _g, single-ended transfer difference output stage; Main amplifying circuit is single ended input, comprises the first common source transistors M ₁, the first altogether gate transistor M ₂, electric capacity C _ex, pull-up resistor R ₁; First common source transistors M ₁gate transistor M is total to first ₂composition cascode structure, the first common source transistors M ₁grid and Input matching inductance L _gbe connected, source electrode is by source-coupled inductance L _sground connection, drain electrode is total to gate transistor M with first ₂source electrode be connected; First is total to gate transistor M ₂grid and power supply V _ddbe connected, drain by pull-up resistor R ₁with power supply V _ddbe connected; Electric capacity C _exbe connected in parallel on the first common source transistors M ₁grid source class between; Single-ended transfer difference output stage comprises the second common source transistors M ₃, the second altogether gate transistor M ₄, coupling capacitance C ₁, pull-up resistor R ₂; Second common source transistors M ₃gate transistor M is total to second ₄composition cascode structure, the second common source transistors M ₃grid by coupling capacitance C ₁with the first common source transistors M ₁drain electrode be connected, source ground, drain electrode and the second altogether gate transistor M ₄source electrode be connected; Second is total to gate transistor M ₄grid and power supply V _ddbe connected, drain by the second resistance R ₂with power supply V _ddbe connected; Low pressure bias current sources V _biasby resistance R ₃and R ₄be added to the first common source transistors M respectively ₁with the second common source transistors M ₃grid; Radiofrequency signal RF_IN is by Input matching inductance L _gbe input to the first common source transistors M ₁grid, after amplifying, become differential signal RF_OUT, respectively from the first altogether gate transistor M ₂gate transistor M is total to second ₄drain electrode export;

Step 2: setting independent variable;

Setting independent variable is as follows: working current I _d, the channel width W of transistor, the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁mutual conductance g _m, the first common source transistors M ₁grid source between electric capacity C _gs, the first common source transistors M ₁source class coupling inductance L _s, Input matching inductance L _g;

Step 3: establish constraint condition;

First establish Linear Constraints, according to the technique selected and supply voltage, establish W and C _exspan;

According to establish C _gsspan, wherein: C _oxfor the gate oxide capacitance of unit area;

According to the restriction of power consumption P, establish bias current I _dspan be:

$0<I_D<\frac{P}{V_{\mathrm{dd}}}$

Setting Nonlinear Constraints:

$g_m=\sqrt{{2\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{W}{L}}{I}_D$

Wherein: μ _nfor electron mobility;

Using input resistant matching as constraint condition, the antenna of LNA input port or antenna filter are 50 ohm, therefore the input impedance Z of LNA _inequal the conjugation of 50 ohm, be specially:

$Z_{\mathrm{in}}=\mathrm{j\&omega;}(L_g+L_s)+\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}+\frac{1}{\mathrm{j\&omega;}(C_{\mathrm{ex}}+C_{\mathrm{gs}})}=50$

Wherein, j represents imaginary number, obtains:

$\left\{\begin{array}{c}\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}=50\\ (L_g+L_s)(C_{\mathrm{ex}}+C_{\mathrm{gs}}){\mathrm{\&omega;}}^2=1\end{array}\right.$

Wherein, ω is frequency of operation;

Step 4: establish optimization aim;

Optimization aim is mainly gain G, noise figure NF and power consumption P;

Optimization object function is as follows:

$\left\{\begin{array}{c}G=\frac{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}{2\mathrm{\&omega;}{R}_s}\\ \mathrm{NF}=101g\{1+2.4\frac{\mathrm{\&omega;}}{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}+\frac{R_n}{\mathrm{Re}\left[Y_s\right]}|Y_{\mathrm{opt}}-Y_s{|}^2\}\\ P=V_{\mathrm{dd}}\&CenterDot;I_D\end{array}\right.$

Wherein, α is technology library constant; δ is grid noise figure; γ is the coefficient relevant with bias state; C is the related coefficient of channel noise and grid noise; R _sfor the impedance of antenna or antenna filter, namely 50 ohm, y _opt=1/Z _opt, Y _s=1/Z _s, wherein:

$\left\{\begin{array}{c}{Z}_{\mathrm{opt}}=\frac{\mathrm{\&alpha;}\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-|c{|}^2)+j(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}|c\left|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\right)}}{\mathrm{\&omega;}{C}_{\mathrm{gs}}\{\frac{{\mathrm{\&alpha;}}^2\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-|c{|}^2)+{(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}|c\left|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\right)}^2\}}-\mathrm{j\&omega;}{L}_s\\ Z_s=R_s+\mathrm{j\&omega;}{L}_g\end{array}\right.$

Step 5: adopt the paralleling genetic algorithm of band elitism strategy to carry out multiple-objection optimization to the design parameter of LNA, be optimized result;

1) encode, use the string of binary characters of regular length to encode to independent variable, represent the individuality in colony;

2) initial population is generated, the N number of original string structured data of random generation is as body one by one, this is individual forms initial population, and wherein each individuality comprises the independent variable in step 2, and individuality all meets Linear Constraints in step 3 and Nonlinear Constraints;

3) set up fitness function according to the objective function determined in step 4, then adopt the fitness assignment method based on sequence, distinguish the quality of individual in population;

4) selection opertor is acted on population, the fitness value size according to individuality selects defect individual, and fitness value is higher, enters follow-on probability larger;

5) crossover operator is acted on population, a new generation that crossing operation produces combination parent feature is individual;

6) mutation operator is acted on population, change individual gene at random with mutation probability;

7) new population in heavy intron generation, the new individuality higher with fitness in filial generation replaces the most unconformable individuality in parent;

8) end condition judges, through some generations, stops computing, the individuality with maximum adaptation degree obtained is exported as optimum solution in evolutionary process;

The individuality of final output is the character string after coding, namely can be obtained the value of independent variable in step 2 by decoding;

Step 6: emulate LNA circuit according to optimum results, according to simulation result to working current I _d, the channel width W of transistor, the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁source class coupling inductance L _swith Input matching inductance L _gparameter adjusts, and determines final parameter size, obtains low noise amplifier.

The invention has the advantages that:

(1) design problem of LNA is converted into the mathematical problem of multiple-objection optimization, adopts the LNA method for designing of robotization, for traditional manual designs, saved design time and design cost;

(2) adopt the circuit performance assessment technology based on equation, by the manual performance equation deriving circuit, the numerical value of counting circuit performance equation in each iteration, travelling speed is fast, and can be optimized rapidly result at short notice.Solve the problem of traditional large length consuming time of circuit performance assessment technology operand based on circuit emulator;

(3) adopt the genetic algorithm of band elitism strategy to carry out multiple-objection optimization to the design parameter of LNA, solve the global convergence sex chromosome mosaicism of traditional genetic algorithm;

(4) have employed paralleling genetic algorithm, reduce the calculated amount in optimizing process, accelerate optimal speed further, optimum results can be drawn fast;

(5) method for designing in the present invention specify that design cycle, simplifies design procedure, is easy to operation.

Accompanying drawing explanation

Fig. 1 is the topology diagram of the low noise amplifier of the paralleling genetic algorithm design adopting band elitism strategy;

Fig. 2 adopts the paralleling genetic algorithm of band elitism strategy to carry out the change of LNA gain solution in 50 iterative process and the change of ethnic yield value average to LNA;

Fig. 3 adopts the paralleling genetic algorithm of band elitism strategy to carry out the change of LNA noise solution in 50 iterative process and the change of ethnic noise figure average to LNA;

Fig. 4 is power gain (S21) analogous diagram of the low noise amplifier of the paralleling genetic algorithm optimal design adopting band elitism strategy;

Fig. 5 is noise figure (NF) analogous diagram of the low noise amplifier of the paralleling genetic algorithm optimal design adopting band elitism strategy;

Fig. 6 is Input matching (S11) analogous diagram of the low noise amplifier of the paralleling genetic algorithm optimal design adopting band elitism strategy;

Fig. 7 is method flow diagram of the present invention.

Embodiment

Below in conjunction with accompanying drawing, the present invention is described in further detail.

The Optimization Design of a kind of low noise amplifier based on genetic algorithm (LNA) of the present invention, flow process as shown in Figure 7, comprises the following steps:

Step one: the circuit structure determining LNA;

As shown in Figure 1, LNA comprises main amplifying circuit, source class coupling inductance L _s, Input matching inductance L _g, single-ended transfer difference output stage.

Main amplifying circuit is single ended input, comprises the first common source transistors M ₁, the first altogether gate transistor M ₂, electric capacity C _ex, pull-up resistor R ₁;

First common source transistors M ₁gate transistor M is total to first ₂composition cascade (cascode) structure, the first common source transistors M ₁grid and Input matching inductance L _gbe connected, source electrode is by source-coupled inductance L _sground connection, drain electrode is total to gate transistor M with first ₂source electrode be connected; First is total to gate transistor M ₂grid and power supply V _ddbe connected, drain by pull-up resistor R ₁with power supply V _ddbe connected.Electric capacity C _exbe connected in parallel on the first common source transistors M ₁grid source class between.

Single-ended transfer difference output stage comprises the second common source transistors M ₃, the second altogether gate transistor M ₄, coupling capacitance C ₁, pull-up resistor R ₂;

Second common source transistors M ₃gate transistor M is total to second ₄composition cascode structure, the second common source transistors M ₃grid by coupling capacitance C ₁with the first common source transistors M ₁drain electrode be connected, source ground, drain electrode and the second altogether gate transistor M ₄source electrode be connected; Second is total to gate transistor M ₄grid and power supply V _ddbe connected, drain by the second resistance R ₂with power supply V _ddbe connected.

Low pressure bias current sources V _biasby resistance R ₃and R ₄be added to the first common source transistors M respectively ₁with the second common source transistors M ₃grid.Radiofrequency signal RF_IN is by Input matching inductance L _gbe input to the first common source transistors M ₁grid, after amplifying, become differential signal RF_OUT, respectively from the first altogether gate transistor M ₂gate transistor M is total to second ₄drain electrode export.

Step 2: setting independent variable.

Setting independent variable is as follows: working current I _d, transistor channel width W(in order to design consideration, all elect the channel width of all crystals pipe in circuit as identical value W, channel length all elects most short channel length L as), the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁mutual conductance g _m, the first common source transistors M ₁grid source between electric capacity C _gs, the first common source transistors M ₁source class coupling inductance L _s, Input matching inductance L _g.

Step 3: establish constraint condition.

First establish Linear Constraints, according to the technique selected and supply voltage, establish W and C _exspan.

Select certain CMOS technology in the present invention, then corresponding supply voltage VDD also can determine.The supply voltage that such as 180nmCMOS technique is corresponding is supply voltage corresponding to 1.8V, 130nmCMOS technique is 1.2V, etc., then can establish W and C respectively _exspan.

Basis again establish C _gsspan.

Wherein: C _oxfor the gate oxide capacitance of unit area, it is process constant;

Again according to the restriction of power consumption P, establish bias current I _dspan be:

$0<I_D<\frac{P}{V_{\mathrm{dd}}}$

In addition, also need to set Nonlinear Constraints:

$g_m=\sqrt{{2\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{W}{L}{I}_D}$

Wherein: μ _nfor electron mobility, it is process constant;

In order to simplify optimization aim, improve arithmetic speed, using input resistant matching as constraint condition, the antenna of LNA input port or antenna filter are 50 ohm, therefore the input impedance Z of LNA _inequal the conjugation of 50 ohm, be specially:

$Z_{\mathrm{in}}=\mathrm{j\&omega;}(L_g+L_s)+\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}+\frac{1}{\mathrm{j\&omega;}(C_{\mathrm{ex}}+C_{\mathrm{gs}})}=50$

Wherein, j represents imaginary number, obtains:

$\left\{\begin{array}{c}\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}=50\\ (L_g+L_s)(C_{\mathrm{ex}}+C_{\mathrm{gs}}){\mathrm{\&omega;}}^2=1\end{array}\right.$

Wherein, ω is frequency of operation.

Step 4: establish optimization aim.

Optimization aim is mainly gain G, noise figure NF and power consumption P.

Circuit performance appraisal procedure adopts the circuit performance assessment technology based on equation, and by the manual performance equation deriving circuit, the numerical value of counting circuit performance equation in each iteration, thus travelling speed is fast, and can be optimized rapidly result at short notice.Only need to set up circuit model comparatively accurately, just can meet the requirements of design accuracy.

Derive the performance equation of circuit by hand, namely optimization object function is as follows:

$\left\{\begin{array}{c}G=\frac{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}{2\mathrm{\&omega;}{R}_s}\\ \mathrm{NF}=101g\{1+2.4\frac{\mathrm{\&omega;}}{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}+\frac{R_n}{\mathrm{Re}\left[Y_s\right]}|Y_{\mathrm{opt}}-Y_s{|}^2\}\\ P=V_{\mathrm{dd}}\&CenterDot;I_D\end{array}\right.$

Wherein, α is technology library constant, can be estimated as between 0.85 ~ 1; δ is grid noise figure, can be estimated as 4 in short channel device (channel length is less than 4 microns); γ is the coefficient relevant with bias state, is about the half of δ; C is the related coefficient of channel noise and grid noise; R _sfor the impedance of antenna or antenna filter, namely 50 ohm, y _opt=1/Z _opt, Y _s=1/Z _s, wherein:

$\left\{\begin{array}{c}{Z}_{\mathrm{opt}}=\frac{\mathrm{\&alpha;}\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-|c{|}^2)+j(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}|c\left|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\right)}}{\mathrm{\&omega;}{C}_{\mathrm{gs}}\{\frac{{\mathrm{\&alpha;}}^2\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-|c{|}^2)+(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}\left|c\right|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\left)2^{}\right\}}-\mathrm{j\&omega;}{L}_s\\ Z_s=R_s+\mathrm{j\&omega;}{L}_g\end{array}\right.$

By the numerical value of counting circuit performance equation in each iteration afterwards.

Step 5: adopt the paralleling genetic algorithm of band elitism strategy to carry out multiple-objection optimization to the design parameter of LNA, be optimized result.Its concrete grammar is:

1) encode.Gray code, for binary coding, is convenient to the local search ability improving genetic algorithm, and is convenient to realize the genetic manipulations such as intersection, variation, meets minimum character code principle.Thus use Gray code (Gray Code) to encode to independent variable, represent the individuality in colony.

2) initial population is generated.The N number of original string structured data of random generation is as body one by one, and this is individual forms initial population.Wherein each individuality comprises the independent variable in step 2, and according to the precision that independent variable is chosen, each independent variable is made up of the character string of some code lengths, and these character strings connect together according to fixing order and form body one by one.

In addition, also to ensure that the individuality generated all meets Linear Constraints in step 3 and Nonlinear Constraints when generating initial population.

3) set up fitness function according to the objective function determined in step 4, then adopt the fitness assignment method based on sequence, distinguish the quality of individual in population.

4) selection opertor is acted on population.

Due to LNA objective function between the magnitude difference of numerical value comparatively large, if adopt Exchanger Efficiency with Weight Coefficient Method to be optimized, be difficult to ensure that objective function obtains desirable solution simultaneously, and paratactic selection method can address this problem preferably.Impartial for whole individualities in colony is divided into some sub-groups, a sub-objective function is distributed to each sub-group, each sub-goal function independently carries out Selecting operation in corresponding sub-group, select the individuality that fitness is high separately, remerge composition colony, carry out ensuing crossover and mutation computing.Paratactic selection method is a kind of parallel genetic algorithm, can reduce the calculated amount in optimizing process, accelerates optimal speed; Also can avoid the generation of precocious phenomenon to a certain extent simultaneously.

Adopt the probability selection filial generation being less than 1, make the individual amount of filial generation be less than parent individual amount.Namely per have " generation gap " between generation and parent, heavily can insert in operation afterwards like this, ensure that the defect individual in parent directly enters the next generation.

Selection opertor adopts random ergodic sampling, each individuality enter follow-on probability equal ideal adaptation angle value in its fitness value and whole population and ratio.That is, make gain in step 4 larger, it is larger that the individuality that noise figure is less enters follow-on probability.

5) crossover operator is acted on population.Adopt single-point crossover operator, arrange a point of crossing in individual UVR exposure string at random, then mutually exchange the individual chromosome dyad of two pairings at this point, a new generation that can produce combination parent feature is individual.

6) mutation operator is acted on population.Adopt Discrete mutation operator, adopt mutation probability to change individual gene at random.Mutation probability scope is that between 0 ~ 1, value is too small, easily converges to locally optimal solution, occurs precocious situation; And larger, be not easy again to retain current defect individual, and adopt the genetic algorithm of band elitism strategy to address this problem preferably.

7) new population in heavy intron generation.Replace the most unconformable individuality in parent to form population of new generation with the new individuality that fitness in filial generation is higher, ensure that the excellent individual in population directly enters new population of future generation all the time.This method is otherwise known as with the genetic algorithm of elitism strategy, namely ensures that outstanding individuality directly enters into the next generation all the time.Can prove, standard genetic algorithm does not restrain, and is no matter before selection with the genetic algorithm of elitism strategy or retaining excellent individual after selecting can ensure convergence.

8) end condition judges.Through some generations, when iterations reaches the setting of maximum algebraically, or the optimum results of objective function meets designing requirement, then stop computing, the individuality with maximum adaptation degree obtained is exported as optimum solution in evolutionary process.

The individuality of final output is the character string after coding, namely can be obtained the value of independent variable in step 2 by decoding.

Step 6: emulate LNA circuit according to optimum results, according to simulation result to working current I _d, the channel width W of transistor, the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁source class coupling inductance L _swith Input matching inductance L _gparameter adjusts, and determines final parameter size.

Embodiment:

In this example, adopt the paralleling genetic algorithm of band elitism strategy to carry out multiple-objection optimization to the design parameter of LNA, as shown in Figure 2, after the iteration in 50 generations, the gain stabilization of LNA is at about 17dB, and as shown in Figure 3, the gain stabilization of LNA is at about 0.67dB.That gain or noise figure all reach good design result.

Carried out emulation testing 0.18 μm of CMOS technology to design example of the present invention, test result is as follows:

As shown in Figure 4, low noise amplifier designed in the present embodiment, be 15.72dB in the gain at the frequency of operation place of 1.575GHz, relative optimum results declines to some extent, and this causes because impedance matching can not reach coupling completely.

As shown in Figure 5, low noise amplifier designed in the present embodiment, is 0.68dB at the noise figure at the frequency of operation place of 1.575GHz, illustrates that this circuit reaches good noise matching.

As shown in Figure 6, low noise amplifier designed in the present embodiment, is-22.03dB at the input return loss at the frequency of operation place of 1.575GHz, illustrates that this circuit reaches good input resistant matching.

Emulated by direct current, record this example and extract one-terminal current 2.4mA under the supply voltage of 1.8V, difference current is 4.8mA altogether, and power consumption is only 8.64mW, and power consumption is lower.

The invention discloses the Optimization Design of a kind of LNA based on genetic algorithm, solve the problem of multiple-objection optimization in LNA design.In LNA, circuit parameter is as variable, using the current equation of the impedance matching of LNA and transistor as constraint condition, using the circuit performance assessment technology based on equation as circuit performance appraisal procedure, to be with the paralleling genetic algorithm of elitism strategy as full search algorithm, the gain of LNA, noise figure and power consumption are optimized simultaneously.This optimization method can obtain the optimum results of circuit fast, is very suitable for the circuit design of particular constraints, performance and function.

Claims (7)

1., based on an Optimization Design for the low noise amplifier of genetic algorithm, comprise the following steps:

Step one: the circuit structure determining LNA;

LNA comprises main amplifying circuit, source class coupling inductance L _s, Input matching inductance L _g, single-ended transfer difference output stage; Main amplifying circuit is single ended input, comprises the first common source transistors M ₁, the first altogether gate transistor M ₂, electric capacity C _ex, pull-up resistor R ₁; First common source transistors M ₁gate transistor M is total to first ₂composition cascode structure, the first common source transistors M ₁grid and Input matching inductance L _gbe connected, source electrode is by source-coupled inductance L _sground connection, drain electrode is total to gate transistor M with first ₂source electrode be connected; First is total to gate transistor M ₂grid and power supply V _ddbe connected, drain by pull-up resistor R ₁with power supply V _ddbe connected; Electric capacity C _exbe connected in parallel on the first common source transistors M ₁grid source class between; Single-ended transfer difference output stage comprises the second common source transistors M ₃, the second altogether gate transistor M ₄, coupling capacitance C ₁, pull-up resistor R ₂; Second common source transistors M ₃gate transistor M is total to second ₄composition cascode structure, the second common source transistors M ₃grid by coupling capacitance C ₁with the first common source transistors M ₁drain electrode be connected, source ground, drain electrode and the second altogether gate transistor M ₄source electrode be connected; Second is total to gate transistor M ₄grid and power supply V _ddbe connected, drain by the second resistance R ₂with power supply V _ddbe connected; Low pressure bias current sources V _biasby resistance R ₃and R ₄be added to the first common source transistors M respectively ₁with the second common source transistors M ₃grid; Radiofrequency signal RF_IN is by Input matching inductance L _gbe input to the first common source transistors M ₁grid, after amplifying, become differential signal RF_OUT, respectively from the first altogether gate transistor M ₂gate transistor M is total to second ₄drain electrode export;

Step 2: setting independent variable;

Setting independent variable is as follows: working current I _d, the channel width W of transistor, the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁mutual conductance g _m, the first common source transistors M ₁grid source between electric capacity C _gs, the first common source transistors M ₁source class coupling inductance L _s, Input matching inductance L _g;

Step 3: establish constraint condition;

First establish Linear Constraints, according to the technique selected and supply voltage, establish W and C _exspan;

According to establish C _gsspan, wherein: C _oxfor the gate oxide capacitance of unit area;

According to the restriction of power consumption P, establish bias current I _dspan be:

$<I_D<\frac{P}{V_{\mathrm{dd}}}$

Setting Nonlinear Constraints:

$g_m=\sqrt{{2\mathrm{\&mu;}}_n{C}_{\mathrm{ox}}\frac{w}{L}{I}_D}$

Wherein: μ _nfor electron mobility;

Using input resistant matching as constraint condition, the antenna of LNA input port or antenna filter are 50 ohm, therefore the input impedance Z of LNA _inequal the conjugation of 50 ohm, be specially:

$Z_{\mathrm{in}}=\mathrm{j\&omega;}(L_g+L_s)+\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}+\frac{1}{\mathrm{j\&omega;}(C_{\mathrm{ex}}+C_{\mathrm{gs}})}=50$

Wherein, j represents imaginary number, obtains:

$\left\{\begin{array}{c}\frac{g_m{L}_s}{C_{\mathrm{ex}}+C_{\mathrm{gs}}}=50\\ (L_g+L_s)(C_{\mathrm{ex}}+C_{\mathrm{gs}}){\mathrm{\&omega;}}^2=1\end{array}\right.$

Wherein, ω is frequency of operation;

Step 4: establish optimization aim;

Optimization aim is mainly gain G, noise figure NF and power consumption P;

Optimization object function is as follows:

$\left\{\begin{array}{c}G=\frac{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}{{2\mathrm{\&omega;R}}_s}\\ \mathrm{NF}=10\&CenterDot;\lg \{1+2.4\frac{\mathrm{\&omega;}}{g_m/(C_{\mathrm{gs}}+C_{\mathrm{ex}})}+\frac{R_n}{\mathrm{Re}\left[Y_s\right]}{|Y_{\mathrm{opt}}-Y_s|}^2\}\\ P=V_{\mathrm{dd}}\&CenterDot;I_D\end{array}\right.$

Wherein, α is technology library constant; δ is grid noise figure; γ is the coefficient relevant with bias state; C is the related coefficient of channel noise and grid noise; R _sfor the impedance of antenna or antenna filter, namely 50 ohm, y _opt=1/Z _opt, Y _s=1/Z _s, wherein:

$\left\{\begin{array}{c}{Z}_{\mathrm{opt}}=\frac{\mathrm{\&alpha;}\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-{\left|c\right|}^2)}+j(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}|c\left|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\right)}{{\mathrm{\&omega;C}}_{\mathrm{gs}}\{\frac{{\mathrm{\&alpha;}}^2\mathrm{\&delta;}}{5\mathrm{\&gamma;}}(1-{\left|c\right|}^2)+{(\frac{C_{\mathrm{gs}}+C_{\mathrm{ex}}}{C_{\mathrm{gs}}}+\mathrm{\&alpha;}|c\left|\sqrt{\frac{\mathrm{\&delta;}}{5\mathrm{\&gamma;}}}\right)}^2\}}-\mathrm{j\&omega;}{L}_s\\ Z_s=R_s+\mathrm{j\&omega;}{L}_g\end{array}\right.$

Step 5: adopt the paralleling genetic algorithm of band elitism strategy to carry out multiple-objection optimization to the design parameter of LNA, be optimized result;

Step 6: emulate LNA circuit according to optimum results, according to simulation result to working current I _d, the channel width W of transistor, the first common source transistors M ₁grid source class shunt capacitance C _ex, the first common source transistors M ₁source class coupling inductance L _swith Input matching inductance L _gparameter adjusts, and determines final parameter size, obtains low noise amplifier;

Described step 5 is specially:

1) encode, use the string of binary characters of regular length to encode to independent variable, represent the individuality in colony;

2) initial population is generated, the N number of original string structured data of random generation is as body one by one, this is individual forms initial population, and wherein each individuality comprises the independent variable in step 2, and individuality all meets Linear Constraints in step 3 and Nonlinear Constraints;

3) set up fitness function according to the objective function determined in step 4, then adopt the fitness assignment method based on sequence, distinguish the quality of individual in population;

4) selection opertor is acted on population, the fitness value size according to individuality selects defect individual, and fitness value is higher, enters follow-on probability larger;

5) crossover operator is acted on population, a new generation that crossing operation produces combination parent feature is individual;

6) mutation operator is acted on population, change individual gene at random with mutation probability;

7) new population in heavy intron generation, the new individuality higher with fitness in filial generation replaces the most unconformable individuality in parent;

8) end condition judges, through some generations, when iterations reaches the setting of maximum algebraically, or the optimum results of objective function meets designing requirement, then stop computing, the individuality with maximum adaptation degree obtained in evolutionary process is exported as optimum solution;

The individuality of final output is the character string after coding, namely can be obtained the value of independent variable in step 2 by decoding.

2. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 1) in, adopt Gray code to encode to independent variable.

3. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 4) in, selection opertor adopts random ergodic sampling, each individuality enter follow-on probability equal ideal adaptation angle value in its fitness value and whole population and ratio.

4. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 4) in, the selection opertor adopted is with the probability selection filial generation being less than 1, namely the individual amount of filial generation is less than parent individual amount, then keeps the individual amount in per generation identical by the mode heavily inserted.

5. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 4) in, according to the quantity of optimization aim, population is divided into some sub-populations, side by side selection opertor operation is carried out to different optimization aim.

6. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 5) in, crossover operator adopts single-point crossover operator, a point of crossing is set at random in individual UVR exposure string, then mutually exchanges the chromosome dyad that two pairings are individual in this point of crossing.

7. the Optimization Design of a kind of low noise amplifier based on genetic algorithm according to claim 1, described 6) in, mutation operator adopts Discrete mutation operator, adopts mutation probability to make a variation to each element.