CN103107067B - A kind of process for making of semiconducting bi-layer protective layer - Google Patents
A kind of process for making of semiconducting bi-layer protective layer Download PDFInfo
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- CN103107067B CN103107067B CN201110359989.1A CN201110359989A CN103107067B CN 103107067 B CN103107067 B CN 103107067B CN 201110359989 A CN201110359989 A CN 201110359989A CN 103107067 B CN103107067 B CN 103107067B
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- protective layer
- photosensitive polyimides
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Abstract
The invention discloses a kind of process for making of semiconductor cap layer, comprise step as follows: 1) silicon chip that has made top-level metallic line is provided; 2) in grown above silicon medium protective layer; 3) spin coating of non-photosensitive polyimides, baking; 4) spin coating of photoresist, baking; 5) mask plate with medium protective layer opening figure is used to expose; 6) photoresist and the non-photosensitive polyimides of exposure area is removed in development, forms non-photosensitive polyimides opening; 7) etching removes the medium protective layer of exposure area, forms medium protective layer opening, top-level metallic line is exposed; 8) develop further, make non-photosensitive polyimides opening size become large, be greater than the size of medium protective layer opening; 9) stripper removes photoresist with photoresist; 10) solidification of non-photosensitive polyimides.The present invention can simplify the technological process that traditional use Twi-lithography method makes double shielding layer, reduces costs.
Description
Technical field
The invention belongs to semiconductor integrated circuit manufacturing process, relate to a kind of process for making of semiconductor cap layer, particularly relate to a kind of process for making of semiconducting bi-layer protective layer.
Background technology
In semiconductor processing; in order to reduce the various steam and chemical attacks, electromagnetic radiation and mechanical external force damage etc. that natural environment and operational environment cause semiconductor device; usual meeting is after top-level metallic line is carried out; do one deck or two-layer protective layer (being again passivation layer or resilient coating) to be again used for preventing these from corroding and damage, some dielectric materials (as: silicon dioxide SiO
2, silicon nitride Si
3n
4, silicon oxynitride SiON, these dielectric materials after doping and mutual composition between them) and Polyimide (polyimides) material due to its good high-temperature stability, mechanical performance, electric property and chemical stability, be widely used in the protective layer of these semiconductor device of making.
In order to the demand of follow-up bonding wire and encapsulation; when needs use double shielding layer (one deck dielectric layer and one deck polyimides); usually all can form protective layer structure as shown in Figure 1, also namely the size of underlying dielectric protective layer opening 8 is less than the size of non-photosensitive polyimides opening 7 above it.Form above-mentioned double shielding Rotating fields, generally all use technological process as shown in Figure 2: (1) is making the silicon chip somatomedin protective layer of top-level metallic line; (2) spin coating of photoresist, baking; (3) mask with dielectric layer opening figure is used to expose; (4) substrate after exposure is developed and toasted; (5) etching forms medium protective layer opening; (6) photoresist is removed; (7) spin coating of photosensitive polyimide, baking; (8) mask with polyimide layer opening figure is used to expose; (9) development and baking form polyimide layer opening; (10) polyimide curing; Namely the different mask plate (step (3) and step (8)) of use two pieces is passed through, come through Twi-lithography and the process that once etches, this technique is because will use two pieces of lithography mask versions and Twi-lithography, complex process, and cost is also higher.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of process for making of semiconducting bi-layer protective layer, to simplify the technological process that traditional double shielding layer makes, reduces costs.
For solving the problems of the technologies described above, the invention provides a kind of process for making of semiconducting bi-layer protective layer, comprising step as follows:
(1) silicon chip that has made top-level metallic line is provided;
(2) in described grown above silicon medium protective layer;
(3) in described medium protective layer, carry out spin coating, the baking of non-photosensitive polyimides;
(4) on described non-photosensitive polyimides, carry out spin coating, the baking of photoresist;
(5) mask plate with medium protective layer opening figure is used to expose;
(6) photoresist and the non-photosensitive polyimides of exposure area is removed in development, forms non-photosensitive polyimides opening;
(7) etching removes the medium protective layer of exposure area, forms medium protective layer opening, top-level metallic line is exposed;
(8) develop further, make non-photosensitive polyimides opening size become large, be greater than the size of medium protective layer opening;
(9) stripper is peeled off and is removed photoresist with photoresist;
(10) solidification of non-photosensitive polyimides.
In step (2), described medium protective layer adopts following dielectric material: silicon dioxide SiO
2, silicon nitride Si
3n
4, silicon oxynitride SiON or the arbitrary composition between them or the described dielectric material after doping.
In step (3), described non-photosensitive polyimides, refer to its G-line to wavelength 436 nanometer, any one light in the I-line of wavelength 365 nanometer, the KrF of wavelength 248 nanometer and the ArF of wavelength 193 nanometer does not have light sensitivity.Described non-photosensitive polyimides can be dissolved in conventional tetramethyl oxyammonia (TMAH) developer solution.The baking temperature of described non-photosensitive polyimides is 80-140 DEG C, and baking time is 0.5-10 minute.Described non-photosensitive polyimides spin coating, to toast later thickness be 1-100 micron.
In step (4), the G-line of the type of described photoresist to be exposure wavelength be 436 nanometers, any one in the I-line of 365 nanometers, the KrF of 248 nanometers and the ArF of 193 nanometers.Described photoresist spin coating, to toast later thickness be 1-50 micron.
In step (7), described etching refer to have anisotropic character, using the mist of fluorocarbons class G&O as the plasma dry etch of etching agent, its radio-frequency power is 800-1600 watt, cavity air pressure is 10-20 millitorr.
In step (8), described further development, its developing time is 10-500 second; The single side size 1-20 micron larger than the single side size of described medium protective layer opening of described non-photosensitive polyimides opening.
In step (9), described photoresist lift off liquid can peel off removal photoresist, but can not peel off removal non-photosensitive polyimides.Preferably, described photoresist lift off liquid is 1-Methoxy-2-propyl acetate (PGMEA) or propylene glycol monomethyl ether (PGME) or its combination.
In step (10), the solidification of described non-photosensitive polyimides, its curing temperature is 200-500 DEG C, and curing time is 30-120 minute.
Compared to the prior art, the present invention has following beneficial effect: contrast conventional process flow Fig. 2 and present invention process flow chart 3 known, technological process of the present invention only employs a step exposure, and traditional technological process employs two step exposures, therefore present invention saves the process of a step exposure, also save the mask plate of one piece of polyimide layer simultaneously, effectively simplify technological process, save production cost.
Accompanying drawing explanation
Fig. 1 is the structural representation of semiconducting bi-layer protective layer;
Fig. 2 is the fabrication processing figure of traditional semiconducting bi-layer protective layer;
Fig. 3 is the fabrication processing figure of semiconducting bi-layer protective layer of the present invention;
Fig. 4 is the fabrication processing profile of semiconducting bi-layer protective layer of the present invention; Wherein, Fig. 4 (A) is the schematic diagram after the step (1) of the inventive method completes; Fig. 4 (B) is the schematic diagram after the step (2) of the inventive method completes; Fig. 4 (C) is the schematic diagram after the step (3) of the inventive method completes; Fig. 4 (D) is the schematic diagram after the step (4) of the inventive method completes; Fig. 4 (E) is the schematic diagram after the step (5) of the inventive method completes; Fig. 4 (F) is the schematic diagram after the step (6) of the inventive method completes; Fig. 4 (G) is the schematic diagram after the step (7) of the inventive method completes; Fig. 4 (H) is the schematic diagram after the step (8) of the inventive method completes; Fig. 4 (I) is the schematic diagram after the step (9) of the inventive method completes.
In figure, description of reference numerals is as follows:
1-has made the silicon chip of top-level metallic line, 2-top-level metallic line, 3-medium protective layer, 4-non-photosensitive polyimides, 5-photoresist, 6-exposure area, 7-non-photosensitive polyimides opening, 8-medium protective layer opening.
Embodiment
Below in conjunction with drawings and Examples, the present invention is further detailed explanation.
The process for making of a kind of semiconducting bi-layer protective layer provided by the invention, its technological process as shown in Figure 3, it is characterized in that introducing non-photosensitive polyimides photoetching process, the opening of medium protective layer is first formed after a photoetching and etching, and then utilize non-photosensitive polyimides to dissolve in the characteristic of developer solution, a step developing process is added after the opening forming medium protective layer, the opening of non-photosensitive polyimides is made to become large, thus the double shielding Rotating fields formed as shown in Figure 1, also namely the size of underlying dielectric protective layer opening 8 is less than the size of non-photosensitive polyimides opening 7 above it.Contrast conventional process flow Fig. 2 and present invention process flow chart 3 known, technological process of the present invention only employs a step exposure, and traditional technological process employs two step exposures, therefore present invention saves the process of a step exposure, also save the mask plate of one piece of polyimide layer simultaneously, effectively simplify technological process, save production cost.
As shown in Figure 3 and Figure 4, the process for making of a kind of semiconducting bi-layer protective layer of the present invention, its detailed process step is as follows:
(1) as shown in Fig. 4 (A), the silicon chip 1 that has made top-level metallic line 2 is provided;
(2) as shown in Fig. 4 (B), somatomedin protective layer 3 on described silicon chip 1; Described medium protective layer 3 refers to and adopts silicon dioxide SiO
2, silicon nitride Si
3n
4, silicon oxynitride SiON dielectric material or the arbitrary composition between them or the described dielectric material after doping;
(3) as shown in Fig. 4 (C), spin coating non-photosensitive polyimides 4 in described medium protective layer 3, and toast; Described non-photosensitive polyimides 4, refer to that it is to G-line (436 nanometer), any one light of I-line (365 nanometer), KrF (248 nanometer) and ArF (193 nanometer) wavelength does not have light sensitivity; Described non-photosensitive polyimides 4 can both be dissolved in conventional tetramethyl oxyammonia (TMAH) developer solution before exposure with after exposure; The baking temperature of described non-photosensitive polyimides 4 is 80-140 DEG C, and baking time is 0.5-10 minute; Described non-photosensitive polyimides 4 spin coating, to toast later thickness be 1-100um (micron);
(4) as shown in Fig. 4 (D), spin coating photoresist 5 on described non-photosensitive polyimides 4 also toasts; The type of described photoresist 5 is G-line (436 nanometers), any one in I-line (365 nanometer), KrF (248 nanometer) and ArF (193 nanometer) type; Described photoresist 5 spin coating, to toast later thickness be 1-50um (micron);
(5) as shown in Fig. 4 (E), use the mask plate (not shown) with medium protective layer opening figure to expose, the photoresist of exposure area 6 is become and dissolves in developer solution;
(6) as shown in Fig. 4 (F), photoresist and the non-photosensitive polyimides of exposure area 6 are removed in development, form non-photosensitive polyimides opening 7;
(7) as shown in Fig. 4 (G), etching removes the medium protective layer of exposure area 6, forms medium protective layer opening 8, top-level metallic line 2 is exposed; Described etching refer to have anisotropic character, with fluorocarbons class gas (as: CF
4, CHF
3, C
4f
8or C
5f
8deng) and the mist of oxygen as the plasma dry etch of etching agent; Its radio-frequency power is 800-1600 watt, and cavity air pressure is 10-20 millitorr.
(8) as shown in Fig. 4 (H), develop further, because developer solution is to the isotropism development capability of non-photosensitive polyimides, therefore the size of non-photosensitive polyimides opening 7 can become large, thus is greater than the size of medium protective layer opening 8; Described further development, its developing time is 10-500 second; The single side size of described non-photosensitive polyimides opening 7 than the large 1-20um of the single side size of described medium protective layer opening 8 (as shown in Fig. 4 (I) a);
(9) as shown in Fig. 4 (I), stripper is peeled off and is removed photoresist 5 with photoresist; Described photoresist lift off liquid can peel off removal photoresist, but can not peel off removal non-photosensitive polyimides, and preferably, photoresist lift off liquid refers to that 1-Methoxy-2-propyl acetate (PGMEA) or propylene glycol monomethyl ether (PGME) or its combine;
(10) solidification of non-photosensitive polyimides 4, adopt ultraviolet curing or hot curing, its curing temperature is 200-500 DEG C, and curing time is 30-120 minute.
Claims (15)
1. a process for making for semiconducting bi-layer protective layer, is characterized in that, comprises step as follows:
(1) silicon chip that has made top-level metallic line is provided;
(2) in described grown above silicon medium protective layer;
(3) in described medium protective layer, carry out spin coating, the baking of non-photosensitive polyimides;
(4) on described non-photosensitive polyimides, carry out spin coating, the baking of photoresist;
(5) mask plate with medium protective layer opening figure is used to expose;
(6) photoresist and the non-photosensitive polyimides of exposure area is removed in development, forms non-photosensitive polyimides opening;
(7) etching removes the medium protective layer of exposure area, forms medium protective layer opening, top-level metallic line is exposed;
(8) develop further, make non-photosensitive polyimides opening size become large, be greater than the size of medium protective layer opening; Described further development, its developing time is 10-500 second; The single side size 1-20 micron larger than the single side size of described medium protective layer opening of described non-photosensitive polyimides opening;
(9) stripper is peeled off and is removed photoresist with photoresist;
(10) solidification of non-photosensitive polyimides.
2. method according to claim 1, is characterized in that, in step (2), described medium protective layer adopts following dielectric material: silicon dioxide SiO
2, silicon nitride Si
3n
4, silicon oxynitride SiON or the arbitrary composition between them or the described dielectric material after doping.
3. method according to claim 1, it is characterized in that, in step (3), described non-photosensitive polyimides, refer to its G-line to wavelength 436 nanometer, any one light in the I-line of wavelength 365 nanometer, the KrF of wavelength 248 nanometer and the ArF of wavelength 193 nanometer does not have light sensitivity.
4. the method according to claim 1 or 3, is characterized in that, in step (3), described non-photosensitive polyimides can be dissolved in conventional tetramethyl oxyammonia developer solution.
5. the method according to claim 1 or 3, is characterized in that, in step (3), described non-photosensitive polyimides spin coating, baking, its baking temperature is 80-140 DEG C, and baking time is 0.5-10 minute.
6. method according to claim 4, is characterized in that, in step (3), described non-photosensitive polyimides spin coating, baking, its baking temperature is 80-140 DEG C, and baking time is 0.5-10 minute.
7. the method according to claim 1 or 3 or 6, is characterized in that, in step (3), described non-photosensitive polyimides spin coating, to toast later thickness be 1-100 micron.
8. method according to claim 4, is characterized in that, in step (3), described non-photosensitive polyimides spin coating, to toast later thickness be 1-100 micron.
9. method according to claim 5, is characterized in that, in step (3), described non-photosensitive polyimides spin coating, to toast later thickness be 1-100 micron.
10. method according to claim 1, it is characterized in that, in step (4), the G-line of the type of described photoresist to be exposure wavelength be 436 nanometers, any one in the I-line of 365 nanometers, the KrF of 248 nanometers and the ArF of 193 nanometers.
11. methods according to claim 1 or 10, is characterized in that, in step (4), described photoresist spin coating, to toast later thickness be 1-50 micron.
12. methods according to claim 1, it is characterized in that, in step (7), described etching refer to have anisotropic character, using the mist of fluorocarbons class G&O as the plasma dry etch of etching agent, its radio-frequency power is 800-1600 watt, and cavity air pressure is 10-20 millitorr.
13. methods according to claim 1, is characterized in that, in step (9), described photoresist lift off liquid can peel off removal photoresist, but can not peel off removal non-photosensitive polyimides.
14. methods according to claim 13, is characterized in that, in step (9), described photoresist lift off liquid is 1-Methoxy-2-propyl acetate or propylene glycol monomethyl ether or its combination.
15. methods according to claim 1, is characterized in that, in step (10), the solidification of described non-photosensitive polyimides, its curing temperature is 200-500 DEG C, and curing time is 30-120 minute.
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| CN112652522B (en) * | 2020-07-23 | 2022-05-03 | 腾讯科技（深圳）有限公司 | Photoresist structure, patterned deposition layer, semiconductor chip and manufacturing method thereof |
| CN112271133A (en) * | 2020-09-25 | 2021-01-26 | 华东光电集成器件研究所 | Metal stripping method based on three layers of glue |
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